src/mainboard/google/veyron_mickey/bootblock.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright 2014 Rockchip Inc.
   5  * Copyright 2014 Google Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <device/mmio.h>
  18 #include <assert.h>
  19 #include <bootblock_common.h>
  20 #include <delay.h>
  21 #include <soc/clock.h>
  22 #include <soc/i2c.h>
  23 #include <soc/grf.h>
  24 #include <soc/pmu.h>
  25 #include <soc/rk808.h>
  26 #include <soc/spi.h>
  27 #include <vendorcode/google/chromeos/chromeos.h>
  28
  29 #include "board.h"
  30
  31 void bootblock_mainboard_early_init()
  32 {
  33         if (CONFIG(CONSOLE_SERIAL)) {
  34                 assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE);
  35                 write32(&rk3288_grf->iomux_uart2, IOMUX_UART2);
  36         }
  37 }
  38
  39 void bootblock_mainboard_init(void)
  40 {
  41         if (rkclk_was_watchdog_reset())
  42                 reboot_from_watchdog();
  43
  44         gpio_output(GPIO(7, A, 0), 1);  /* Power LED */
  45
  46         /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
  47         setbits32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
  48         setbits32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
  49         assert(CONFIG_PMIC_BUS == 0);   /* must correspond with IOMUX */
  50         i2c_init(CONFIG_PMIC_BUS, 400*KHz);
  51
  52         /* Slowly raise to max CPU voltage to prevent overshoot */
  53         rk808_configure_buck(1, 1200);
  54         udelay(175);/* Must wait for voltage to stabilize,2mV/us */
  55         rk808_configure_buck(1, 1400);
  56         udelay(100);/* Must wait for voltage to stabilize,2mV/us */
  57         rkclk_configure_cpu(APLL_1800_MHZ);
  58
  59         /* i2c1 for tpm */
  60         write32(&rk3288_grf->iomux_i2c1, IOMUX_I2C1);
  61         i2c_init(1, 400*KHz);
  62
  63         /* spi2 for firmware ROM */
  64         write32(&rk3288_grf->iomux_spi2csclk, IOMUX_SPI2_CSCLK);
  65         write32(&rk3288_grf->iomux_spi2txrx, IOMUX_SPI2_TXRX);
  66         rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 24750*KHz);
  67
  68         setup_chromeos_gpios();
  69 }