src/mainboard/amd/torpedo/devicetree.cb

   1 #
   2 # This file is part of the coreboot project.
   3 #
   4 # Copyright (C) 2011 Advanced Micro Devices, Inc.
   5 #
   6 # This program is free software; you can redistribute it and/or modify
   7 # it under the terms of the GNU General Public License as published by
   8 # the Free Software Foundation; version 2 of the License.
   9 #
  10 # This program is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with this program; if not, write to the Free Software
  17 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  18 #
  19 chip northbridge/amd/agesa/family12/root_complex
  20         device cpu_cluster 0 on
  21                 chip cpu/amd/agesa/family12
  22                   device lapic 0 on end
  23                 end
  24         end
  25         device domain 0 on
  26                 subsystemid 0x1022 0x1705 inherit
  27                 chip northbridge/amd/agesa/family12 # CPU side of HT root complex
  28                                 chip northbridge/amd/agesa/family12 # PCI side of HT root complex
  29                                         device pci 0.0 on end # Root Complex
  30                                         device pci 1.0 on end # Internal Graphics Bridge
  31                                         device pci 1.1 on end # Audio Controller
  32                                         device pci 2.0 on end # Root Port
  33                                         device pci 3.0 on end # Root Port
  34                                         device pci 4.0 on end # PCIE P2P bridge
  35                                         device pci 5.0 on end # PCIE P2P bridge
  36                                         device pci 6.0 on end # PCIE P2P bridge
  37                                         device pci 7.0 on end # PCIE P2P bridge
  38                                         device pci 8.0 on end # NB/SB Link P2P bridge
  39                                 end # agesa northbridge
  40                                 chip southbridge/amd/cimx/sb900 # it is under NB/SB Link, but on the same pri bus
  41                                         device pci 10.0 on end # USB XHCI
  42                                         device pci 10.1 on end # USB XHCI
  43                                         device pci 11.0 on end # SATA
  44                                         device pci 12.0 on end # USB
  45                                         device pci 12.2 on end # USB
  46                                         device pci 13.0 on end # USB
  47                                         device pci 13.2 on end # USB
  48                                         device pci 14.0 on # SM
  49                                                 chip drivers/generic/generic #dimm 0-0-0
  50                                                         device i2c 50 on end
  51                                                 end
  52                                                 chip drivers/generic/generic #dimm 0-0-1
  53                                                         device i2c 51 on end
  54                                                 end
  55                                         end # SM
  56                                         device pci 14.1 on end # IDE
  57                                         device pci 14.2 on end # HDA
  58                                         device pci 14.3 on # LPC
  59                                                                                                 chip superio/smsc/kbc1100
  60                                                         device pnp 2e.7 on #  Keyboard
  61                                                                 io 0x60 = 0x60
  62                                                                 io 0x62 = 0x64
  63                                                                 irq 0x70 = 1
  64                                                                 irq 0x72 = 12
  65                                                         end
  66                                                 end # kbc1100
  67                                                                                 end #LPC
  68                                         device pci 14.4 on end # PCI bridge
  69                                         device pci 14.5 on end # USB 2
  70                                         device pci 14.6 on end # Ethernet Controller
  71                                         device pci 14.7 on end # SD Flash Controller
  72                                         device pci 15.0 on end # PCIe PortA
  73                                         device pci 15.1 on end # PCIe PortB
  74                                         device pci 15.2 on end # PCIe PortC
  75                                         device pci 15.3 on end # PCIe PortD
  76                                         register "gpp_configuration" = "4" #1:1:1:1
  77                                         register "boot_switch_sata_ide" = "0"   # 0: boot from SATA. 1: IDE
  78                                 end     #southbridge/amd/cimx/sb900
  79                         device pci 18.0 on end
  80                         device pci 18.1 on end
  81                         device pci 18.2 on end
  82                         device pci 18.3 on end
  83                         device pci 18.4 on end
  84                         device pci 18.5 on end
  85                         device pci 18.6 on end
  86                         device pci 18.7 on end
  87                 end #chip northbridge/amd/agesa/family12 # CPU side of HT root complex
  88         end #domain
  89 end #northbridge/amd/agesa/family12/root_complex
  90