1 /* SPDX-License-Identifier: BSD-3-Clause */
3 /* Host communication command constants for Chrome EC */
5 #ifndef __CROS_EC_EC_COMMANDS_H
6 #define __CROS_EC_EC_COMMANDS_H
8 #if !defined(__ACPI__) && !defined(__KERNEL__)
14 * CHROMIUM_EC is defined by the Makefile system of Chromium EC repository.
15 * It is used to not include macros that may cause conflicts in foreign
16 * projects (refer to crbug.com/984623).
20 * Include common.h for CONFIG_HOSTCMD_ALIGNED, if it's defined. This
21 * generates more efficient code for accessing request/response structures on
22 * ARM Cortex-M if the structures are guaranteed 32-bit aligned.
25 #include "compile_time_macros.h"
28 /* If BUILD_ASSERT isn't already defined, make it a no-op */
30 #define BUILD_ASSERT(_cond)
31 #endif /* !BUILD_ASSERT */
32 #endif /* CHROMIUM_EC */
35 #include <linux/limits.h>
38 * Defines macros that may be needed but are for sure defined by the linux
39 * kernel. This section is removed when cros_ec_commands.h is generated (by
40 * util/make_linux_ec_commands_h.sh).
41 * cros_ec_commands.h looks more integrated to the kernel.
45 #define BIT(nr) (1UL << (nr))
49 #define BIT_ULL(nr) (1ULL << (nr))
53 * When building Zephyr, this file ends up being included before Zephyr's
54 * include/sys/util.h so causes a warning there. We don't want to add an #ifdef
55 * in that file since it won't be accepted upstream. So work around it here.
59 #define GENMASK(h, l) (((BIT(h) << 1) - 1) ^ (BIT(l) - 1))
63 #define GENMASK_ULL(h, l) (((BIT_ULL(h) << 1) - 1) ^ (BIT_ULL(l) - 1))
67 #endif /* __KERNEL__ */
74 * Constant for creation of flexible array members that work in both C and
75 * C++. Flexible array members were added in C99 and are not part of the C++
76 * standard. However, clang++ supports them for C++.
77 * When compiling with gcc, flexible array members are not allowed to appear
78 * in an otherwise empty struct, so we use the GCC zero-length array
79 * extension that works with both clang/gcc/g++.
81 #if defined(__cplusplus) && defined(__clang__)
82 #define FLEXIBLE_ARRAY_MEMBER_SIZE
84 #define FLEXIBLE_ARRAY_MEMBER_SIZE 0
88 * Current version of this protocol
90 * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
91 * determined in other ways. Remove this once the kernel code no longer
94 #define EC_PROTO_VERSION 0x00000002
96 /* Command version mask */
97 #define EC_VER_MASK(version) BIT(version)
99 /* I/O addresses for ACPI commands */
100 #define EC_LPC_ADDR_ACPI_DATA 0x62
101 #define EC_LPC_ADDR_ACPI_CMD 0x66
103 /* I/O addresses for host command */
104 #define EC_LPC_ADDR_HOST_DATA 0x200
105 #define EC_LPC_ADDR_HOST_CMD 0x204
107 /* I/O addresses for host command args and params */
108 /* Protocol version 2 */
109 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */
110 /* For version 2 params; size is EC_PROTO2_MAX_PARAM_SIZE */
111 #define EC_LPC_ADDR_HOST_PARAM 0x804
113 /* Protocol version 3 */
114 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */
115 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */
118 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
119 * and they tell the kernel that so we have to think of it as two parts.
121 * Other BIOSes report only the I/O port region spanned by the Microchip
122 * MEC series EC; an attempt to address a larger region may fail.
124 #define EC_HOST_CMD_REGION0 0x800
125 #define EC_HOST_CMD_REGION1 0x880
126 #define EC_HOST_CMD_REGION_SIZE 0x80
127 #define EC_HOST_CMD_MEC_REGION_SIZE 0x8
129 /* EC command register bit functions */
130 #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */
131 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
132 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
133 #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */
134 #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */
135 #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */
136 #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */
138 #define EC_LPC_ADDR_MEMMAP 0x900
139 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */
140 #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */
142 /* The offset address of each type of data in mapped memory. */
143 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
144 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
145 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
146 #define EC_MEMMAP_ID 0x20 /* 0x20 == 'E', 0x21 == 'C' */
147 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
148 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
149 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
150 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
151 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
152 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
153 /* Unused 0x28 - 0x2f */
154 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */
155 /* Unused 0x31 - 0x33 */
156 #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */
157 /* Battery values are all 32 bits, unless otherwise noted. */
158 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */
159 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */
160 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */
161 #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */
162 #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */
163 #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */
165 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */
166 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */
167 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */
168 #define EC_MEMMAP_BATT_CCNT 0x5c /* Battery Cycle Count */
169 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
170 #define EC_MEMMAP_BATT_MFGR 0x60 /* Battery Manufacturer String */
171 #define EC_MEMMAP_BATT_MODEL 0x68 /* Battery Model Number String */
172 #define EC_MEMMAP_BATT_SERIAL 0x70 /* Battery Serial Number String */
173 #define EC_MEMMAP_BATT_TYPE 0x78 /* Battery Type String */
174 #define EC_MEMMAP_ALS 0x80 /* ALS readings in lux (2 X 16 bits) */
175 /* Unused 0x84 - 0x8f */
176 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/
178 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
179 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
180 /* 0x94 - 0x99: 1st Accelerometer */
181 /* 0x9a - 0x9f: 2nd Accelerometer */
183 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
184 #define EC_MEMMAP_GPU 0xa6 /* GPU-specific, 8 bits */
187 * Bit fields for EC_MEMMAP_GPU
188 * 0:2: D-Notify level (0:D1, ... 4:D5)
189 * 3: Over temperature
191 #define EC_MEMMAP_GPU_D_NOTIFY_MASK GENMASK(2, 0)
192 #define EC_MEMMAP_GPU_OVERT_BIT BIT(3)
194 /* Power Participant related components */
195 #define EC_MEMMAP_PWR_SRC 0xa7 /* Power source (8-bit) */
196 /* Unused 0xa8 - 0xdf */
199 * ACPI is unable to access memory mapped data at or above this offset due to
200 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
201 * which might be needed by ACPI.
203 #define EC_MEMMAP_NO_ACPI 0xe0
205 /* Define the format of the accelerometer mapped memory status byte. */
206 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f
207 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4)
208 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
210 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
211 #define EC_TEMP_SENSOR_ENTRIES 16
213 * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
215 * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
217 #define EC_TEMP_SENSOR_B_ENTRIES 8
219 /* Max temp sensor entries for host commands */
220 #define EC_MAX_TEMP_SENSOR_ENTRIES \
221 (EC_TEMP_SENSOR_ENTRIES + EC_TEMP_SENSOR_B_ENTRIES)
223 /* Special values for mapped temperature sensors */
224 #define EC_TEMP_SENSOR_NOT_PRESENT 0xff
225 #define EC_TEMP_SENSOR_ERROR 0xfe
226 #define EC_TEMP_SENSOR_NOT_POWERED 0xfd
227 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
229 * The offset of temperature value stored in mapped memory. This allows
230 * reporting a temperature range of 200K to 454K = -73C to 181C.
232 #define EC_TEMP_SENSOR_OFFSET 200
235 * Number of ALS readings at EC_MEMMAP_ALS
237 #define EC_ALS_ENTRIES 2
240 * The default value a temperature sensor will return when it is present but
241 * has not been read this boot. This is a reasonable number to avoid
242 * triggering alarms on the host.
244 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
246 #define EC_FAN_SPEED_ENTRIES 4 /* Number of fans at EC_MEMMAP_FAN */
247 #define EC_FAN_SPEED_NOT_PRESENT 0xffff /* Entry not present */
249 /* Report 0 for fan stalled so userspace applications can take
250 * an appropriate action based on this value to control the fan.
252 #define EC_FAN_SPEED_STALLED 0x0 /* Fan stalled */
254 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
255 #define EC_BATT_FLAG_AC_PRESENT 0x01
256 #define EC_BATT_FLAG_BATT_PRESENT 0x02
257 #define EC_BATT_FLAG_DISCHARGING 0x04
258 #define EC_BATT_FLAG_CHARGING 0x08
259 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
260 /* Set if some of the static/dynamic data is invalid (or outdated). */
261 #define EC_BATT_FLAG_INVALID_DATA 0x20
262 #define EC_BATT_FLAG_CUT_OFF 0x40
264 /* Switch flags at EC_MEMMAP_SWITCHES */
265 #define EC_SWITCH_LID_OPEN 0x01
266 #define EC_SWITCH_POWER_BUTTON_PRESSED 0x02
267 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
268 /* Was recovery requested via keyboard; now unused. */
269 #define EC_SWITCH_IGNORE1 0x08
270 /* Recovery requested via dedicated signal (from servo board) */
271 #define EC_SWITCH_DEDICATED_RECOVERY 0x10
272 /* Was fake developer mode switch; now unused. Remove in next refactor. */
273 #define EC_SWITCH_IGNORE0 0x20
275 /* Host command interface flags */
276 /* Host command interface supports LPC args (LPC interface only) */
277 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED 0x01
278 /* Host command interface supports version 3 protocol */
279 #define EC_HOST_CMD_FLAG_VERSION_3 0x02
281 /* Wireless switch flags */
282 #define EC_WIRELESS_SWITCH_ALL ~0x00 /* All flags */
283 #define EC_WIRELESS_SWITCH_WLAN 0x01 /* WLAN radio */
284 #define EC_WIRELESS_SWITCH_BLUETOOTH 0x02 /* Bluetooth radio */
285 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */
286 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */
288 /*****************************************************************************/
292 * These are valid ONLY on the ACPI command/data port.
296 * ACPI Read Embedded Controller
298 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
300 * Use the following sequence:
302 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
303 * - Wait for EC_LPC_CMDR_PENDING bit to clear
304 * - Write address to EC_LPC_ADDR_ACPI_DATA
305 * - Wait for EC_LPC_CMDR_DATA bit to set
306 * - Read value from EC_LPC_ADDR_ACPI_DATA
308 #define EC_CMD_ACPI_READ 0x0080
311 * ACPI Write Embedded Controller
313 * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
315 * Use the following sequence:
317 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
318 * - Wait for EC_LPC_CMDR_PENDING bit to clear
319 * - Write address to EC_LPC_ADDR_ACPI_DATA
320 * - Wait for EC_LPC_CMDR_PENDING bit to clear
321 * - Write value to EC_LPC_ADDR_ACPI_DATA
323 #define EC_CMD_ACPI_WRITE 0x0081
326 * ACPI Burst Enable Embedded Controller
328 * This enables burst mode on the EC to allow the host to issue several
329 * commands back-to-back. While in this mode, writes to mapped multi-byte
330 * data are locked out to ensure data consistency.
332 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
335 * ACPI Burst Disable Embedded Controller
337 * This disables burst mode on the EC and stops preventing EC writes to mapped
340 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
343 * ACPI Query Embedded Controller
345 * This clears the lowest-order bit in the currently pending host events, and
346 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
347 * event 0x80000000 = 32), or 0 if no event was pending.
349 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
351 /* Valid addresses in ACPI memory space, for read/write commands */
353 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
354 #define EC_ACPI_MEM_VERSION 0x00
356 * Test location; writing value here updates test compliment byte to (0xff -
359 #define EC_ACPI_MEM_TEST 0x01
360 /* Test compliment; writes here are ignored. */
361 #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02
363 /* Keyboard backlight brightness percent (0 - 100) */
364 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
365 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
366 #define EC_ACPI_MEM_FAN_DUTY 0x04
369 * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
370 * independent thresholds attached to them. The current value of the ID
371 * register determines which sensor is affected by the THRESHOLD and COMMIT
372 * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
373 * as the memory-mapped sensors. The COMMIT register applies those settings.
375 * The spec does not mandate any way to read back the threshold settings
376 * themselves, but when a threshold is crossed the AP needs a way to determine
377 * which sensor(s) are responsible. Each reading of the ID register clears and
378 * returns one sensor ID that has crossed one of its threshold (in either
379 * direction) since the last read. A value of 0xFF means "no new thresholds
380 * have tripped". Setting or enabling the thresholds for a sensor will clear
381 * the unread event count for that sensor.
383 #define EC_ACPI_MEM_TEMP_ID 0x05
384 #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06
385 #define EC_ACPI_MEM_TEMP_COMMIT 0x07
387 * Here are the bits for the COMMIT register:
388 * bit 0 selects the threshold index for the chosen sensor (0/1)
389 * bit 1 enables/disables the selected threshold (0 = off, 1 = on)
390 * Each write to the commit register affects one threshold.
392 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0)
393 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1)
397 * Set the thresholds for sensor 2 to 50 C and 60 C:
398 * write 2 to [0x05] -- select temp sensor 2
399 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
400 * write 0x2 to [0x07] -- enable threshold 0 with this value
401 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
402 * write 0x3 to [0x07] -- enable threshold 1 with this value
404 * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
405 * write 2 to [0x05] -- select temp sensor 2
406 * write 0x1 to [0x07] -- disable threshold 1
409 /* DPTF battery charging current limit */
410 #define EC_ACPI_MEM_CHARGING_LIMIT 0x08
412 /* Charging limit is specified in 64 mA steps */
413 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64
414 /* Value to disable DPTF battery charging limit */
415 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff
418 * Report device orientation
420 * 4 Off Body/On Body status: 0 = Off Body.
421 * 3:1 Device DPTF Profile Number (DDPN)
422 * 0 = Reserved for backward compatibility (indicates no valid
423 * profile number. Host should fall back to using TBMD).
424 * 1..7 = DPTF Profile number to indicate to host which table needs
426 * 0 Tablet Mode Device Indicator (TBMD)
428 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
429 #define EC_ACPI_MEM_TBMD_SHIFT 0
430 #define EC_ACPI_MEM_TBMD_MASK 0x1
431 #define EC_ACPI_MEM_DDPN_SHIFT 1
432 #define EC_ACPI_MEM_DDPN_MASK 0x7
433 #define EC_ACPI_MEM_STTB_SHIFT 4
434 #define EC_ACPI_MEM_STTB_MASK 0x1
437 * Report device features. Uses the same format as the host command, except:
439 * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set
440 * of features", which is of limited interest when the system is already
441 * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since
442 * these are supported, it defaults to 0.
443 * This allows detecting the presence of this field since older versions of
444 * the EC codebase would simply return 0xff to that unknown address. Check
445 * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits
448 #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a
449 #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b
450 #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c
451 #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d
452 #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e
453 #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f
454 #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10
455 #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11
457 #define EC_ACPI_MEM_BATTERY_INDEX 0x12
460 * USB Port Power. Each bit indicates whether the corresponding USB ports' power
461 * is enabled (1) or disabled (0).
462 * bit 0 USB port ID 0
464 * bit 7 USB port ID 7
466 #define EC_ACPI_MEM_USB_PORT_POWER 0x13
469 * USB Retimer firmware update.
471 * Result of last operation AP requested
473 * bits[3:0]: USB-C port number
474 * bits[7:4]: Operation requested by AP
476 * NDA (no device attached) case:
477 * To update retimer firmware, AP needs set up TBT Alt mode.
478 * AP requests operations in this sequence:
479 * 1. Get port information about which ports support retimer firmware update.
480 * In the query result, each bit represents one port.
481 * 2. Get current MUX mode, it's NDA.
482 * 3. Suspend specified PD port's task.
483 * 4. AP requests EC to enter USB mode -> enter Safe mode -> enter TBT mode ->
484 * update firmware -> disconnect MUX -> resume PD task.
486 * DA (device attached) cases:
487 * Retimer firmware update is not supported in DA cases.
488 * 1. Get port information about which ports support retimer firmware update
489 * 2. Get current MUX mode, it's DA.
490 * 3. AP continues. No more retimer firmware update activities.
493 #define EC_ACPI_MEM_USB_RETIMER_FW_UPDATE 0x14
495 #define USB_RETIMER_FW_UPDATE_OP_SHIFT 4
496 #define USB_RETIMER_FW_UPDATE_ERR 0xfe
497 #define USB_RETIMER_FW_UPDATE_INVALID_MUX 0xff
498 /* Mask to clear unused MUX bits in retimer firmware update */
499 #define USB_RETIMER_FW_UPDATE_MUX_MASK \
500 (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | \
501 USB_PD_MUX_SAFE_MODE | USB_PD_MUX_TBT_COMPAT_ENABLED | \
502 USB_PD_MUX_USB4_ENABLED)
504 /* Retimer firmware update operations */
505 #define USB_RETIMER_FW_UPDATE_QUERY_PORT 0 /* Which ports has retimer */
506 #define USB_RETIMER_FW_UPDATE_SUSPEND_PD 1 /* Suspend PD port */
507 #define USB_RETIMER_FW_UPDATE_RESUME_PD 2 /* Resume PD port */
508 #define USB_RETIMER_FW_UPDATE_GET_MUX 3 /* Read current USB MUX */
509 #define USB_RETIMER_FW_UPDATE_SET_USB 4 /* Set MUX to USB mode */
510 #define USB_RETIMER_FW_UPDATE_SET_SAFE 5 /* Set MUX to Safe mode */
511 #define USB_RETIMER_FW_UPDATE_SET_TBT 6 /* Set MUX to TBT mode */
512 #define USB_RETIMER_FW_UPDATE_DISCONNECT 7 /* Set MUX to disconnect */
514 #define EC_ACPI_MEM_USB_RETIMER_PORT(x) ((x)&0x0f)
515 #define EC_ACPI_MEM_USB_RETIMER_OP(x) \
516 (((x)&0xf0) >> USB_RETIMER_FW_UPDATE_OP_SHIFT)
519 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
520 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
522 #define EC_ACPI_MEM_MAPPED_BEGIN 0x20
523 #define EC_ACPI_MEM_MAPPED_SIZE 0xe0
525 /* Current version of ACPI memory address space */
526 #define EC_ACPI_MEM_VERSION_CURRENT 2
529 * This header file is used in coreboot both in C and ACPI code. The ACPI code
530 * is pre-processed to handle constants but the ASL compiler is unable to
531 * handle actual C code so keep it separate.
537 * Define __packed if someone hasn't beat us to it. Linux kernel style
538 * checking prefers __packed over __attribute__((packed)).
541 #define __packed __attribute__((packed))
545 #define __aligned(x) __attribute__((aligned(x)))
547 #endif /* __KERNEL__ */
550 * Attributes for EC request and response packets. Just defining __packed
551 * results in inefficient assembly code on ARM, if the structure is actually
552 * 32-bit aligned, as it should be for all buffers.
554 * Be very careful when adding these to existing structures. They will round
555 * up the structure size to the specified boundary.
557 * Also be very careful to make that if a structure is included in some other
558 * parent structure that the alignment will still be true given the packing of
559 * the parent structure. This is particularly important if the sub-structure
560 * will be passed as a pointer to another function, since that function will
561 * not know about the misalignment caused by the parent structure's packing.
563 * Also be very careful using __packed - particularly when nesting non-packed
564 * structures inside packed ones. In fact, DO NOT use __packed directly;
565 * always use one of these attributes.
567 * Once everything is annotated properly, the following search strings should
568 * not return ANY matches in this file other than right here:
570 * "__packed" - generates inefficient code; all sub-structs must also be packed
572 * "struct [^_]" - all structs should be annotated, except for structs that are
573 * members of other structs/unions (and their original declarations should be
576 #ifdef CONFIG_HOSTCMD_ALIGNED
579 * Packed structures where offset and size are always aligned to 1, 2, or 4
582 #define __ec_align1 __packed
583 #define __ec_align2 __packed __aligned(2)
584 #define __ec_align4 __packed __aligned(4)
587 * Packed structure which must be under-aligned, because its size is not a
588 * 4-byte multiple. This is sub-optimal because it forces byte-wise access
589 * of all multi-byte fields in it, even though they are themselves aligned.
591 * In theory, we could duplicate the structure with __aligned(4) for accessing
592 * its members, but use the __packed version for sizeof().
594 #define __ec_align_size1 __packed
597 * Packed structure which must be under-aligned, because its offset inside a
598 * parent structure is not a 4-byte multiple.
600 #define __ec_align_offset1 __packed
601 #define __ec_align_offset2 __packed __aligned(2)
604 * Structures which are complicated enough that I'm skipping them on the first
605 * pass. They are effectively unchanged from their previous definitions.
607 * TODO(rspangler): Figure out what to do with these. It's likely necessary
608 * to work out the size and offset of each member and add explicit padding to
611 #define __ec_todo_packed __packed
612 #define __ec_todo_unpacked
614 #else /* !CONFIG_HOSTCMD_ALIGNED */
617 * Packed structures make no assumption about alignment, so they do inefficient
620 #define __ec_align1 __packed
621 #define __ec_align2 __packed
622 #define __ec_align4 __packed
623 #define __ec_align_size1 __packed
624 #define __ec_align_offset1 __packed
625 #define __ec_align_offset2 __packed
626 #define __ec_todo_packed __packed
627 #define __ec_todo_unpacked
629 #endif /* !CONFIG_HOSTCMD_ALIGNED */
631 /* LPC command status byte masks */
632 /* EC has written a byte in the data register and host hasn't read it yet */
633 #define EC_LPC_STATUS_TO_HOST 0x01
634 /* Host has written a command/data byte and the EC hasn't read it yet */
635 #define EC_LPC_STATUS_FROM_HOST 0x02
636 /* EC is processing a command */
637 #define EC_LPC_STATUS_PROCESSING 0x04
638 /* Last write to EC was a command, not data */
639 #define EC_LPC_STATUS_LAST_CMD 0x08
640 /* EC is in burst mode */
641 #define EC_LPC_STATUS_BURST_MODE 0x10
642 /* SCI event is pending (requesting SCI query) */
643 #define EC_LPC_STATUS_SCI_PENDING 0x20
644 /* SMI event is pending (requesting SMI query) */
645 #define EC_LPC_STATUS_SMI_PENDING 0x40
647 #define EC_LPC_STATUS_RESERVED 0x80
650 * EC is busy. This covers both the EC processing a command, and the host has
651 * written a new command but the EC hasn't picked it up yet.
653 #define EC_LPC_STATUS_BUSY_MASK \
654 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
657 * Host command response codes (16-bit).
661 EC_RES_INVALID_COMMAND
= 1,
663 EC_RES_INVALID_PARAM
= 3,
664 EC_RES_ACCESS_DENIED
= 4,
665 EC_RES_INVALID_RESPONSE
= 5,
666 EC_RES_INVALID_VERSION
= 6,
667 EC_RES_INVALID_CHECKSUM
= 7,
668 EC_RES_IN_PROGRESS
= 8, /* Accepted, command in progress */
669 EC_RES_UNAVAILABLE
= 9, /* No response available */
670 EC_RES_TIMEOUT
= 10, /* We got a timeout */
671 EC_RES_OVERFLOW
= 11, /* Table / data overflow */
672 EC_RES_INVALID_HEADER
= 12, /* Header contains invalid data */
673 EC_RES_REQUEST_TRUNCATED
= 13, /* Didn't get the entire request */
674 EC_RES_RESPONSE_TOO_BIG
= 14, /* Response was too big to handle */
675 EC_RES_BUS_ERROR
= 15, /* Communications bus error */
676 EC_RES_BUSY
= 16, /* Up but too busy. Should retry */
677 EC_RES_INVALID_HEADER_VERSION
= 17, /* Header version invalid */
678 EC_RES_INVALID_HEADER_CRC
= 18, /* Header CRC invalid */
679 EC_RES_INVALID_DATA_CRC
= 19, /* Data CRC invalid */
680 EC_RES_DUP_UNAVAILABLE
= 20, /* Can't resend response */
682 EC_RES_MAX
= UINT16_MAX
, /**< Force enum to be 16 bits */
684 BUILD_ASSERT(sizeof(enum ec_status
) == sizeof(uint16_t));
687 * Host event codes. ACPI query EC command uses code 0 to mean "no event
688 * pending". We explicitly specify each value in the enum listing so they won't
689 * change if we delete/insert an item or rearrange the list (it needs to be
690 * stable across platforms, not just within a single compiled instance).
692 enum host_event_code
{
693 EC_HOST_EVENT_NONE
= 0,
694 EC_HOST_EVENT_LID_CLOSED
= 1,
695 EC_HOST_EVENT_LID_OPEN
= 2,
696 EC_HOST_EVENT_POWER_BUTTON
= 3,
697 EC_HOST_EVENT_AC_CONNECTED
= 4,
698 EC_HOST_EVENT_AC_DISCONNECTED
= 5,
699 EC_HOST_EVENT_BATTERY_LOW
= 6,
700 EC_HOST_EVENT_BATTERY_CRITICAL
= 7,
701 EC_HOST_EVENT_BATTERY
= 8,
702 EC_HOST_EVENT_THERMAL_THRESHOLD
= 9,
703 /* Event generated by a device attached to the EC */
704 EC_HOST_EVENT_DEVICE
= 10,
705 EC_HOST_EVENT_THERMAL
= 11,
706 /* GPU related event. Formerly named EC_HOST_EVENT_USB_CHARGER. */
707 EC_HOST_EVENT_GPU
= 12,
708 EC_HOST_EVENT_KEY_PRESSED
= 13,
710 * EC has finished initializing the host interface. The host can check
711 * for this event following sending a EC_CMD_REBOOT_EC command to
712 * determine when the EC is ready to accept subsequent commands.
714 EC_HOST_EVENT_INTERFACE_READY
= 14,
715 /* Keyboard recovery combo has been pressed */
716 EC_HOST_EVENT_KEYBOARD_RECOVERY
= 15,
718 /* Shutdown due to thermal overload */
719 EC_HOST_EVENT_THERMAL_SHUTDOWN
= 16,
720 /* Shutdown due to battery level too low */
721 EC_HOST_EVENT_BATTERY_SHUTDOWN
= 17,
723 /* Suggest that the AP throttle itself */
724 EC_HOST_EVENT_THROTTLE_START
= 18,
725 /* Suggest that the AP resume normal speed */
726 EC_HOST_EVENT_THROTTLE_STOP
= 19,
728 /* Hang detect logic detected a hang and host event timeout expired */
729 EC_HOST_EVENT_HANG_DETECT
= 20,
730 /* Hang detect logic detected a hang and warm rebooted the AP */
731 EC_HOST_EVENT_HANG_REBOOT
= 21,
733 /* PD MCU triggering host event */
734 EC_HOST_EVENT_PD_MCU
= 22,
736 /* Battery Status flags have changed */
737 EC_HOST_EVENT_BATTERY_STATUS
= 23,
739 /* EC encountered a panic, triggering a reset */
740 EC_HOST_EVENT_PANIC
= 24,
742 /* Keyboard fastboot combo has been pressed */
743 EC_HOST_EVENT_KEYBOARD_FASTBOOT
= 25,
745 /* EC RTC event occurred */
746 EC_HOST_EVENT_RTC
= 26,
748 /* Emulate MKBP event */
749 EC_HOST_EVENT_MKBP
= 27,
751 /* EC desires to change state of host-controlled USB mux */
752 EC_HOST_EVENT_USB_MUX
= 28,
755 * The device has changed "modes". This can be one of the following:
757 * - TABLET/LAPTOP mode
758 * - detachable base attach/detach event
759 * - on body/off body transition event
761 EC_HOST_EVENT_MODE_CHANGE
= 29,
763 /* Keyboard recovery combo with hardware reinitialization */
764 EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT
= 30,
767 EC_HOST_EVENT_WOV
= 31,
770 * The high bit of the event mask is not used as a host event code. If
771 * it reads back as set, then the entire event mask should be
772 * considered invalid by the host. This can happen when reading the
773 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
774 * not initialized on the EC, or improperly configured on the host.
776 EC_HOST_EVENT_INVALID
= 32,
778 /* Host event mask */
779 #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code)-1)
781 /* clang-format off */
782 #define HOST_EVENT_TEXT \
784 [EC_HOST_EVENT_NONE] = "NONE", \
785 [EC_HOST_EVENT_LID_CLOSED] = "LID_CLOSED", \
786 [EC_HOST_EVENT_LID_OPEN] = "LID_OPEN", \
787 [EC_HOST_EVENT_POWER_BUTTON] = "POWER_BUTTON", \
788 [EC_HOST_EVENT_AC_CONNECTED] = "AC_CONNECTED", \
789 [EC_HOST_EVENT_AC_DISCONNECTED] = "AC_DISCONNECTED", \
790 [EC_HOST_EVENT_BATTERY_LOW] = "BATTERY_LOW", \
791 [EC_HOST_EVENT_BATTERY_CRITICAL] = "BATTERY_CRITICAL", \
792 [EC_HOST_EVENT_BATTERY] = "BATTERY", \
793 [EC_HOST_EVENT_THERMAL_THRESHOLD] = "THERMAL_THRESHOLD", \
794 [EC_HOST_EVENT_DEVICE] = "DEVICE", \
795 [EC_HOST_EVENT_THERMAL] = "THERMAL", \
796 [EC_HOST_EVENT_GPU] = "GPU", \
797 [EC_HOST_EVENT_KEY_PRESSED] = "KEY_PRESSED", \
798 [EC_HOST_EVENT_INTERFACE_READY] = "INTERFACE_READY", \
799 [EC_HOST_EVENT_KEYBOARD_RECOVERY] = "KEYBOARD_RECOVERY", \
800 [EC_HOST_EVENT_THERMAL_SHUTDOWN] = "THERMAL_SHUTDOWN", \
801 [EC_HOST_EVENT_BATTERY_SHUTDOWN] = "BATTERY_SHUTDOWN", \
802 [EC_HOST_EVENT_THROTTLE_START] = "THROTTLE_START", \
803 [EC_HOST_EVENT_THROTTLE_STOP] = "THROTTLE_STOP", \
804 [EC_HOST_EVENT_HANG_DETECT] = "HANG_DETECT", \
805 [EC_HOST_EVENT_HANG_REBOOT] = "HANG_REBOOT", \
806 [EC_HOST_EVENT_PD_MCU] = "PD_MCU", \
807 [EC_HOST_EVENT_BATTERY_STATUS] = "BATTERY_STATUS", \
808 [EC_HOST_EVENT_PANIC] = "PANIC", \
809 [EC_HOST_EVENT_KEYBOARD_FASTBOOT] = "KEYBOARD_FASTBOOT", \
810 [EC_HOST_EVENT_RTC] = "RTC", \
811 [EC_HOST_EVENT_MKBP] = "MKBP", \
812 [EC_HOST_EVENT_USB_MUX] = "USB_MUX", \
813 [EC_HOST_EVENT_MODE_CHANGE] = "MODE_CHANGE", \
814 [EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT] = \
815 "KEYBOARD_RECOVERY_HW_REINIT", \
816 [EC_HOST_EVENT_WOV] = "WOV", \
817 [EC_HOST_EVENT_INVALID] = "INVALID", \
819 /* clang-format on */
822 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS
823 * @flags: The host argument flags.
824 * @command_version: Command version.
825 * @data_size: The length of data.
826 * @checksum: Checksum; sum of command + flags + command_version + data_size +
827 * all params/response data bytes.
829 struct ec_lpc_host_args
{
831 uint8_t command_version
;
836 /* Flags for ec_lpc_host_args.flags */
838 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
841 * If EC gets a command and this flag is not set, this is an old-style command.
842 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
843 * unknown length. EC must respond with an old-style response (that is,
844 * without setting EC_HOST_ARGS_FLAG_TO_HOST).
846 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
848 * Args are from EC. Data area at EC_LPC_ADDR_HOST_PARAM contains response.
850 * If EC responds to a command and this flag is not set, this is an old-style
851 * response. Command version is 0 and response data from EC is at
852 * EC_LPC_ADDR_OLD_PARAM with unknown length.
854 #define EC_HOST_ARGS_FLAG_TO_HOST 0x02
856 /*****************************************************************************/
858 * Byte codes returned by EC over SPI interface.
860 * These can be used by the AP to debug the EC interface, and to determine
861 * when the EC is not in a state where it will ever get around to responding
864 * Example of sequence of bytes read from EC for a current good transfer:
865 * 1. - - AP asserts chip select (CS#)
866 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
867 * 3. - - EC starts handling CS# interrupt
868 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
869 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
870 * bytes looking for EC_SPI_FRAME_START
871 * 6. - - EC finishes processing and sets up response
872 * 7. EC_SPI_FRAME_START - AP reads frame byte
873 * 8. (response packet) - AP reads response packet
874 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
875 * 10 - - AP deasserts chip select
876 * 11 - - EC processes CS# interrupt and sets up DMA for
879 * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
880 * the following byte values:
886 * Then the EC found an error in the request, or was not ready for the request
887 * and lost data. The AP should give up waiting for EC_SPI_FRAME_START,
888 * because the EC is unable to tell when the AP is done sending its request.
892 * Framing byte which precedes a response packet from the EC. After sending a
893 * request, the AP will clock in bytes until it sees the framing byte, then
894 * clock in the response packet.
896 #define EC_SPI_FRAME_START 0xec
899 * Padding bytes which are clocked out after the end of a response packet.
901 #define EC_SPI_PAST_END 0xed
904 * EC is ready to receive, and has ignored the byte sent by the AP. EC expects
905 * that the AP will send a valid packet header (starting with
906 * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
908 * NOTE: Some SPI configurations place the Most Significant Bit on SDO when
909 * CS goes low. This macro has the Most Significant Bit set to zero,
910 * so SDO will not be driven high when CS goes low.
912 #define EC_SPI_RX_READY 0x78
915 * EC has started receiving the request from the AP, but hasn't started
918 #define EC_SPI_RECEIVING 0xf9
920 /* EC has received the entire request from the AP and is processing it. */
921 #define EC_SPI_PROCESSING 0xfa
924 * EC received bad data from the AP, such as a packet header with an invalid
925 * length. EC will ignore all data until chip select deasserts.
927 #define EC_SPI_RX_BAD_DATA 0xfb
930 * EC received data from the AP before it was ready. That is, the AP asserted
931 * chip select and started clocking data before the EC was ready to receive it.
932 * EC will ignore all data until chip select deasserts.
934 #define EC_SPI_NOT_READY 0xfc
937 * EC was ready to receive a request from the AP. EC has treated the byte sent
938 * by the AP as part of a request packet, or (for old-style ECs) is processing
939 * a fully received packet but is not ready to respond yet.
941 #define EC_SPI_OLD_READY 0xfd
943 /*****************************************************************************/
946 * Protocol version 2 for I2C and SPI send a request this way:
948 * 0 EC_CMD_VERSION0 + (command version)
950 * 2 Length of params = N
951 * 3..N+2 Params, if any
952 * N+3 8-bit checksum of bytes 0..N+2
954 * The corresponding response is:
956 * 0 Result code (EC_RES_*)
957 * 1 Length of params = M
958 * 2..M+1 Params, if any
959 * M+2 8-bit checksum of bytes 0..M+1
961 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
962 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
963 #define EC_PROTO2_REQUEST_OVERHEAD \
964 (EC_PROTO2_REQUEST_HEADER_BYTES + EC_PROTO2_REQUEST_TRAILER_BYTES)
966 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
967 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
968 #define EC_PROTO2_RESPONSE_OVERHEAD \
969 (EC_PROTO2_RESPONSE_HEADER_BYTES + EC_PROTO2_RESPONSE_TRAILER_BYTES)
971 /* Parameter length was limited by the LPC interface */
972 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
974 /* Maximum request and response packet sizes for protocol version 2 */
975 #define EC_PROTO2_MAX_REQUEST_SIZE \
976 (EC_PROTO2_REQUEST_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)
977 #define EC_PROTO2_MAX_RESPONSE_SIZE \
978 (EC_PROTO2_RESPONSE_OVERHEAD + EC_PROTO2_MAX_PARAM_SIZE)
980 /*****************************************************************************/
983 * Value written to legacy command port / prefix byte to indicate protocol
984 * 3+ structs are being used. Usage is bus-dependent.
986 #define EC_COMMAND_PROTOCOL_3 0xda
988 #define EC_HOST_REQUEST_VERSION 3
991 * struct ec_host_request - Version 3 request from host.
992 * @struct_version: Should be 3. The EC will return EC_RES_INVALID_HEADER if it
993 * receives a header with a version it doesn't know how to
995 * @checksum: Checksum of request and data; sum of all bytes including checksum
997 * @command: Command to send (EC_CMD_...)
998 * @command_version: Command version.
999 * @reserved: Unused byte in current protocol version; set to 0.
1000 * @data_len: Length of data which follows this header.
1002 struct ec_host_request
{
1003 uint8_t struct_version
;
1006 uint8_t command_version
;
1011 #define EC_HOST_RESPONSE_VERSION 3
1014 * struct ec_host_response - Version 3 response from EC.
1015 * @struct_version: Struct version (=3).
1016 * @checksum: Checksum of response and data; sum of all bytes including
1017 * checksum should total to 0.
1018 * @result: EC's response to the command (separate from communication failure)
1019 * @data_len: Length of data which follows this header.
1020 * @reserved: Unused bytes in current protocol version; set to 0.
1022 struct ec_host_response
{
1023 uint8_t struct_version
;
1030 /*****************************************************************************/
1033 * Host command protocol V4.
1035 * Packets always start with a request or response header. They are followed
1036 * by data_len bytes of data. If the data_crc_present flag is set, the data
1037 * bytes are followed by a CRC-8 of that data, using x^8 + x^2 + x + 1
1040 * Host algorithm when sending a request q:
1042 * 101) tries_left=(some value, e.g. 3);
1045 * 104) Calculate q.header_crc.
1046 * 105) Send request q to EC.
1047 * 106) Wait for response r. Go to 201 if received or 301 if timeout.
1049 * 201) If r.struct_version != 4, go to 301.
1050 * 202) If r.header_crc mismatches calculated CRC for r header, go to 301.
1051 * 203) If r.data_crc_present and r.data_crc mismatches, go to 301.
1052 * 204) If r.seq_num != q.seq_num, go to 301.
1053 * 205) If r.seq_dup == q.seq_dup, return success.
1054 * 207) If r.seq_dup == 1, go to 301.
1055 * 208) Return error.
1057 * 301) If --tries_left <= 0, return error.
1058 * 302) If q.seq_dup == 1, go to 105.
1059 * 303) q.seq_dup = 1
1062 * EC algorithm when receiving a request q.
1063 * EC has response buffer r, error buffer e.
1065 * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION
1067 * 102) If q.header_crc mismatches calculated CRC, set e.result =
1068 * EC_RES_INVALID_HEADER_CRC and go to 301
1069 * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC
1070 * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC
1072 * 104) If q.seq_dup == 0, go to 201.
1073 * 105) If q.seq_num != r.seq_num, go to 201.
1074 * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203.
1076 * 201) Process request q into response r.
1077 * 202) r.seq_num = q.seq_num
1078 * 203) r.seq_dup = q.seq_dup
1079 * 204) Calculate r.header_crc
1080 * 205) If r.data_len > 0 and data is no longer available, set e.result =
1081 * EC_RES_DUP_UNAVAILABLE and go to 301.
1082 * 206) Send response r.
1084 * 301) e.seq_num = q.seq_num
1085 * 302) e.seq_dup = q.seq_dup
1086 * 303) Calculate e.header_crc.
1087 * 304) Send error response e.
1090 /* Version 4 request from host */
1091 struct ec_host_request4
{
1093 * bits 0-3: struct_version: Structure version (=4)
1094 * bit 4: is_response: Is response (=0)
1095 * bits 5-6: seq_num: Sequence number
1096 * bit 7: seq_dup: Sequence duplicate flag
1101 * bits 0-4: command_version: Command version
1102 * bits 5-6: Reserved (set 0, ignore on read)
1103 * bit 7: data_crc_present: Is data CRC present after data
1107 /* Command code (EC_CMD_*) */
1110 /* Length of data which follows this header (not including data CRC) */
1113 /* Reserved (set 0, ignore on read) */
1116 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
1120 /* Version 4 response from EC */
1121 struct ec_host_response4
{
1123 * bits 0-3: struct_version: Structure version (=4)
1124 * bit 4: is_response: Is response (=1)
1125 * bits 5-6: seq_num: Sequence number
1126 * bit 7: seq_dup: Sequence duplicate flag
1131 * bits 0-6: Reserved (set 0, ignore on read)
1132 * bit 7: data_crc_present: Is data CRC present after data
1136 /* Result code (EC_RES_*) */
1139 /* Length of data which follows this header (not including data CRC) */
1142 /* Reserved (set 0, ignore on read) */
1145 /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */
1149 /* Fields in fields0 byte */
1150 #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f
1151 #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10
1152 #define EC_PACKET4_0_SEQ_NUM_SHIFT 5
1153 #define EC_PACKET4_0_SEQ_NUM_MASK 0x60
1154 #define EC_PACKET4_0_SEQ_DUP_MASK 0x80
1156 /* Fields in fields1 byte */
1157 #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */
1158 #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80
1160 /*****************************************************************************/
1162 * Notes on commands:
1164 * Each command is an 16-bit command value. Commands which take params or
1165 * return response data specify structures for that data. If no structure is
1166 * specified, the command does not input or output data, respectively.
1167 * Parameter/response length is implicit in the structs. Some underlying
1168 * communication protocols (I2C, SPI) may add length or checksum headers, but
1169 * those are implementation-dependent and not defined here.
1171 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
1172 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
1175 /*****************************************************************************/
1176 /* General / test commands */
1179 * Get protocol version, used to deal with non-backward compatible protocol
1182 #define EC_CMD_PROTO_VERSION 0x0000
1185 * struct ec_response_proto_version - Response to the proto version command.
1186 * @version: The protocol version.
1188 struct ec_response_proto_version
{
1193 * Hello. This is a simple command to test the EC is responsive to
1196 #define EC_CMD_HELLO 0x0001
1199 * struct ec_params_hello - Parameters to the hello command.
1200 * @in_data: Pass anything here.
1202 struct ec_params_hello
{
1207 * struct ec_response_hello - Response to the hello command.
1208 * @out_data: Output will be in_data + 0x01020304.
1210 struct ec_response_hello
{
1214 /* Get version number */
1215 #define EC_CMD_GET_VERSION 0x0002
1218 EC_IMAGE_UNKNOWN
= 0,
1221 EC_IMAGE_RW_A
= EC_IMAGE_RW
,
1227 * struct ec_response_get_version - Response to the v0 get version command.
1228 * @version_string_ro: Null-terminated RO firmware version string.
1229 * @version_string_rw: Null-terminated RW firmware version string.
1230 * @reserved: Unused bytes; was previously RW-B firmware version string.
1231 * @current_image: One of ec_image.
1233 struct ec_response_get_version
{
1234 char version_string_ro
[32];
1235 char version_string_rw
[32];
1236 char reserved
[32]; /* Changed to cros_fwid_ro in version 1 */
1237 uint32_t current_image
;
1241 * struct ec_response_get_version_v1 - Response to the v1 get version command.
1243 * ec_response_get_version_v1 is a strict superset of ec_response_get_version.
1244 * The v1 response changes the semantics of one field (reserved to cros_fwid_ro)
1245 * and adds one additional field (cros_fwid_rw).
1247 * @version_string_ro: Null-terminated RO firmware version string.
1248 * @version_string_rw: Null-terminated RW firmware version string.
1249 * @cros_fwid_ro: Null-terminated RO CrOS FWID string.
1250 * @current_image: One of ec_image.
1251 * @cros_fwid_rw: Null-terminated RW CrOS FWID string.
1253 struct ec_response_get_version_v1
{
1254 char version_string_ro
[32];
1255 char version_string_rw
[32];
1256 char cros_fwid_ro
[32]; /* Added in version 1 (Used to be reserved) */
1257 uint32_t current_image
;
1258 char cros_fwid_rw
[32]; /* Added in version 1 */
1261 /* Read test - DEPRECATED */
1262 #define EC_CMD_READ_TEST 0x0003
1265 * Get build information
1267 * Response is null-terminated string.
1269 #define EC_CMD_GET_BUILD_INFO 0x0004
1272 #define EC_CMD_GET_CHIP_INFO 0x0005
1275 * struct ec_response_get_chip_info - Response to the get chip info command.
1276 * @vendor: Null-terminated string for chip vendor.
1277 * @name: Null-terminated string for chip name.
1278 * @revision: Null-terminated string for chip mask version.
1280 struct ec_response_get_chip_info
{
1286 /* Get board HW version */
1287 #define EC_CMD_GET_BOARD_VERSION 0x0006
1290 * struct ec_response_board_version - Response to the board version command.
1291 * @board_version: A monotonously incrementing number.
1293 struct ec_response_board_version
{
1294 uint16_t board_version
;
1298 * Read memory-mapped data.
1300 * This is an alternate interface to memory-mapped data for bus protocols
1301 * which don't support direct-mapped memory - I2C, SPI, etc.
1303 * Response is params.size bytes of data.
1305 #define EC_CMD_READ_MEMMAP 0x0007
1308 * struct ec_params_read_memmap - Parameters for the read memory map command.
1309 * @offset: Offset in memmap (EC_MEMMAP_*).
1310 * @size: Size to read in bytes.
1312 struct ec_params_read_memmap
{
1317 /* Read versions supported for a command */
1318 #define EC_CMD_GET_CMD_VERSIONS 0x0008
1321 * struct ec_params_get_cmd_versions - Parameters for the get command versions.
1322 * @cmd: Command to check.
1324 struct ec_params_get_cmd_versions
{
1329 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command
1331 * @cmd: Command to check.
1333 struct ec_params_get_cmd_versions_v1
{
1338 * struct ec_response_get_cmd_version - Response to the get command versions.
1339 * @version_mask: Mask of supported versions; use EC_VER_MASK() to compare with
1340 * a desired version.
1342 struct ec_response_get_cmd_versions
{
1343 uint32_t version_mask
;
1347 * Check EC communications status (busy). This is needed on i2c/spi but not
1348 * on lpc since it has its own out-of-band busy indicator.
1350 * lpc must read the status from the command register. Attempting this on
1351 * lpc will overwrite the args/parameter space and corrupt its data.
1353 #define EC_CMD_GET_COMMS_STATUS 0x0009
1355 /* Avoid using ec_status which is for return values */
1356 enum ec_comms_status
{
1357 EC_COMMS_STATUS_PROCESSING
= BIT(0), /* Processing cmd */
1361 * struct ec_response_get_comms_status - Response to the get comms status
1363 * @flags: Mask of enum ec_comms_status.
1365 struct ec_response_get_comms_status
{
1366 uint32_t flags
; /* Mask of enum ec_comms_status */
1369 /* Fake a variety of responses, purely for testing purposes. */
1370 #define EC_CMD_TEST_PROTOCOL 0x000A
1372 /* Tell the EC what to send back to us. */
1373 struct ec_params_test_protocol
{
1379 /* Here it comes... */
1380 struct ec_response_test_protocol
{
1384 /* Get protocol information */
1385 #define EC_CMD_GET_PROTOCOL_INFO 0x000B
1387 /* Flags for ec_response_get_protocol_info.flags */
1388 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
1389 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0)
1392 * struct ec_response_get_protocol_info - Response to the get protocol info.
1393 * @protocol_versions: Bitmask of protocol versions supported (1 << n means
1395 * @max_request_packet_size: Maximum request packet size in bytes.
1396 * @max_response_packet_size: Maximum response packet size in bytes.
1397 * @flags: see EC_PROTOCOL_INFO_*
1399 struct ec_response_get_protocol_info
{
1400 /* Fields which exist if at least protocol version 3 supported */
1401 uint32_t protocol_versions
;
1402 uint16_t max_request_packet_size
;
1403 uint16_t max_response_packet_size
;
1407 /*****************************************************************************/
1408 /* Get/Set miscellaneous values */
1410 /* The upper byte of .flags tells what to do (nothing means "get") */
1411 #define EC_GSV_SET 0x80000000
1414 * The lower three bytes of .flags identifies the parameter, if that has
1415 * meaning for an individual command.
1417 #define EC_GSV_PARAM_MASK 0x00ffffff
1419 struct ec_params_get_set_value
{
1424 struct ec_response_get_set_value
{
1429 /* More than one command can use these structs to get/set parameters. */
1430 #define EC_CMD_GSV_PAUSE_IN_S5 0x000C
1432 /*****************************************************************************/
1433 /* List the features supported by the firmware */
1434 #define EC_CMD_GET_FEATURES 0x000D
1436 /* Supported features */
1437 enum ec_feature_code
{
1439 * This image contains a limited set of features. Another image
1440 * in RW partition may support more features.
1442 EC_FEATURE_LIMITED
= 0,
1444 * Commands for probing/reading/writing/erasing the flash in the
1447 EC_FEATURE_FLASH
= 1,
1449 * Can control the fan speed directly.
1451 EC_FEATURE_PWM_FAN
= 2,
1453 * Can control the intensity of the keyboard backlight.
1455 EC_FEATURE_PWM_KEYB
= 3,
1457 * Support Google lightbar, introduced on Pixel.
1459 EC_FEATURE_LIGHTBAR
= 4,
1460 /* Control of LEDs */
1462 /* Exposes an interface to control gyro and sensors.
1463 * The host goes through the EC to access these sensors.
1464 * In addition, the EC may provide composite sensors, like lid angle.
1466 EC_FEATURE_MOTION_SENSE
= 6,
1467 /* The keyboard is controlled by the EC */
1468 EC_FEATURE_KEYB
= 7,
1469 /* The AP can use part of the EC flash as persistent storage. */
1470 EC_FEATURE_PSTORE
= 8,
1471 /* The EC monitors BIOS port 80h, and can return POST codes. */
1472 EC_FEATURE_PORT80
= 9,
1474 * Thermal management: include TMP specific commands.
1475 * Higher level than direct fan control.
1477 EC_FEATURE_THERMAL
= 10,
1478 /* Can switch the screen backlight on/off */
1479 EC_FEATURE_BKLIGHT_SWITCH
= 11,
1480 /* Can switch the wifi module on/off */
1481 EC_FEATURE_WIFI_SWITCH
= 12,
1482 /* Monitor host events, through for example SMI or SCI */
1483 EC_FEATURE_HOST_EVENTS
= 13,
1484 /* The EC exposes GPIO commands to control/monitor connected devices. */
1485 EC_FEATURE_GPIO
= 14,
1486 /* The EC can send i2c messages to downstream devices. */
1487 EC_FEATURE_I2C
= 15,
1488 /* Command to control charger are included */
1489 EC_FEATURE_CHARGER
= 16,
1490 /* Simple battery support. */
1491 EC_FEATURE_BATTERY
= 17,
1493 * Support Smart battery protocol
1494 * (Common Smart Battery System Interface Specification)
1496 EC_FEATURE_SMART_BATTERY
= 18,
1497 /* EC can detect when the host hangs. */
1498 EC_FEATURE_HANG_DETECT
= 19,
1499 /* Report power information, for pit only */
1500 EC_FEATURE_PMU
= 20,
1501 /* Another Cros EC device is present downstream of this one */
1502 EC_FEATURE_SUB_MCU
= 21,
1503 /* Support USB Power delivery (PD) commands */
1504 EC_FEATURE_USB_PD
= 22,
1505 /* Control USB multiplexer, for audio through USB port for instance. */
1506 EC_FEATURE_USB_MUX
= 23,
1507 /* Motion Sensor code has an internal software FIFO */
1508 EC_FEATURE_MOTION_SENSE_FIFO
= 24,
1509 /* Support temporary secure vstore */
1510 EC_FEATURE_VSTORE
= 25,
1511 /* EC decides on USB-C SS mux state, muxes configured by host */
1512 EC_FEATURE_USBC_SS_MUX_VIRTUAL
= 26,
1513 /* EC has RTC feature that can be controlled by host commands */
1514 EC_FEATURE_RTC
= 27,
1515 /* The MCU exposes a Fingerprint sensor */
1516 EC_FEATURE_FINGERPRINT
= 28,
1517 /* The MCU exposes a Touchpad */
1518 EC_FEATURE_TOUCHPAD
= 29,
1519 /* The MCU has RWSIG task enabled */
1520 EC_FEATURE_RWSIG
= 30,
1521 /* EC has device events support */
1522 EC_FEATURE_DEVICE_EVENT
= 31,
1523 /* EC supports the unified wake masks for LPC/eSPI systems */
1524 EC_FEATURE_UNIFIED_WAKE_MASKS
= 32,
1525 /* EC supports 64-bit host events */
1526 EC_FEATURE_HOST_EVENT64
= 33,
1527 /* EC runs code in RAM (not in place, a.k.a. XIP) */
1528 EC_FEATURE_EXEC_IN_RAM
= 34,
1529 /* EC supports CEC commands */
1530 EC_FEATURE_CEC
= 35,
1531 /* EC supports tight sensor timestamping. */
1532 EC_FEATURE_MOTION_SENSE_TIGHT_TIMESTAMPS
= 36,
1534 * EC supports tablet mode detection aligned to Chrome and allows
1535 * setting of threshold by host command using
1536 * MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE.
1538 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS
= 37,
1540 * Early Firmware Selection ver.2. Enabled by CONFIG_VBOOT_EFS2.
1541 * Note this is a RO feature. So, a query (EC_CMD_GET_FEATURES) should
1542 * be sent to RO to be precise.
1544 EC_FEATURE_EFS2
= 38,
1545 /* The MCU is a System Companion Processor (SCP). */
1546 EC_FEATURE_SCP
= 39,
1547 /* The MCU is an Integrated Sensor Hub */
1548 EC_FEATURE_ISH
= 40,
1549 /* New TCPMv2 TYPEC_ prefaced commands supported */
1550 EC_FEATURE_TYPEC_CMD
= 41,
1552 * The EC will wait for direction from the AP to enter Type-C alternate
1555 EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY
= 42,
1557 * The EC will wait for an acknowledge from the AP after setting the
1560 EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK
= 43,
1562 * The EC supports entering and residing in S4.
1564 EC_FEATURE_S4_RESIDENCY
= 44,
1566 * The EC supports the AP directing mux sets for the board.
1568 EC_FEATURE_TYPEC_AP_MUX_SET
= 45,
1570 * The EC supports the AP composing VDMs for us to send.
1572 EC_FEATURE_TYPEC_AP_VDM_SEND
= 46,
1575 #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
1576 #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32)
1578 struct ec_response_get_features
{
1582 /*****************************************************************************/
1583 /* Get the board's SKU ID from EC */
1584 #define EC_CMD_GET_SKU_ID 0x000E
1586 /* Set SKU ID from AP */
1587 #define EC_CMD_SET_SKU_ID 0x000F
1589 struct ec_sku_id_info
{
1593 /*****************************************************************************/
1594 /* Flash commands */
1596 /* Get flash info */
1597 #define EC_CMD_FLASH_INFO 0x0010
1598 #define EC_VER_FLASH_INFO 2
1601 * struct ec_response_flash_info - Response to the flash info command.
1602 * @flash_size: Usable flash size in bytes.
1603 * @write_block_size: Write block size. Write offset and size must be a
1605 * @erase_block_size: Erase block size. Erase offset and size must be a
1607 * @protect_block_size: Protection block size. Protection offset and size
1608 * must be a multiple of this.
1610 * Version 0 returns these fields.
1612 struct ec_response_flash_info
{
1613 uint32_t flash_size
;
1614 uint32_t write_block_size
;
1615 uint32_t erase_block_size
;
1616 uint32_t protect_block_size
;
1620 * Flags for version 1+ flash info command
1621 * EC flash erases bits to 0 instead of 1.
1623 #define EC_FLASH_INFO_ERASE_TO_0 BIT(0)
1626 * Flash must be selected for read/write/erase operations to succeed. This may
1627 * be necessary on a chip where write/erase can be corrupted by other board
1628 * activity, or where the chip needs to enable some sort of programming voltage,
1629 * or where the read/write/erase operations require cleanly suspending other
1630 * chip functionality.
1632 #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1)
1635 * struct ec_response_flash_info_1 - Response to the flash info v1 command.
1636 * @flash_size: Usable flash size in bytes.
1637 * @write_block_size: Write block size. Write offset and size must be a
1639 * @erase_block_size: Erase block size. Erase offset and size must be a
1641 * @protect_block_size: Protection block size. Protection offset and size
1642 * must be a multiple of this.
1643 * @write_ideal_size: Ideal write size in bytes. Writes will be fastest if
1644 * size is exactly this and offset is a multiple of this.
1645 * For example, an EC may have a write buffer which can do
1646 * half-page operations if data is aligned, and a slower
1647 * word-at-a-time write mode.
1648 * @flags: Flags; see EC_FLASH_INFO_*
1650 * Version 1 returns the same initial fields as version 0, with additional
1653 * gcc anonymous structs don't seem to get along with the __packed directive;
1654 * if they did we'd define the version 0 structure as a sub-structure of this
1657 * Version 2 supports flash banks of different sizes:
1658 * The caller specified the number of banks it has preallocated
1660 * The EC returns the number of banks describing the flash memory.
1661 * It adds banks descriptions up to num_banks_desc.
1663 struct ec_response_flash_info_1
{
1664 /* Version 0 fields; see above for description */
1665 uint32_t flash_size
;
1666 uint32_t write_block_size
;
1667 uint32_t erase_block_size
;
1668 uint32_t protect_block_size
;
1670 /* Version 1 adds these fields: */
1671 uint32_t write_ideal_size
;
1675 struct ec_params_flash_info_2
{
1676 /* Number of banks to describe */
1677 uint16_t num_banks_desc
;
1678 /* Reserved; set 0; ignore on read */
1679 uint8_t reserved
[2];
1682 struct ec_flash_bank
{
1683 /* Number of sector is in this bank. */
1685 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1687 /* Minimal write size for the sectors in this bank */
1688 uint8_t write_size_exp
;
1689 /* Erase size for the sectors in this bank */
1690 uint8_t erase_size_exp
;
1691 /* Size for write protection, usually identical to erase size. */
1692 uint8_t protect_size_exp
;
1693 /* Reserved; set 0; ignore on read */
1694 uint8_t reserved
[2];
1697 struct ec_response_flash_info_2
{
1698 /* Total flash in the EC. */
1699 uint32_t flash_size
;
1700 /* Flags; see EC_FLASH_INFO_* */
1702 /* Maximum size to use to send data to write to the EC. */
1703 uint32_t write_ideal_size
;
1704 /* Number of banks present in the EC. */
1705 uint16_t num_banks_total
;
1706 /* Number of banks described in banks array. */
1707 uint16_t num_banks_desc
;
1708 struct ec_flash_bank banks
[0];
1714 * Response is params.size bytes of data.
1716 #define EC_CMD_FLASH_READ 0x0011
1719 * struct ec_params_flash_read - Parameters for the flash read command.
1720 * @offset: Byte offset to read.
1721 * @size: Size to read in bytes.
1723 struct ec_params_flash_read
{
1729 #define EC_CMD_FLASH_WRITE 0x0012
1730 #define EC_VER_FLASH_WRITE 1
1732 /* Version 0 of the flash command supported only 64 bytes of data */
1733 #define EC_FLASH_WRITE_VER0_SIZE 64
1736 * struct ec_params_flash_write - Parameters for the flash write command.
1737 * @offset: Byte offset to write.
1738 * @size: Size to write in bytes.
1739 * @data: Data to write.
1740 * @data.words32: uint32_t data to write.
1741 * @data.bytes: uint8_t data to write.
1743 struct ec_params_flash_write
{
1746 /* Followed by data to write. This union allows accessing an
1747 * underlying buffer as uint32s or uint8s for convenience.
1750 uint32_t words32
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
1751 uint8_t bytes
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
1754 BUILD_ASSERT(member_size(struct ec_params_flash_write
, data
) == 0);
1757 #define EC_CMD_FLASH_ERASE 0x0013
1760 * struct ec_params_flash_erase - Parameters for the flash erase command, v0.
1761 * @offset: Byte offset to erase.
1762 * @size: Size to erase in bytes.
1764 struct ec_params_flash_erase
{
1770 * v1 add async erase:
1771 * subcommands can returns:
1772 * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1773 * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1774 * EC_RES_ERROR : other errors.
1775 * EC_RES_BUSY : an existing erase operation is in progress.
1776 * EC_RES_ACCESS_DENIED: Trying to erase running image.
1778 * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1779 * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1780 * the proper result.
1781 * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1782 * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1783 * ERASE_GET_RESULT command may timeout on EC where flash access is not
1784 * permitted while erasing. (For instance, STM32F4).
1786 enum ec_flash_erase_cmd
{
1787 FLASH_ERASE_SECTOR
, /* Erase and wait for result */
1788 FLASH_ERASE_SECTOR_ASYNC
, /* Erase and return immediately. */
1789 FLASH_ERASE_GET_RESULT
, /* Ask for last erase result */
1793 * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1.
1794 * @cmd: One of ec_flash_erase_cmd.
1795 * @reserved: Pad byte; currently always contains 0.
1796 * @flag: No flags defined yet; set to 0.
1797 * @params: Same as v0 parameters.
1799 struct ec_params_flash_erase_v1
{
1803 struct ec_params_flash_erase params
;
1807 * Get/set flash protection.
1809 * If mask!=0, sets/clear the requested bits of flags. Depending on the
1810 * firmware write protect GPIO, not all flags will take effect immediately;
1811 * some flags require a subsequent hard reset to take effect. Check the
1812 * returned flags bits to see what actually happened.
1814 * If mask=0, simply returns the current flags state.
1816 #define EC_CMD_FLASH_PROTECT 0x0015
1817 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */
1819 /* Flags for flash protection */
1820 /* RO flash code protected when the EC boots */
1821 #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0)
1823 * RO flash code protected now. If this bit is set, at-boot status cannot
1826 #define EC_FLASH_PROTECT_RO_NOW BIT(1)
1827 /* Entire flash code protected now, until reboot. */
1828 #define EC_FLASH_PROTECT_ALL_NOW BIT(2)
1829 /* Flash write protect GPIO is asserted now */
1830 #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3)
1831 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1832 #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4)
1834 * Error - flash protection is in inconsistent state. At least one bank of
1835 * flash which should be protected is not protected. Usually fixed by
1836 * re-requesting the desired flags, or by a hard reset if that fails.
1838 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5)
1839 /* Entire flash code protected when the EC boots */
1840 #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6)
1841 /* RW flash code protected when the EC boots */
1842 #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7)
1843 /* RW flash code protected now. */
1844 #define EC_FLASH_PROTECT_RW_NOW BIT(8)
1845 /* Rollback information flash region protected when the EC boots */
1846 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
1847 /* Rollback information flash region protected now */
1848 #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
1849 /* Error - Unknown error */
1850 #define EC_FLASH_PROTECT_ERROR_UNKNOWN BIT(11)
1853 * struct ec_params_flash_protect - Parameters for the flash protect command.
1854 * @mask: Bits in flags to apply.
1855 * @flags: New flags to apply.
1857 struct ec_params_flash_protect
{
1863 * struct ec_response_flash_protect - Response to the flash protect command.
1864 * @flags: Current value of flash protect flags.
1865 * @valid_flags: Flags which are valid on this platform. This allows the
1866 * caller to distinguish between flags which aren't set vs. flags
1867 * which can't be set on this platform.
1868 * @writable_flags: Flags which can be changed given the current protection
1871 struct ec_response_flash_protect
{
1873 uint32_t valid_flags
;
1874 uint32_t writable_flags
;
1878 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1879 * write protect. These commands may be reused with version > 0.
1882 /* Get the region offset/size */
1883 #define EC_CMD_FLASH_REGION_INFO 0x0016
1884 #define EC_VER_FLASH_REGION_INFO 1
1886 enum ec_flash_region
{
1887 /* Region which holds read-only EC image */
1888 EC_FLASH_REGION_RO
= 0,
1890 * Region which holds active RW image. 'Active' is different from
1891 * 'running'. Active means 'scheduled-to-run'. Since RO image always
1892 * scheduled to run, active/non-active applies only to RW images (for
1893 * the same reason 'update' applies only to RW images. It's a state of
1894 * an image on a flash. Running image can be RO, RW_A, RW_B but active
1895 * image can only be RW_A or RW_B. In recovery mode, an active RW image
1896 * doesn't enter 'running' state but it's still active on a flash.
1898 EC_FLASH_REGION_ACTIVE
,
1900 * Region which should be write-protected in the factory (a superset of
1901 * EC_FLASH_REGION_RO)
1903 EC_FLASH_REGION_WP_RO
,
1904 /* Region which holds updatable (non-active) RW image */
1905 EC_FLASH_REGION_UPDATE
,
1906 /* Number of regions */
1907 EC_FLASH_REGION_COUNT
,
1910 * 'RW' is vague if there are multiple RW images; we mean the active one,
1911 * so the old constant is deprecated.
1913 #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE
1916 * struct ec_params_flash_region_info - Parameters for the flash region info
1918 * @region: Flash region; see EC_FLASH_REGION_*
1920 struct ec_params_flash_region_info
{
1924 struct ec_response_flash_region_info
{
1929 /* Get SPI flash information */
1930 #define EC_CMD_FLASH_SPI_INFO 0x0018
1932 struct ec_response_flash_spi_info
{
1933 /* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1936 /* Pad byte; currently always contains 0 */
1939 /* Manufacturer / device ID from command 0x90 */
1940 uint8_t mfr_dev_id
[2];
1942 /* Status registers from command 0x05 and 0x35 */
1946 /* Select flash during flash operations */
1947 #define EC_CMD_FLASH_SELECT 0x0019
1950 * struct ec_params_flash_select - Parameters for the flash select command.
1951 * @select: 1 to select flash, 0 to deselect flash
1953 struct ec_params_flash_select
{
1958 * Request random numbers to be generated and returned.
1959 * Can be used to test the random number generator is truly random.
1960 * See https://csrc.nist.gov/publications/detail/sp/800-22/rev-1a/final and
1961 * https://webhome.phy.duke.edu/~rgb/General/dieharder.php.
1963 #define EC_CMD_RAND_NUM 0x001A
1964 #define EC_VER_RAND_NUM 0
1966 struct ec_params_rand_num
{
1967 uint16_t num_rand_bytes
; /**< num random bytes to generate */
1970 struct ec_response_rand_num
{
1972 * generated random numbers in the range of 1 to EC_MAX_INSIZE. The true
1973 * size of rand is determined by ec_params_rand_num's num_rand_bytes.
1975 uint8_t rand
[FLEXIBLE_ARRAY_MEMBER_SIZE
];
1977 BUILD_ASSERT(sizeof(struct ec_response_rand_num
) == 0);
1980 * Get information about the key used to sign the RW firmware.
1981 * For more details on the fields, see "struct vb21_packed_key".
1983 #define EC_CMD_RWSIG_INFO 0x001B
1984 #define EC_VER_RWSIG_INFO 0
1986 #define VBOOT2_KEY_ID_BYTES 20
1989 /* Don't force external projects to depend on the vboot headers. */
1990 #include "vb21_struct.h"
1991 BUILD_ASSERT(sizeof(struct vb2_id
) == VBOOT2_KEY_ID_BYTES
);
1994 struct ec_response_rwsig_info
{
1996 * Signature algorithm used by the key
1997 * (enum vb2_signature_algorithm).
2002 * Hash digest algorithm used with the key
2003 * (enum vb2_hash_algorithm).
2008 uint32_t key_version
;
2010 /** Key ID (struct vb2_id). */
2011 uint8_t key_id
[VBOOT2_KEY_ID_BYTES
];
2013 uint8_t key_is_valid
;
2015 /** Alignment padding. */
2016 uint8_t reserved
[3];
2019 BUILD_ASSERT(sizeof(struct ec_response_rwsig_info
) == 32);
2022 * Get information about the system, such as reset flags, locked state, etc.
2024 #define EC_CMD_SYSINFO 0x001C
2025 #define EC_VER_SYSINFO 0
2027 enum sysinfo_flags
{
2028 SYSTEM_IS_LOCKED
= BIT(0),
2029 SYSTEM_IS_FORCE_LOCKED
= BIT(1),
2030 SYSTEM_JUMP_ENABLED
= BIT(2),
2031 SYSTEM_JUMPED_TO_CURRENT_IMAGE
= BIT(3),
2032 SYSTEM_REBOOT_AT_SHUTDOWN
= BIT(4),
2034 * Used internally. It's set when EC_HOST_EVENT_KEYBOARD_RECOVERY is
2035 * set and cleared when the system shuts down (not when the host event
2038 SYSTEM_IN_MANUAL_RECOVERY
= BIT(5),
2041 struct ec_response_sysinfo
{
2042 uint32_t reset_flags
; /**< EC_RESET_FLAG_* flags */
2043 uint32_t current_image
; /**< enum ec_image */
2044 uint32_t flags
; /**< enum sysinfo_flags */
2047 /*****************************************************************************/
2050 /* Get fan target RPM */
2051 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
2053 struct ec_response_pwm_get_fan_rpm
{
2057 /* Set target fan RPM */
2058 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
2060 /* Version 0 of input params */
2061 struct ec_params_pwm_set_fan_target_rpm_v0
{
2065 /* Version 1 of input params */
2066 struct ec_params_pwm_set_fan_target_rpm_v1
{
2071 /* Get keyboard backlight */
2072 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
2073 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
2075 struct ec_response_pwm_get_keyboard_backlight
{
2080 /* Set keyboard backlight */
2081 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
2082 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
2084 struct ec_params_pwm_set_keyboard_backlight
{
2088 /* Set target fan PWM duty cycle */
2089 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
2091 /* Version 0 of input params */
2092 struct ec_params_pwm_set_fan_duty_v0
{
2096 /* Version 1 of input params */
2097 struct ec_params_pwm_set_fan_duty_v1
{
2102 #define EC_CMD_PWM_SET_DUTY 0x0025
2103 /* 16 bit duty cycle, 0xffff = 100% */
2104 #define EC_PWM_MAX_DUTY 0xffff
2107 /* All types, indexed by board-specific enum pwm_channel */
2108 EC_PWM_TYPE_GENERIC
= 0,
2109 /* Keyboard backlight */
2110 EC_PWM_TYPE_KB_LIGHT
,
2111 /* Display backlight */
2112 EC_PWM_TYPE_DISPLAY_LIGHT
,
2116 struct ec_params_pwm_set_duty
{
2117 uint16_t duty
; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
2118 uint8_t pwm_type
; /* ec_pwm_type */
2119 uint8_t index
; /* Type-specific index, or 0 if unique */
2122 #define EC_CMD_PWM_GET_DUTY 0x0026
2124 struct ec_params_pwm_get_duty
{
2125 uint8_t pwm_type
; /* ec_pwm_type */
2126 uint8_t index
; /* Type-specific index, or 0 if unique */
2129 struct ec_response_pwm_get_duty
{
2130 uint16_t duty
; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
2133 /*****************************************************************************/
2135 * Lightbar commands. This looks worse than it is. Since we only use one HOST
2136 * command to say "talk to the lightbar", we put the "and tell it to do X" part
2137 * into a subcommand. We'll make separate structs for subcommands with
2138 * different input args, so that we know how much to expect.
2140 #define EC_CMD_LIGHTBAR_CMD 0x0028
2144 } __ec_todo_unpacked
;
2146 #define LB_BATTERY_LEVELS 4
2149 * List of tweakable parameters. NOTE: It's __packed so it can be sent in a
2150 * host command, but the alignment is the same regardless. Keep it that way.
2152 struct lightbar_params_v0
{
2154 int32_t google_ramp_up
;
2155 int32_t google_ramp_down
;
2156 int32_t s3s0_ramp_up
;
2157 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2158 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2159 int32_t s0s3_ramp_down
;
2160 int32_t s3_sleep_for
;
2162 int32_t s3_ramp_down
;
2166 uint8_t osc_min
[2]; /* AC=0/1 */
2167 uint8_t osc_max
[2]; /* AC=0/1 */
2168 uint8_t w_ofs
[2]; /* AC=0/1 */
2170 /* Brightness limits based on the backlight and AC. */
2171 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2172 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2173 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2175 /* Battery level thresholds */
2176 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2178 /* Map [AC][battery_level] to color index */
2179 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2180 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2183 struct rgb_s color
[8]; /* 0-3 are Google colors */
2186 struct lightbar_params_v1
{
2188 int32_t google_ramp_up
;
2189 int32_t google_ramp_down
;
2190 int32_t s3s0_ramp_up
;
2191 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2192 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2193 int32_t s0s3_ramp_down
;
2194 int32_t s3_sleep_for
;
2196 int32_t s3_ramp_down
;
2198 int32_t s5_ramp_down
;
2199 int32_t tap_tick_delay
;
2200 int32_t tap_gate_delay
;
2201 int32_t tap_display_time
;
2203 /* Tap-for-battery params */
2204 uint8_t tap_pct_red
;
2205 uint8_t tap_pct_green
;
2206 uint8_t tap_seg_min_on
;
2207 uint8_t tap_seg_max_on
;
2208 uint8_t tap_seg_osc
;
2212 uint8_t osc_min
[2]; /* AC=0/1 */
2213 uint8_t osc_max
[2]; /* AC=0/1 */
2214 uint8_t w_ofs
[2]; /* AC=0/1 */
2216 /* Brightness limits based on the backlight and AC. */
2217 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2218 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2219 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2221 /* Battery level thresholds */
2222 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2224 /* Map [AC][battery_level] to color index */
2225 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2226 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2228 /* s5: single color pulse on inhibited power-up */
2232 struct rgb_s color
[8]; /* 0-3 are Google colors */
2235 /* Lightbar command params v2
2238 * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
2239 * logical groups to make it more manageable ( < 120 bytes).
2241 * NOTE: Each of these groups must be less than 120 bytes.
2244 struct lightbar_params_v2_timing
{
2246 int32_t google_ramp_up
;
2247 int32_t google_ramp_down
;
2248 int32_t s3s0_ramp_up
;
2249 int32_t s0_tick_delay
[2]; /* AC=0/1 */
2250 int32_t s0a_tick_delay
[2]; /* AC=0/1 */
2251 int32_t s0s3_ramp_down
;
2252 int32_t s3_sleep_for
;
2254 int32_t s3_ramp_down
;
2256 int32_t s5_ramp_down
;
2257 int32_t tap_tick_delay
;
2258 int32_t tap_gate_delay
;
2259 int32_t tap_display_time
;
2262 struct lightbar_params_v2_tap
{
2263 /* Tap-for-battery params */
2264 uint8_t tap_pct_red
;
2265 uint8_t tap_pct_green
;
2266 uint8_t tap_seg_min_on
;
2267 uint8_t tap_seg_max_on
;
2268 uint8_t tap_seg_osc
;
2272 struct lightbar_params_v2_oscillation
{
2274 uint8_t osc_min
[2]; /* AC=0/1 */
2275 uint8_t osc_max
[2]; /* AC=0/1 */
2276 uint8_t w_ofs
[2]; /* AC=0/1 */
2279 struct lightbar_params_v2_brightness
{
2280 /* Brightness limits based on the backlight and AC. */
2281 uint8_t bright_bl_off_fixed
[2]; /* AC=0/1 */
2282 uint8_t bright_bl_on_min
[2]; /* AC=0/1 */
2283 uint8_t bright_bl_on_max
[2]; /* AC=0/1 */
2286 struct lightbar_params_v2_thresholds
{
2287 /* Battery level thresholds */
2288 uint8_t battery_threshold
[LB_BATTERY_LEVELS
- 1];
2291 struct lightbar_params_v2_colors
{
2292 /* Map [AC][battery_level] to color index */
2293 uint8_t s0_idx
[2][LB_BATTERY_LEVELS
]; /* AP is running */
2294 uint8_t s3_idx
[2][LB_BATTERY_LEVELS
]; /* AP is sleeping */
2296 /* s5: single color pulse on inhibited power-up */
2300 struct rgb_s color
[8]; /* 0-3 are Google colors */
2303 /* Lightbar program. */
2304 #define EC_LB_PROG_LEN 192
2305 struct lightbar_program
{
2307 uint8_t data
[EC_LB_PROG_LEN
];
2308 } __ec_todo_unpacked
;
2310 struct ec_params_lightbar
{
2311 uint8_t cmd
; /* Command (see enum lightbar_command) */
2314 * The following commands have no args:
2316 * dump, off, on, init, get_seq, get_params_v0, get_params_v1,
2317 * version, get_brightness, get_demo, suspend, resume,
2318 * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc,
2319 * get_params_v2_bright, get_params_v2_thlds,
2320 * get_params_v2_colors
2322 * Don't use an empty struct, because C++ hates that.
2325 struct __ec_todo_unpacked
{
2327 } set_brightness
, seq
, demo
;
2329 struct __ec_todo_unpacked
{
2330 uint8_t ctrl
, reg
, value
;
2333 struct __ec_todo_unpacked
{
2334 uint8_t led
, red
, green
, blue
;
2337 struct __ec_todo_unpacked
{
2341 struct __ec_todo_unpacked
{
2343 } manual_suspend_ctrl
;
2345 struct lightbar_params_v0 set_params_v0
;
2346 struct lightbar_params_v1 set_params_v1
;
2348 struct lightbar_params_v2_timing set_v2par_timing
;
2349 struct lightbar_params_v2_tap set_v2par_tap
;
2350 struct lightbar_params_v2_oscillation set_v2par_osc
;
2351 struct lightbar_params_v2_brightness set_v2par_bright
;
2352 struct lightbar_params_v2_thresholds set_v2par_thlds
;
2353 struct lightbar_params_v2_colors set_v2par_colors
;
2355 struct lightbar_program set_program
;
2359 struct ec_response_lightbar
{
2361 struct __ec_todo_unpacked
{
2362 struct __ec_todo_unpacked
{
2369 struct __ec_todo_unpacked
{
2371 } get_seq
, get_brightness
, get_demo
;
2373 struct lightbar_params_v0 get_params_v0
;
2374 struct lightbar_params_v1 get_params_v1
;
2376 struct lightbar_params_v2_timing get_params_v2_timing
;
2377 struct lightbar_params_v2_tap get_params_v2_tap
;
2378 struct lightbar_params_v2_oscillation get_params_v2_osc
;
2379 struct lightbar_params_v2_brightness get_params_v2_bright
;
2380 struct lightbar_params_v2_thresholds get_params_v2_thlds
;
2381 struct lightbar_params_v2_colors get_params_v2_colors
;
2383 struct __ec_todo_unpacked
{
2388 struct __ec_todo_unpacked
{
2389 uint8_t red
, green
, blue
;
2393 * The following commands have no response:
2395 * off, on, init, set_brightness, seq, reg, set_rgb, demo,
2396 * set_params_v0, set_params_v1, set_program,
2397 * manual_suspend_ctrl, suspend, resume, set_v2par_timing,
2398 * set_v2par_tap, set_v2par_osc, set_v2par_bright,
2399 * set_v2par_thlds, set_v2par_colors
2404 /* Lightbar commands */
2405 enum lightbar_command
{
2406 LIGHTBAR_CMD_DUMP
= 0,
2407 LIGHTBAR_CMD_OFF
= 1,
2408 LIGHTBAR_CMD_ON
= 2,
2409 LIGHTBAR_CMD_INIT
= 3,
2410 LIGHTBAR_CMD_SET_BRIGHTNESS
= 4,
2411 LIGHTBAR_CMD_SEQ
= 5,
2412 LIGHTBAR_CMD_REG
= 6,
2413 LIGHTBAR_CMD_SET_RGB
= 7,
2414 LIGHTBAR_CMD_GET_SEQ
= 8,
2415 LIGHTBAR_CMD_DEMO
= 9,
2416 LIGHTBAR_CMD_GET_PARAMS_V0
= 10,
2417 LIGHTBAR_CMD_SET_PARAMS_V0
= 11,
2418 LIGHTBAR_CMD_VERSION
= 12,
2419 LIGHTBAR_CMD_GET_BRIGHTNESS
= 13,
2420 LIGHTBAR_CMD_GET_RGB
= 14,
2421 LIGHTBAR_CMD_GET_DEMO
= 15,
2422 LIGHTBAR_CMD_GET_PARAMS_V1
= 16,
2423 LIGHTBAR_CMD_SET_PARAMS_V1
= 17,
2424 LIGHTBAR_CMD_SET_PROGRAM
= 18,
2425 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL
= 19,
2426 LIGHTBAR_CMD_SUSPEND
= 20,
2427 LIGHTBAR_CMD_RESUME
= 21,
2428 LIGHTBAR_CMD_GET_PARAMS_V2_TIMING
= 22,
2429 LIGHTBAR_CMD_SET_PARAMS_V2_TIMING
= 23,
2430 LIGHTBAR_CMD_GET_PARAMS_V2_TAP
= 24,
2431 LIGHTBAR_CMD_SET_PARAMS_V2_TAP
= 25,
2432 LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION
= 26,
2433 LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION
= 27,
2434 LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS
= 28,
2435 LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS
= 29,
2436 LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS
= 30,
2437 LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS
= 31,
2438 LIGHTBAR_CMD_GET_PARAMS_V2_COLORS
= 32,
2439 LIGHTBAR_CMD_SET_PARAMS_V2_COLORS
= 33,
2443 /*****************************************************************************/
2444 /* LED control commands */
2446 #define EC_CMD_LED_CONTROL 0x0029
2449 /* LED to indicate battery state of charge */
2450 EC_LED_ID_BATTERY_LED
= 0,
2452 * LED to indicate system power state (on or in suspend).
2453 * May be on power button or on C-panel.
2455 EC_LED_ID_POWER_LED
,
2456 /* LED on power adapter or its plug */
2457 EC_LED_ID_ADAPTER_LED
,
2458 /* LED to indicate left side */
2460 /* LED to indicate right side */
2461 EC_LED_ID_RIGHT_LED
,
2462 /* LED to indicate recovery mode with HW_REINIT */
2463 EC_LED_ID_RECOVERY_HW_REINIT_LED
,
2464 /* LED to indicate sysrq debug mode. */
2465 EC_LED_ID_SYSRQ_DEBUG_LED
,
2470 /* LED control flags */
2471 #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */
2472 #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */
2474 enum ec_led_colors
{
2475 EC_LED_COLOR_INVALID
= -1,
2476 EC_LED_COLOR_RED
= 0,
2479 EC_LED_COLOR_YELLOW
,
2486 struct ec_params_led_control
{
2487 uint8_t led_id
; /* Which LED to control */
2488 uint8_t flags
; /* Control flags */
2490 uint8_t brightness
[EC_LED_COLOR_COUNT
];
2493 struct ec_response_led_control
{
2495 * Available brightness value range.
2497 * Range 0 means color channel not present.
2498 * Range 1 means on/off control.
2499 * Other values means the LED is control by PWM.
2501 uint8_t brightness_range
[EC_LED_COLOR_COUNT
];
2504 /*****************************************************************************/
2505 /* Verified boot commands */
2508 * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
2509 * reused for other purposes with version > 0.
2512 /* Verified boot hash command */
2513 #define EC_CMD_VBOOT_HASH 0x002A
2515 struct ec_params_vboot_hash
{
2516 uint8_t cmd
; /* enum ec_vboot_hash_cmd */
2517 uint8_t hash_type
; /* enum ec_vboot_hash_type */
2518 uint8_t nonce_size
; /* Nonce size; may be 0 */
2519 uint8_t reserved0
; /* Reserved; set 0 */
2520 uint32_t offset
; /* Offset in flash to hash */
2521 uint32_t size
; /* Number of bytes to hash */
2522 uint8_t nonce_data
[64]; /* Nonce data; ignored if nonce_size=0 */
2525 struct ec_response_vboot_hash
{
2526 uint8_t status
; /* enum ec_vboot_hash_status */
2527 uint8_t hash_type
; /* enum ec_vboot_hash_type */
2528 uint8_t digest_size
; /* Size of hash digest in bytes */
2529 uint8_t reserved0
; /* Ignore; will be 0 */
2530 uint32_t offset
; /* Offset in flash which was hashed */
2531 uint32_t size
; /* Number of bytes hashed */
2532 uint8_t hash_digest
[64]; /* Hash digest data */
2535 enum ec_vboot_hash_cmd
{
2536 EC_VBOOT_HASH_GET
= 0, /* Get current hash status */
2537 EC_VBOOT_HASH_ABORT
= 1, /* Abort calculating current hash */
2538 EC_VBOOT_HASH_START
= 2, /* Start computing a new hash */
2539 EC_VBOOT_HASH_RECALC
= 3, /* Synchronously compute a new hash */
2542 enum ec_vboot_hash_type
{
2543 EC_VBOOT_HASH_TYPE_SHA256
= 0, /* SHA-256 */
2546 enum ec_vboot_hash_status
{
2547 EC_VBOOT_HASH_STATUS_NONE
= 0, /* No hash (not started, or aborted) */
2548 EC_VBOOT_HASH_STATUS_DONE
= 1, /* Finished computing a hash */
2549 EC_VBOOT_HASH_STATUS_BUSY
= 2, /* Busy computing a hash */
2553 * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
2554 * If one of these is specified, the EC will automatically update offset and
2555 * size to the correct values for the specified image (RO or RW).
2557 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
2558 #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd
2559 #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc
2562 * 'RW' is vague if there are multiple RW images; we mean the active one,
2563 * so the old constant is deprecated.
2565 #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE
2567 /*****************************************************************************/
2569 * Motion sense commands. We'll make separate structs for sub-commands with
2570 * different input args, so that we know how much to expect.
2572 #define EC_CMD_MOTION_SENSE_CMD 0x002B
2574 /* Motion sense commands */
2575 enum motionsense_command
{
2577 * Dump command returns all motion sensor data including motion sense
2578 * module flags and individual sensor flags.
2580 MOTIONSENSE_CMD_DUMP
= 0,
2583 * Info command returns data describing the details of a given sensor,
2584 * including enum motionsensor_type, enum motionsensor_location, and
2585 * enum motionsensor_chip.
2587 MOTIONSENSE_CMD_INFO
= 1,
2590 * EC Rate command is a setter/getter command for the EC sampling rate
2592 * It is per sensor, the EC run sample task at the minimum of all
2594 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
2595 * to collect all the sensor samples.
2596 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
2597 * to process of all motion sensors in milliseconds.
2599 MOTIONSENSE_CMD_EC_RATE
= 2,
2602 * Sensor ODR command is a setter/getter command for the output data
2603 * rate of a specific motion sensor in millihertz.
2605 MOTIONSENSE_CMD_SENSOR_ODR
= 3,
2608 * Sensor range command is a setter/getter command for the range of
2609 * a specified motion sensor in +/-G's or +/- deg/s.
2611 MOTIONSENSE_CMD_SENSOR_RANGE
= 4,
2614 * Setter/getter command for the keyboard wake angle. When the lid
2615 * angle is greater than this value, keyboard wake is disabled in S3,
2616 * and when the lid angle goes less than this value, keyboard wake is
2617 * enabled. Note, the lid angle measurement is an approximate,
2618 * un-calibrated value, hence the wake angle isn't exact.
2620 MOTIONSENSE_CMD_KB_WAKE_ANGLE
= 5,
2623 * Returns a single sensor data.
2625 MOTIONSENSE_CMD_DATA
= 6,
2628 * Return sensor fifo info.
2630 MOTIONSENSE_CMD_FIFO_INFO
= 7,
2633 * Insert a flush element in the fifo and return sensor fifo info.
2634 * The host can use that element to synchronize its operation.
2636 MOTIONSENSE_CMD_FIFO_FLUSH
= 8,
2639 * Return a portion of the fifo.
2641 MOTIONSENSE_CMD_FIFO_READ
= 9,
2644 * Perform low level calibration.
2645 * On sensors that support it, ask to do offset calibration.
2647 MOTIONSENSE_CMD_PERFORM_CALIB
= 10,
2650 * Sensor Offset command is a setter/getter command for the offset
2651 * used for factory calibration.
2652 * The offsets can be calculated by the host, or via
2653 * PERFORM_CALIB command.
2655 MOTIONSENSE_CMD_SENSOR_OFFSET
= 11,
2658 * List available activities for a MOTION sensor.
2659 * Indicates if they are enabled or disabled.
2661 MOTIONSENSE_CMD_LIST_ACTIVITIES
= 12,
2664 * Activity management
2665 * Enable/Disable activity recognition.
2667 MOTIONSENSE_CMD_SET_ACTIVITY
= 13,
2672 MOTIONSENSE_CMD_LID_ANGLE
= 14,
2675 * Allow the FIFO to trigger interrupt via MKBP events.
2676 * By default the FIFO does not send interrupt to process the FIFO
2677 * until the AP is ready or it is coming from a wakeup sensor.
2679 MOTIONSENSE_CMD_FIFO_INT_ENABLE
= 15,
2682 * Spoof the readings of the sensors. The spoofed readings can be set
2683 * to arbitrary values, or will lock to the last read actual values.
2685 MOTIONSENSE_CMD_SPOOF
= 16,
2687 /* Set lid angle for tablet mode detection. */
2688 MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE
= 17,
2691 * Sensor Scale command is a setter/getter command for the calibration
2694 MOTIONSENSE_CMD_SENSOR_SCALE
= 18,
2697 * Read the current online calibration values (if available).
2699 MOTIONSENSE_CMD_ONLINE_CALIB_READ
= 19,
2702 * Activity management
2703 * Retrieve current status of given activity.
2705 MOTIONSENSE_CMD_GET_ACTIVITY
= 20,
2707 /* Number of motionsense sub-commands. */
2708 MOTIONSENSE_NUM_CMDS
,
2711 /* List of motion sensor types. */
2712 enum motionsensor_type
{
2713 MOTIONSENSE_TYPE_ACCEL
= 0,
2714 MOTIONSENSE_TYPE_GYRO
= 1,
2715 MOTIONSENSE_TYPE_MAG
= 2,
2716 MOTIONSENSE_TYPE_PROX
= 3,
2717 MOTIONSENSE_TYPE_LIGHT
= 4,
2718 MOTIONSENSE_TYPE_ACTIVITY
= 5,
2719 MOTIONSENSE_TYPE_BARO
= 6,
2720 MOTIONSENSE_TYPE_SYNC
= 7,
2721 MOTIONSENSE_TYPE_LIGHT_RGB
= 8,
2722 MOTIONSENSE_TYPE_MAX
,
2725 /* List of motion sensor locations. */
2726 enum motionsensor_location
{
2727 MOTIONSENSE_LOC_BASE
= 0,
2728 MOTIONSENSE_LOC_LID
= 1,
2729 MOTIONSENSE_LOC_CAMERA
= 2,
2730 MOTIONSENSE_LOC_MAX
,
2733 /* List of motion sensor chips. */
2734 enum motionsensor_chip
{
2735 MOTIONSENSE_CHIP_KXCJ9
= 0,
2736 MOTIONSENSE_CHIP_LSM6DS0
= 1,
2737 MOTIONSENSE_CHIP_BMI160
= 2,
2738 MOTIONSENSE_CHIP_SI1141
= 3,
2739 MOTIONSENSE_CHIP_SI1142
= 4,
2740 MOTIONSENSE_CHIP_SI1143
= 5,
2741 MOTIONSENSE_CHIP_KX022
= 6,
2742 MOTIONSENSE_CHIP_L3GD20H
= 7,
2743 MOTIONSENSE_CHIP_BMA255
= 8,
2744 MOTIONSENSE_CHIP_BMP280
= 9,
2745 MOTIONSENSE_CHIP_OPT3001
= 10,
2746 MOTIONSENSE_CHIP_BH1730
= 11,
2747 MOTIONSENSE_CHIP_GPIO
= 12,
2748 MOTIONSENSE_CHIP_LIS2DH
= 13,
2749 MOTIONSENSE_CHIP_LSM6DSM
= 14,
2750 MOTIONSENSE_CHIP_LIS2DE
= 15,
2751 MOTIONSENSE_CHIP_LIS2MDL
= 16,
2752 MOTIONSENSE_CHIP_LSM6DS3
= 17,
2753 MOTIONSENSE_CHIP_LSM6DSO
= 18,
2754 MOTIONSENSE_CHIP_LNG2DM
= 19,
2755 MOTIONSENSE_CHIP_TCS3400
= 20,
2756 MOTIONSENSE_CHIP_LIS2DW12
= 21,
2757 MOTIONSENSE_CHIP_LIS2DWL
= 22,
2758 MOTIONSENSE_CHIP_LIS2DS
= 23,
2759 MOTIONSENSE_CHIP_BMI260
= 24,
2760 MOTIONSENSE_CHIP_ICM426XX
= 25,
2761 MOTIONSENSE_CHIP_ICM42607
= 26,
2762 MOTIONSENSE_CHIP_BMA422
= 27,
2763 MOTIONSENSE_CHIP_BMI323
= 28,
2764 MOTIONSENSE_CHIP_BMI220
= 29,
2765 MOTIONSENSE_CHIP_CM32183
= 30,
2766 MOTIONSENSE_CHIP_MAX
,
2769 /* List of orientation positions */
2770 enum motionsensor_orientation
{
2771 MOTIONSENSE_ORIENTATION_LANDSCAPE
= 0,
2772 MOTIONSENSE_ORIENTATION_PORTRAIT
= 1,
2773 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT
= 2,
2774 MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE
= 3,
2775 MOTIONSENSE_ORIENTATION_UNKNOWN
= 4,
2778 struct ec_response_activity_data
{
2779 uint8_t activity
; /* motionsensor_activity */
2783 struct ec_response_motion_sensor_data
{
2784 /* Flags for each sensor. */
2786 /* Sensor number the data comes from. */
2788 /* Each sensor is up to 3-axis. */
2791 /* for sensors using unsigned data */
2793 struct __ec_todo_packed
{
2797 struct __ec_todo_unpacked
{
2798 struct ec_response_activity_data activity_data
;
2799 int16_t add_info
[2];
2804 /* Response to AP reporting calibration data for a given sensor. */
2805 struct ec_response_online_calibration_data
{
2806 /** The calibration values. */
2810 /* Note: used in ec_response_get_next_data */
2811 struct ec_response_motion_sense_fifo_info
{
2812 /* Size of the fifo */
2814 /* Amount of space used in the fifo */
2816 /* Timestamp recorded in us.
2817 * aka accurate timestamp when host event was triggered.
2820 /* Total amount of vector lost */
2821 uint16_t total_lost
;
2822 /* Lost events since the last fifo_info, per sensors */
2826 struct ec_response_motion_sense_fifo_data
{
2827 uint32_t number_data
;
2828 struct ec_response_motion_sensor_data data
[0];
2831 /* List supported activity recognition */
2832 enum motionsensor_activity
{
2833 MOTIONSENSE_ACTIVITY_RESERVED
= 0,
2834 MOTIONSENSE_ACTIVITY_SIG_MOTION
= 1,
2835 MOTIONSENSE_ACTIVITY_DOUBLE_TAP
= 2,
2836 MOTIONSENSE_ACTIVITY_ORIENTATION
= 3,
2837 MOTIONSENSE_ACTIVITY_BODY_DETECTION
= 4,
2840 struct ec_motion_sense_activity
{
2842 uint8_t activity
; /* one of enum motionsensor_activity */
2843 uint8_t enable
; /* 1: enable, 0: disable */
2845 uint16_t parameters
[4]; /* activity dependent parameters */
2848 /* Module flag masks used for the dump sub-command. */
2849 #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0)
2851 /* Sensor flag masks used for the dump sub-command. */
2852 #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0)
2855 * Flush entry for synchronization.
2856 * data contains time stamp
2858 #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0)
2859 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1)
2860 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2)
2861 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3)
2862 #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4)
2864 #define MOTIONSENSE_SENSOR_FLAG_BYPASS_FIFO BIT(7)
2867 * Send this value for the data element to only perform a read. If you
2868 * send any other value, the EC will interpret it as data to set and will
2869 * return the actual value set.
2871 #define EC_MOTION_SENSE_NO_VALUE -1
2873 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP INT16_MIN
2875 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2876 /* Set Calibration information */
2877 #define MOTION_SENSE_SET_OFFSET BIT(0)
2879 /* Default Scale value, factor 1. */
2880 #define MOTION_SENSE_DEFAULT_SCALE BIT(15)
2882 #define LID_ANGLE_UNRELIABLE 500
2884 enum motionsense_spoof_mode
{
2885 /* Disable spoof mode. */
2886 MOTIONSENSE_SPOOF_MODE_DISABLE
= 0,
2888 /* Enable spoof mode, but use provided component values. */
2889 MOTIONSENSE_SPOOF_MODE_CUSTOM
,
2891 /* Enable spoof mode, but use the current sensor values. */
2892 MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT
,
2894 /* Query the current spoof mode status for the sensor. */
2895 MOTIONSENSE_SPOOF_MODE_QUERY
,
2898 struct ec_params_motion_sense
{
2901 /* Used for MOTIONSENSE_CMD_DUMP. */
2902 struct __ec_todo_unpacked
{
2904 * Maximal number of sensor the host is expecting.
2905 * 0 means the host is only interested in the number
2906 * of sensors controlled by the EC.
2908 uint8_t max_sensor_count
;
2912 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2914 struct __ec_todo_unpacked
{
2915 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2916 * kb_wake_angle: angle to wakup AP.
2922 * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2924 struct __ec_todo_unpacked
{
2926 } info
, info_3
, info_4
, data
, fifo_flush
, list_activities
;
2929 * Used for MOTIONSENSE_CMD_PERFORM_CALIB:
2930 * Allow entering/exiting the calibration mode.
2932 struct __ec_todo_unpacked
{
2938 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2939 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2941 struct __ec_todo_unpacked
{
2944 /* Rounding flag, true for round-up, false for down. */
2949 /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2951 } ec_rate
, sensor_odr
, sensor_range
;
2953 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2954 struct __ec_todo_packed
{
2958 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2959 * the calibration information in the EC.
2960 * If unset, just retrieve calibration information.
2965 * Temperature at calibration, in units of 0.01 C
2966 * 0x8000: invalid / unknown.
2973 * Offset for calibration.
2975 * Accelerometer: 1/1024 g
2976 * Gyro: 1/1024 deg/s
2982 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
2983 struct __ec_todo_packed
{
2987 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2988 * the calibration information in the EC.
2989 * If unset, just retrieve calibration information.
2994 * Temperature at calibration, in units of 0.01 C
2995 * 0x8000: invalid / unknown.
3002 * Scale for calibration:
3003 * By default scale is 1, it is encoded on 16bits:
3011 /* Used for MOTIONSENSE_CMD_FIFO_INFO */
3014 /* Used for MOTIONSENSE_CMD_FIFO_READ */
3015 struct __ec_todo_unpacked
{
3017 * Number of expected vector to return.
3018 * EC may return less or 0 if none available.
3020 uint32_t max_data_vector
;
3023 /* Used for MOTIONSENSE_CMD_SET_ACTIVITY */
3024 struct ec_motion_sense_activity set_activity
;
3026 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
3029 /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
3030 struct __ec_todo_unpacked
{
3032 * 1: enable, 0 disable fifo,
3033 * EC_MOTION_SENSE_NO_VALUE return value.
3038 /* Used for MOTIONSENSE_CMD_SPOOF */
3039 struct __ec_todo_packed
{
3042 /* See enum motionsense_spoof_mode. */
3043 uint8_t spoof_enable
;
3045 /* Ignored, used for alignment. */
3049 /* Individual component values to spoof. */
3050 int16_t components
[3];
3052 /* Used when spoofing an activity */
3054 /* enum motionsensor_activity */
3055 uint8_t activity_num
;
3057 /* spoof activity state */
3058 uint8_t activity_state
;
3063 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
3064 struct __ec_todo_unpacked
{
3066 * Lid angle threshold for switching between tablet and
3072 * Hysteresis degree to prevent fluctuations between
3073 * clamshell and tablet mode if lid angle keeps
3074 * changing around the threshold. Lid motion driver will
3075 * use lid_angle + hys_degree to trigger tablet mode and
3076 * lid_angle - hys_degree to trigger clamshell mode.
3079 } tablet_mode_threshold
;
3082 * Used for MOTIONSENSE_CMD_ONLINE_CALIB_READ:
3083 * Allow reading a single sensor's online calibration value.
3085 struct __ec_todo_unpacked
{
3087 } online_calib_read
;
3090 * Used for MOTIONSENSE_CMD_GET_ACTIVITY.
3092 struct __ec_todo_unpacked
{
3094 uint8_t activity
; /* enum motionsensor_activity */
3099 enum motion_sense_cmd_info_flags
{
3100 /* The sensor supports online calibration */
3101 MOTION_SENSE_CMD_INFO_FLAG_ONLINE_CALIB
= BIT(0),
3104 struct ec_response_motion_sense
{
3106 /* Used for MOTIONSENSE_CMD_DUMP */
3107 struct __ec_todo_unpacked
{
3108 /* Flags representing the motion sensor module. */
3109 uint8_t module_flags
;
3111 /* Number of sensors managed directly by the EC. */
3112 uint8_t sensor_count
;
3115 * Sensor data is truncated if response_max is too small
3116 * for holding all the data.
3118 struct ec_response_motion_sensor_data sensor
[0];
3121 /* Used for MOTIONSENSE_CMD_INFO. */
3122 struct __ec_todo_unpacked
{
3123 /* Should be element of enum motionsensor_type. */
3126 /* Should be element of enum motionsensor_location. */
3129 /* Should be element of enum motionsensor_chip. */
3133 /* Used for MOTIONSENSE_CMD_INFO version 3 */
3134 struct __ec_todo_unpacked
{
3135 /* Should be element of enum motionsensor_type. */
3138 /* Should be element of enum motionsensor_location. */
3141 /* Should be element of enum motionsensor_chip. */
3144 /* Minimum sensor sampling frequency */
3145 uint32_t min_frequency
;
3147 /* Maximum sensor sampling frequency */
3148 uint32_t max_frequency
;
3150 /* Max number of sensor events that could be in fifo */
3151 uint32_t fifo_max_event_count
;
3154 /* Used for MOTIONSENSE_CMD_INFO version 4 */
3155 struct __ec_align4
{
3156 /* Should be element of enum motionsensor_type. */
3159 /* Should be element of enum motionsensor_location. */
3162 /* Should be element of enum motionsensor_chip. */
3165 /* Minimum sensor sampling frequency */
3166 uint32_t min_frequency
;
3168 /* Maximum sensor sampling frequency */
3169 uint32_t max_frequency
;
3171 /* Max number of sensor events that could be in fifo */
3172 uint32_t fifo_max_event_count
;
3175 * Should be elements of
3176 * enum motion_sense_cmd_info_flags
3181 /* Used for MOTIONSENSE_CMD_DATA */
3182 struct ec_response_motion_sensor_data data
;
3185 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
3186 * MOTIONSENSE_CMD_SENSOR_RANGE,
3187 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
3188 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
3189 * MOTIONSENSE_CMD_SPOOF.
3191 struct __ec_todo_unpacked
{
3192 /* Current value of the parameter queried. */
3194 } ec_rate
, sensor_odr
, sensor_range
, kb_wake_angle
,
3195 fifo_int_enable
, spoof
;
3198 * Used for MOTIONSENSE_CMD_SENSOR_OFFSET,
3201 struct __ec_todo_unpacked
{
3204 } sensor_offset
, perform_calib
;
3206 /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */
3207 struct __ec_todo_unpacked
{
3212 struct ec_response_motion_sense_fifo_info fifo_info
, fifo_flush
;
3214 struct ec_response_motion_sense_fifo_data fifo_read
;
3216 struct ec_response_online_calibration_data online_calib_read
;
3218 struct __ec_todo_packed
{
3224 /* No params for set activity */
3226 /* Used for MOTIONSENSE_CMD_LID_ANGLE */
3227 struct __ec_todo_unpacked
{
3229 * Angle between 0 and 360 degree if available,
3230 * LID_ANGLE_UNRELIABLE otherwise.
3235 /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */
3236 struct __ec_todo_unpacked
{
3238 * Lid angle threshold for switching between tablet and
3243 /* Hysteresis degree. */
3244 uint16_t hys_degree
;
3245 } tablet_mode_threshold
;
3247 /* USED for MOTIONSENSE_CMD_GET_ACTIVITY. */
3248 struct __ec_todo_unpacked
{
3254 /*****************************************************************************/
3255 /* Force lid open command */
3257 /* Make lid event always open */
3258 #define EC_CMD_FORCE_LID_OPEN 0x002C
3260 struct ec_params_force_lid_open
{
3264 /*****************************************************************************/
3265 /* Configure the behavior of the power button */
3266 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
3268 enum ec_config_power_button_flags
{
3269 /* Enable/Disable power button pulses for x86 devices */
3270 EC_POWER_BUTTON_ENABLE_PULSE
= BIT(0),
3273 struct ec_params_config_power_button
{
3274 /* See enum ec_config_power_button_flags */
3278 /*****************************************************************************/
3279 /* USB charging control commands */
3281 /* Set USB port charging mode */
3282 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
3284 enum usb_charge_mode
{
3285 /* Disable USB port. */
3286 USB_CHARGE_MODE_DISABLED
,
3287 /* Set USB port to Standard Downstream Port, USB 2.0 mode. */
3288 USB_CHARGE_MODE_SDP2
,
3289 /* Set USB port to Charging Downstream Port, BC 1.2. */
3290 USB_CHARGE_MODE_CDP
,
3291 /* Set USB port to Dedicated Charging Port, BC 1.2. */
3292 USB_CHARGE_MODE_DCP_SHORT
,
3293 /* Enable USB port (for dumb ports). */
3294 USB_CHARGE_MODE_ENABLED
,
3295 /* Set USB port to CONFIG_USB_PORT_POWER_SMART_DEFAULT_MODE. */
3296 USB_CHARGE_MODE_DEFAULT
,
3298 USB_CHARGE_MODE_COUNT
,
3301 enum usb_suspend_charge
{
3302 /* Enable charging in suspend */
3303 USB_ALLOW_SUSPEND_CHARGE
,
3304 /* Disable charging in suspend */
3305 USB_DISALLOW_SUSPEND_CHARGE
,
3308 struct ec_params_usb_charge_set_mode
{
3309 uint8_t usb_port_id
;
3310 uint8_t mode
: 7; /* enum usb_charge_mode */
3311 uint8_t inhibit_charge
: 1; /* enum usb_suspend_charge */
3314 /*****************************************************************************/
3315 /* Tablet mode commands */
3317 /* Set tablet mode */
3318 #define EC_CMD_SET_TABLET_MODE 0x0031
3320 enum tablet_mode_override
{
3321 TABLET_MODE_DEFAULT
,
3322 TABLET_MODE_FORCE_TABLET
,
3323 TABLET_MODE_FORCE_CLAMSHELL
,
3326 struct ec_params_set_tablet_mode
{
3327 uint8_t tablet_mode
; /* enum tablet_mode_override */
3330 /*****************************************************************************/
3331 /* Persistent storage for host */
3333 /* Maximum bytes that can be read/written in a single command */
3334 #define EC_PSTORE_SIZE_MAX 64
3336 /* Get persistent storage info */
3337 #define EC_CMD_PSTORE_INFO 0x0040
3339 struct ec_response_pstore_info
{
3340 /* Persistent storage size, in bytes */
3341 uint32_t pstore_size
;
3342 /* Access size; read/write offset and size must be a multiple of this */
3343 uint32_t access_size
;
3347 * Read persistent storage
3349 * Response is params.size bytes of data.
3351 #define EC_CMD_PSTORE_READ 0x0041
3353 struct ec_params_pstore_read
{
3354 uint32_t offset
; /* Byte offset to read */
3355 uint32_t size
; /* Size to read in bytes */
3358 /* Write persistent storage */
3359 #define EC_CMD_PSTORE_WRITE 0x0042
3361 struct ec_params_pstore_write
{
3362 uint32_t offset
; /* Byte offset to write */
3363 uint32_t size
; /* Size to write in bytes */
3364 uint8_t data
[EC_PSTORE_SIZE_MAX
];
3367 /*****************************************************************************/
3368 /* Real-time clock */
3370 /* RTC params and response structures */
3371 struct ec_params_rtc
{
3375 struct ec_response_rtc
{
3379 /* These use ec_response_rtc */
3380 #define EC_CMD_RTC_GET_VALUE 0x0044
3381 #define EC_CMD_RTC_GET_ALARM 0x0045
3383 /* These all use ec_params_rtc */
3384 #define EC_CMD_RTC_SET_VALUE 0x0046
3385 #define EC_CMD_RTC_SET_ALARM 0x0047
3387 /* Pass as time param to SET_ALARM to clear the current alarm */
3388 #define EC_RTC_ALARM_CLEAR 0
3390 /*****************************************************************************/
3391 /* Port80 log access */
3393 /* Maximum entries that can be read/written in a single command */
3394 #define EC_PORT80_SIZE_MAX 32
3396 /* Get last port80 code from previous boot */
3397 #define EC_CMD_PORT80_LAST_BOOT 0x0048
3398 #define EC_CMD_PORT80_READ 0x0048
3400 enum ec_port80_subcmd
{
3401 EC_PORT80_GET_INFO
= 0,
3402 EC_PORT80_READ_BUFFER
,
3405 struct ec_params_port80_read
{
3408 struct __ec_todo_unpacked
{
3410 uint32_t num_entries
;
3415 struct ec_response_port80_read
{
3417 struct __ec_todo_unpacked
{
3419 uint32_t history_size
;
3422 struct __ec_todo_unpacked
{
3423 uint16_t codes
[EC_PORT80_SIZE_MAX
];
3428 struct ec_response_port80_last_boot
{
3432 /*****************************************************************************/
3433 /* Temporary secure storage for host verified boot use */
3435 /* Number of bytes in a vstore slot */
3436 #define EC_VSTORE_SLOT_SIZE 64
3438 /* Maximum number of vstore slots */
3439 #define EC_VSTORE_SLOT_MAX 32
3441 /* Get persistent storage info */
3442 #define EC_CMD_VSTORE_INFO 0x0049
3443 struct ec_response_vstore_info
{
3444 /* Indicates which slots are locked */
3445 uint32_t slot_locked
;
3446 /* Total number of slots available */
3451 * Read temporary secure storage
3453 * Response is EC_VSTORE_SLOT_SIZE bytes of data.
3455 #define EC_CMD_VSTORE_READ 0x004A
3457 struct ec_params_vstore_read
{
3458 uint8_t slot
; /* Slot to read from */
3461 struct ec_response_vstore_read
{
3462 uint8_t data
[EC_VSTORE_SLOT_SIZE
];
3466 * Write temporary secure storage and lock it.
3468 #define EC_CMD_VSTORE_WRITE 0x004B
3470 struct ec_params_vstore_write
{
3471 uint8_t slot
; /* Slot to write to */
3472 uint8_t data
[EC_VSTORE_SLOT_SIZE
];
3475 /*****************************************************************************/
3476 /* Thermal engine commands. Note that there are two implementations. We'll
3477 * reuse the command number, but the data and behavior is incompatible.
3478 * Version 0 is what originally shipped on Link.
3479 * Version 1 separates the CPU thermal limits from the fan control.
3482 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
3483 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
3485 /* The version 0 structs are opaque. You have to know what they are for
3486 * the get/set commands to make any sense.
3489 /* Version 0 - set */
3490 struct ec_params_thermal_set_threshold
{
3491 uint8_t sensor_type
;
3492 uint8_t threshold_id
;
3496 /* Version 0 - get */
3497 struct ec_params_thermal_get_threshold
{
3498 uint8_t sensor_type
;
3499 uint8_t threshold_id
;
3502 struct ec_response_thermal_get_threshold
{
3506 /* The version 1 structs are visible. */
3507 enum ec_temp_thresholds
{
3508 EC_TEMP_THRESH_WARN
= 0,
3509 EC_TEMP_THRESH_HIGH
,
3510 EC_TEMP_THRESH_HALT
,
3512 EC_TEMP_THRESH_COUNT
,
3516 * Thermal configuration for one temperature sensor. Temps are in degrees K.
3517 * Zero values will be silently ignored by the thermal task.
3519 * Set 'temp_host' value allows thermal task to trigger some event with 1 degree
3522 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3523 * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K
3524 * EC will throttle ap when temperature >= 301 K, and release throttling when
3525 * temperature <= 299 K.
3527 * Set 'temp_host_release' value allows thermal task has a custom hysteresis.
3529 * temp_host[EC_TEMP_THRESH_HIGH] = 300 K
3530 * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K
3531 * EC will throttle ap when temperature >= 301 K, and release throttling when
3532 * temperature <= 294 K.
3534 * Note that this structure is a sub-structure of
3535 * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
3537 struct ec_thermal_config
{
3538 uint32_t temp_host
[EC_TEMP_THRESH_COUNT
]; /* levels of hotness */
3539 uint32_t temp_host_release
[EC_TEMP_THRESH_COUNT
]; /* release levels */
3540 uint32_t temp_fan_off
; /* no active cooling needed */
3541 uint32_t temp_fan_max
; /* max active cooling needed */
3544 /* Version 1 - get config for one sensor. */
3545 struct ec_params_thermal_get_threshold_v1
{
3546 uint32_t sensor_num
;
3548 /* This returns a struct ec_thermal_config */
3551 * Version 1 - set config for one sensor.
3552 * Use read-modify-write for best results!
3554 struct ec_params_thermal_set_threshold_v1
{
3555 uint32_t sensor_num
;
3556 struct ec_thermal_config cfg
;
3558 /* This returns no data */
3560 /****************************************************************************/
3562 /* Toggle automatic fan control */
3563 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
3565 /* Version 1 of input params */
3566 struct ec_params_auto_fan_ctrl_v1
{
3570 /* Get/Set TMP006 calibration data */
3571 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
3572 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
3575 * The original TMP006 calibration only needed four params, but now we need
3576 * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
3577 * the params opaque. The v1 "get" response will include the algorithm number
3578 * and how many params it requires. That way we can change the EC code without
3579 * needing to update this file. We can also use a different algorithm on each
3583 /* This is the same struct for both v0 and v1. */
3584 struct ec_params_tmp006_get_calibration
{
3589 struct ec_response_tmp006_get_calibration_v0
{
3596 struct ec_params_tmp006_set_calibration_v0
{
3598 uint8_t reserved
[3];
3606 struct ec_response_tmp006_get_calibration_v1
{
3609 uint8_t reserved
[2];
3613 struct ec_params_tmp006_set_calibration_v1
{
3621 /* Read raw TMP006 data */
3622 #define EC_CMD_TMP006_GET_RAW 0x0055
3624 struct ec_params_tmp006_get_raw
{
3628 struct ec_response_tmp006_get_raw
{
3629 int32_t t
; /* In 1/100 K */
3630 int32_t v
; /* In nV */
3633 /*****************************************************************************/
3634 /* MKBP - Matrix KeyBoard Protocol */
3639 * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
3640 * expected response size.
3642 * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT. If you wish
3643 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
3644 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
3646 #define EC_CMD_MKBP_STATE 0x0060
3649 * Provide information about various MKBP things. See enum ec_mkbp_info_type.
3651 #define EC_CMD_MKBP_INFO 0x0061
3653 struct ec_response_mkbp_info
{
3656 /* Formerly "switches", which was 0. */
3660 struct ec_params_mkbp_info
{
3665 enum ec_mkbp_info_type
{
3667 * Info about the keyboard matrix: number of rows and columns.
3669 * Returns struct ec_response_mkbp_info.
3671 EC_MKBP_INFO_KBD
= 0,
3674 * For buttons and switches, info about which specifically are
3675 * supported. event_type must be set to one of the values in enum
3678 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
3679 * bitmask indicating which buttons or switches are present. See the
3680 * bit inidices below.
3682 EC_MKBP_INFO_SUPPORTED
= 1,
3685 * Instantaneous state of buttons and switches.
3687 * event_type must be set to one of the values in enum ec_mkbp_event.
3689 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
3690 * indicating the current state of the keyboard matrix.
3692 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
3695 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
3696 * state of supported buttons.
3698 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
3699 * state of supported switches.
3701 EC_MKBP_INFO_CURRENT
= 2,
3704 /* Simulate key press */
3705 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
3707 struct ec_params_mkbp_simulate_key
{
3713 #define EC_CMD_GET_KEYBOARD_ID 0x0063
3715 struct ec_response_keyboard_id
{
3716 uint32_t keyboard_id
;
3720 KEYBOARD_ID_UNSUPPORTED
= 0,
3721 KEYBOARD_ID_UNREADABLE
= 0xffffffff,
3724 /* Configure keyboard scanning */
3725 #define EC_CMD_MKBP_SET_CONFIG 0x0064
3726 #define EC_CMD_MKBP_GET_CONFIG 0x0065
3729 enum mkbp_config_flags
{
3730 EC_MKBP_FLAGS_ENABLE
= 1, /* Enable keyboard scanning */
3733 enum mkbp_config_valid
{
3734 EC_MKBP_VALID_SCAN_PERIOD
= BIT(0),
3735 EC_MKBP_VALID_POLL_TIMEOUT
= BIT(1),
3736 EC_MKBP_VALID_MIN_POST_SCAN_DELAY
= BIT(3),
3737 EC_MKBP_VALID_OUTPUT_SETTLE
= BIT(4),
3738 EC_MKBP_VALID_DEBOUNCE_DOWN
= BIT(5),
3739 EC_MKBP_VALID_DEBOUNCE_UP
= BIT(6),
3740 EC_MKBP_VALID_FIFO_MAX_DEPTH
= BIT(7),
3744 * Configuration for our key scanning algorithm.
3746 * Note that this is used as a sub-structure of
3747 * ec_{params/response}_mkbp_get_config.
3749 struct ec_mkbp_config
{
3750 uint32_t valid_mask
; /* valid fields */
3751 uint8_t flags
; /* some flags (enum mkbp_config_flags) */
3752 uint8_t valid_flags
; /* which flags are valid */
3753 uint16_t scan_period_us
; /* period between start of scans */
3754 /* revert to interrupt mode after no activity for this long */
3755 uint32_t poll_timeout_us
;
3757 * minimum post-scan relax time. Once we finish a scan we check
3758 * the time until we are due to start the next one. If this time is
3759 * shorter this field, we use this instead.
3761 uint16_t min_post_scan_delay_us
;
3762 /* delay between setting up output and waiting for it to settle */
3763 uint16_t output_settle_us
;
3764 uint16_t debounce_down_us
; /* time for debounce on key down */
3765 uint16_t debounce_up_us
; /* time for debounce on key up */
3766 /* maximum depth to allow for fifo (0 = no keyscan output) */
3767 uint8_t fifo_max_depth
;
3770 struct ec_params_mkbp_set_config
{
3771 struct ec_mkbp_config config
;
3774 struct ec_response_mkbp_get_config
{
3775 struct ec_mkbp_config config
;
3778 /* Run the key scan emulation */
3779 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
3781 enum ec_keyscan_seq_cmd
{
3782 EC_KEYSCAN_SEQ_STATUS
= 0, /* Get status information */
3783 EC_KEYSCAN_SEQ_CLEAR
= 1, /* Clear sequence */
3784 EC_KEYSCAN_SEQ_ADD
= 2, /* Add item to sequence */
3785 EC_KEYSCAN_SEQ_START
= 3, /* Start running sequence */
3786 EC_KEYSCAN_SEQ_COLLECT
= 4, /* Collect sequence summary data */
3789 enum ec_collect_flags
{
3791 * Indicates this scan was processed by the EC. Due to timing, some
3792 * scans may be skipped.
3794 EC_KEYSCAN_SEQ_FLAG_DONE
= BIT(0),
3797 struct ec_collect_item
{
3798 uint8_t flags
; /* some flags (enum ec_collect_flags) */
3801 struct ec_params_keyscan_seq_ctrl
{
3802 uint8_t cmd
; /* Command to send (enum ec_keyscan_seq_cmd) */
3804 struct __ec_align1
{
3805 uint8_t active
; /* still active */
3806 uint8_t num_items
; /* number of items */
3807 /* Current item being presented */
3810 struct __ec_todo_unpacked
{
3812 * Absolute time for this scan, measured from the
3813 * start of the sequence.
3816 uint8_t scan
[0]; /* keyscan data */
3818 struct __ec_align1
{
3819 uint8_t start_item
; /* First item to return */
3820 uint8_t num_items
; /* Number of items to return */
3825 struct ec_result_keyscan_seq_ctrl
{
3827 struct __ec_todo_unpacked
{
3828 uint8_t num_items
; /* Number of items */
3829 /* Data for each item */
3830 struct ec_collect_item item
[0];
3836 * Get the next pending MKBP event.
3838 * Returns EC_RES_UNAVAILABLE if there is no event pending.
3840 #define EC_CMD_GET_NEXT_EVENT 0x0067
3842 #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7
3845 * We use the most significant bit of the event type to indicate to the host
3846 * that the EC has more MKBP events available to provide.
3848 #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT)
3850 /* The mask to apply to get the raw event type */
3851 #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1)
3853 enum ec_mkbp_event
{
3854 /* Keyboard matrix changed. The event data is the new matrix state. */
3855 EC_MKBP_EVENT_KEY_MATRIX
= 0,
3857 /* New host event. The event data is 4 bytes of host event flags. */
3858 EC_MKBP_EVENT_HOST_EVENT
= 1,
3860 /* New Sensor FIFO data. The event data is fifo_info structure. */
3861 EC_MKBP_EVENT_SENSOR_FIFO
= 2,
3863 /* The state of the non-matrixed buttons have changed. */
3864 EC_MKBP_EVENT_BUTTON
= 3,
3866 /* The state of the switches have changed. */
3867 EC_MKBP_EVENT_SWITCH
= 4,
3869 /* New Fingerprint sensor event, the event data is fp_events bitmap. */
3870 EC_MKBP_EVENT_FINGERPRINT
= 5,
3873 * Sysrq event: send emulated sysrq. The event data is sysrq,
3874 * corresponding to the key to be pressed.
3876 EC_MKBP_EVENT_SYSRQ
= 6,
3879 * New 64-bit host event.
3880 * The event data is 8 bytes of host event flags.
3882 EC_MKBP_EVENT_HOST_EVENT64
= 7,
3884 /* Notify the AP that something happened on CEC */
3885 EC_MKBP_EVENT_CEC_EVENT
= 8,
3887 /* Send an incoming CEC message to the AP */
3888 EC_MKBP_EVENT_CEC_MESSAGE
= 9,
3890 /* We have entered DisplayPort Alternate Mode on a Type-C port. */
3891 EC_MKBP_EVENT_DP_ALT_MODE_ENTERED
= 10,
3893 /* New online calibration values are available. */
3894 EC_MKBP_EVENT_ONLINE_CALIBRATION
= 11,
3896 /* Peripheral device charger event */
3897 EC_MKBP_EVENT_PCHG
= 12,
3899 /* Number of MKBP events */
3900 EC_MKBP_EVENT_COUNT
,
3902 BUILD_ASSERT(EC_MKBP_EVENT_COUNT
<= EC_MKBP_EVENT_TYPE_MASK
);
3904 /* clang-format off */
3905 #define EC_MKBP_EVENT_TEXT \
3907 [EC_MKBP_EVENT_KEY_MATRIX] = "KEY_MATRIX", \
3908 [EC_MKBP_EVENT_HOST_EVENT] = "HOST_EVENT", \
3909 [EC_MKBP_EVENT_SENSOR_FIFO] = "SENSOR_FIFO", \
3910 [EC_MKBP_EVENT_BUTTON] = "BUTTON", \
3911 [EC_MKBP_EVENT_SWITCH] = "SWITCH", \
3912 [EC_MKBP_EVENT_FINGERPRINT] = "FINGERPRINT", \
3913 [EC_MKBP_EVENT_SYSRQ] = "SYSRQ", \
3914 [EC_MKBP_EVENT_HOST_EVENT64] = "HOST_EVENT64", \
3915 [EC_MKBP_EVENT_CEC_EVENT] = "CEC_EVENT", \
3916 [EC_MKBP_EVENT_CEC_MESSAGE] = "CEC_MESSAGE", \
3917 [EC_MKBP_EVENT_DP_ALT_MODE_ENTERED] = "DP_ALT_MODE_ENTERED", \
3918 [EC_MKBP_EVENT_ONLINE_CALIBRATION] = "ONLINE_CALIBRATION", \
3919 [EC_MKBP_EVENT_PCHG] = "PCHG", \
3921 /* clang-format on */
3923 union __ec_align_offset1 ec_response_get_next_data
{
3924 uint8_t key_matrix
[13];
3927 uint32_t host_event
;
3928 uint64_t host_event64
;
3930 struct __ec_todo_unpacked
{
3931 /* For aligning the fifo_info */
3932 uint8_t reserved
[3];
3933 struct ec_response_motion_sense_fifo_info info
;
3944 /* CEC events from enum mkbp_cec_event */
3945 uint32_t cec_events
;
3948 union __ec_align_offset1 ec_response_get_next_data_v1
{
3949 uint8_t key_matrix
[16];
3952 uint32_t host_event
;
3953 uint64_t host_event64
;
3955 struct __ec_todo_unpacked
{
3956 /* For aligning the fifo_info */
3957 uint8_t reserved
[3];
3958 struct ec_response_motion_sense_fifo_info info
;
3969 /* CEC events from enum mkbp_cec_event */
3970 uint32_t cec_events
;
3972 uint8_t cec_message
[16];
3974 BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1
) == 16);
3976 struct ec_response_get_next_event
{
3978 /* Followed by event data if any */
3979 union ec_response_get_next_data data
;
3982 struct ec_response_get_next_event_v1
{
3984 /* Followed by event data if any */
3985 union ec_response_get_next_data_v1 data
;
3988 /* Bit indices for buttons and switches.*/
3990 #define EC_MKBP_POWER_BUTTON 0
3991 #define EC_MKBP_VOL_UP 1
3992 #define EC_MKBP_VOL_DOWN 2
3993 #define EC_MKBP_RECOVERY 3
3996 #define EC_MKBP_LID_OPEN 0
3997 #define EC_MKBP_TABLET_MODE 1
3998 #define EC_MKBP_BASE_ATTACHED 2
3999 #define EC_MKBP_FRONT_PROXIMITY 3
4001 /* Run keyboard factory test scanning */
4002 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
4004 struct ec_response_keyboard_factory_test
{
4005 uint16_t shorted
; /* Keyboard pins are shorted */
4008 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
4009 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events)&0x00FFFFFF)
4010 #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events)&0x0000000F)
4011 #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4
4012 #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) \
4013 (((fpe)&0x00000FF0) >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET)
4014 #define EC_MKBP_FP_MATCH_IDX_OFFSET 12
4015 #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000
4016 #define EC_MKBP_FP_MATCH_IDX(fpe) \
4017 (((fpe)&EC_MKBP_FP_MATCH_IDX_MASK) >> EC_MKBP_FP_MATCH_IDX_OFFSET)
4018 #define EC_MKBP_FP_ENROLL BIT(27)
4019 #define EC_MKBP_FP_MATCH BIT(28)
4020 #define EC_MKBP_FP_FINGER_DOWN BIT(29)
4021 #define EC_MKBP_FP_FINGER_UP BIT(30)
4022 #define EC_MKBP_FP_IMAGE_READY BIT(31)
4023 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */
4024 #define EC_MKBP_FP_ERR_ENROLL_OK 0
4025 #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1
4026 #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2
4027 #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3
4028 #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5
4029 /* Can be used to detect if image was usable for enrollment or not. */
4030 #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1
4031 /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */
4032 #define EC_MKBP_FP_ERR_MATCH_NO 0
4033 #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6
4034 #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7
4035 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2
4036 #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4
4037 #define EC_MKBP_FP_ERR_MATCH_YES 1
4038 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3
4039 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5
4041 #define EC_CMD_MKBP_WAKE_MASK 0x0069
4042 enum ec_mkbp_event_mask_action
{
4043 /* Retrieve the value of a wake mask. */
4046 /* Set the value of a wake mask. */
4050 enum ec_mkbp_mask_type
{
4052 * These are host events sent via MKBP.
4054 * Some examples are:
4055 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN)
4056 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED)
4058 * The only things that should be in this mask are:
4059 * EC_HOST_EVENT_MASK(EC_HOST_EVENT_*)
4061 EC_MKBP_HOST_EVENT_WAKE_MASK
= 0,
4064 * These are MKBP events. Some examples are:
4066 * EC_MKBP_EVENT_KEY_MATRIX
4067 * EC_MKBP_EVENT_SWITCH
4069 * The only things that should be in this mask are EC_MKBP_EVENT_*.
4071 EC_MKBP_EVENT_WAKE_MASK
,
4074 struct ec_params_mkbp_event_wake_mask
{
4075 /* One of enum ec_mkbp_event_mask_action */
4079 * Which MKBP mask are you interested in acting upon? This is one of
4080 * ec_mkbp_mask_type.
4084 /* If setting a new wake mask, this contains the mask to set. */
4085 uint32_t new_wake_mask
;
4088 struct ec_response_mkbp_event_wake_mask
{
4092 /*****************************************************************************/
4093 /* Temperature sensor commands */
4095 /* Read temperature sensor info */
4096 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
4098 struct ec_params_temp_sensor_get_info
{
4102 struct ec_response_temp_sensor_get_info
{
4103 char sensor_name
[32];
4104 uint8_t sensor_type
;
4107 /*****************************************************************************/
4110 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
4111 * commands accidentally sent to the wrong interface. See the ACPI section
4115 /*****************************************************************************/
4116 /* Host event commands */
4118 /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */
4120 * Host event mask params and response structures, shared by all of the host
4121 * event commands below.
4123 struct ec_params_host_event_mask
{
4127 struct ec_response_host_event_mask
{
4131 /* These all use ec_response_host_event_mask */
4132 #define EC_CMD_HOST_EVENT_GET_B 0x0087
4133 #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088
4134 #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089
4135 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
4137 /* These all use ec_params_host_event_mask */
4138 #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A
4139 #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B
4140 #define EC_CMD_HOST_EVENT_CLEAR 0x008C
4141 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
4142 #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F
4145 * Unified host event programming interface - Should be used by newer versions
4146 * of BIOS/OS to program host events and masks
4149 * - EC_RES_INVALID_PARAM: Action or mask type is unknown.
4150 * - EC_RES_ACCESS_DENIED: Action is prohibited for specified mask type.
4153 struct ec_params_host_event
{
4154 /* Action requested by host - one of enum ec_host_event_action. */
4158 * Mask type that the host requested the action on - one of
4159 * enum ec_host_event_mask_type.
4163 /* Set to 0, ignore on read */
4166 /* Value to be used in case of set operations. */
4171 * Response structure returned by EC_CMD_HOST_EVENT.
4172 * Update the value on a GET request. Set to 0 on GET/CLEAR
4175 struct ec_response_host_event
{
4176 /* Mask value in case of get operation */
4180 enum ec_host_event_action
{
4182 * params.value is ignored. Value of mask_type populated
4187 /* Bits in params.value are set */
4190 /* Bits in params.value are cleared */
4191 EC_HOST_EVENT_CLEAR
,
4194 enum ec_host_event_mask_type
{
4196 /* Main host event copy */
4199 /* Copy B of host events */
4203 EC_HOST_EVENT_SCI_MASK
,
4206 EC_HOST_EVENT_SMI_MASK
,
4208 /* Mask of events that should be always reported in hostevents */
4209 EC_HOST_EVENT_ALWAYS_REPORT_MASK
,
4211 /* Active wake mask */
4212 EC_HOST_EVENT_ACTIVE_WAKE_MASK
,
4214 /* Lazy wake mask for S0ix */
4215 EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX
,
4217 /* Lazy wake mask for S3 */
4218 EC_HOST_EVENT_LAZY_WAKE_MASK_S3
,
4220 /* Lazy wake mask for S5 */
4221 EC_HOST_EVENT_LAZY_WAKE_MASK_S5
,
4224 #define EC_CMD_HOST_EVENT 0x00A4
4226 /*****************************************************************************/
4227 /* Switch commands */
4229 /* Enable/disable LCD backlight */
4230 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
4232 struct ec_params_switch_enable_backlight
{
4236 /* Enable/disable WLAN/Bluetooth */
4237 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
4238 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
4240 /* Version 0 params; no response */
4241 struct ec_params_switch_enable_wireless_v0
{
4245 /* Version 1 params */
4246 struct ec_params_switch_enable_wireless_v1
{
4247 /* Flags to enable now */
4250 /* Which flags to copy from now_flags */
4254 * Flags to leave enabled in S3, if they're on at the S0->S3
4255 * transition. (Other flags will be disabled by the S0->S3
4258 uint8_t suspend_flags
;
4260 /* Which flags to copy from suspend_flags */
4261 uint8_t suspend_mask
;
4264 /* Version 1 response */
4265 struct ec_response_switch_enable_wireless_v1
{
4266 /* Flags to enable now */
4269 /* Flags to leave enabled in S3 */
4270 uint8_t suspend_flags
;
4273 /*****************************************************************************/
4274 /* GPIO commands. Only available on EC if write protect has been disabled. */
4276 /* Set GPIO output value */
4277 #define EC_CMD_GPIO_SET 0x0092
4279 struct ec_params_gpio_set
{
4284 /* Get GPIO value */
4285 #define EC_CMD_GPIO_GET 0x0093
4287 /* Version 0 of input params and response */
4288 struct ec_params_gpio_get
{
4292 struct ec_response_gpio_get
{
4296 /* Version 1 of input params and response */
4297 struct ec_params_gpio_get_v1
{
4300 struct __ec_align1
{
4302 } get_value_by_name
;
4303 struct __ec_align1
{
4309 struct ec_response_gpio_get_v1
{
4311 struct __ec_align1
{
4313 } get_value_by_name
, get_count
;
4314 struct __ec_todo_unpacked
{
4322 enum gpio_get_subcmd
{
4323 EC_GPIO_GET_BY_NAME
= 0,
4324 EC_GPIO_GET_COUNT
= 1,
4325 EC_GPIO_GET_INFO
= 2,
4328 /*****************************************************************************/
4329 /* I2C commands. Only available when flash write protect is unlocked. */
4332 * CAUTION: These commands are deprecated, and are not supported anymore in EC
4333 * builds >= 8398.0.0 (see crosbug.com/p/23570).
4335 * Use EC_CMD_I2C_PASSTHRU instead.
4339 #define EC_CMD_I2C_READ 0x0094
4341 struct ec_params_i2c_read
{
4342 uint16_t addr
; /* 8-bit address (7-bit shifted << 1) */
4343 uint8_t read_size
; /* Either 8 or 16. */
4348 struct ec_response_i2c_read
{
4353 #define EC_CMD_I2C_WRITE 0x0095
4355 struct ec_params_i2c_write
{
4357 uint16_t addr
; /* 8-bit address (7-bit shifted << 1) */
4358 uint8_t write_size
; /* Either 8 or 16. */
4363 /*****************************************************************************/
4364 /* Charge state commands. Only available when flash write protect unlocked. */
4366 /* Force charge state machine to stop charging the battery or force it to
4367 * discharge the battery.
4369 #define EC_CMD_CHARGE_CONTROL 0x0096
4370 #define EC_VER_CHARGE_CONTROL 2
4372 enum ec_charge_control_mode
{
4373 CHARGE_CONTROL_NORMAL
= 0,
4374 CHARGE_CONTROL_IDLE
,
4375 CHARGE_CONTROL_DISCHARGE
,
4376 /* Add no more entry below. */
4377 CHARGE_CONTROL_COUNT
,
4380 #define EC_CHARGE_MODE_TEXT \
4382 [CHARGE_CONTROL_NORMAL] = "NORMAL", \
4383 [CHARGE_CONTROL_IDLE] = "IDLE", \
4384 [CHARGE_CONTROL_DISCHARGE] = "DISCHARGE", \
4387 enum ec_charge_control_cmd
{
4388 EC_CHARGE_CONTROL_CMD_SET
= 0,
4389 EC_CHARGE_CONTROL_CMD_GET
,
4392 struct ec_params_charge_control
{
4393 uint32_t mode
; /* enum charge_control_mode */
4395 /* Below are the fields added in V2. */
4396 uint8_t cmd
; /* enum ec_charge_control_cmd. */
4399 * Lower and upper thresholds for battery sustainer. This struct isn't
4400 * named to avoid tainting foreign projects' name spaces.
4402 * If charge mode is explicitly set (e.g. DISCHARGE), battery sustainer
4403 * will be disabled. To disable battery sustainer, set mode=NORMAL,
4404 * lower=-1, upper=-1.
4407 int8_t lower
; /* Display SoC in percentage. */
4408 int8_t upper
; /* Display SoC in percentage. */
4413 struct ec_response_charge_control
{
4414 uint32_t mode
; /* enum charge_control_mode */
4415 struct { /* Battery sustainer thresholds */
4422 /*****************************************************************************/
4424 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
4425 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
4428 * Read data from the saved snapshot. If the subcmd parameter is
4429 * CONSOLE_READ_NEXT, this will return data starting from the beginning of
4430 * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
4431 * end of the previous snapshot.
4433 * The params are only looked at in version >= 1 of this command. Prior
4434 * versions will just default to CONSOLE_READ_NEXT behavior.
4436 * Response is null-terminated string. Empty string, if there is no more
4439 #define EC_CMD_CONSOLE_READ 0x0098
4441 enum ec_console_read_subcmd
{
4442 CONSOLE_READ_NEXT
= 0,
4443 CONSOLE_READ_RECENT
,
4446 struct ec_params_console_read_v1
{
4447 uint8_t subcmd
; /* enum ec_console_read_subcmd */
4450 /*****************************************************************************/
4453 * Cut off battery power immediately or after the host has shut down.
4455 * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
4456 * EC_RES_SUCCESS if the command was successful.
4457 * EC_RES_ERROR if the cut off command failed.
4459 #define EC_CMD_BATTERY_CUT_OFF 0x0099
4461 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0)
4463 struct ec_params_battery_cutoff
{
4467 /*****************************************************************************/
4468 /* USB port mux control. */
4471 * Switch USB mux or return to automatic switching.
4473 #define EC_CMD_USB_MUX 0x009A
4475 struct ec_params_usb_mux
{
4479 /*****************************************************************************/
4480 /* LDOs / FETs control. */
4483 EC_LDO_STATE_OFF
= 0, /* the LDO / FET is shut down */
4484 EC_LDO_STATE_ON
= 1, /* the LDO / FET is ON / providing power */
4488 * Switch on/off a LDO.
4490 #define EC_CMD_LDO_SET 0x009B
4492 struct ec_params_ldo_set
{
4500 #define EC_CMD_LDO_GET 0x009C
4502 struct ec_params_ldo_get
{
4506 struct ec_response_ldo_get
{
4510 /*****************************************************************************/
4516 * Note: v0 of this command is deprecated
4518 #define EC_CMD_POWER_INFO 0x009D
4521 * v1 of EC_CMD_POWER_INFO
4523 enum system_power_source
{
4525 * Haven't established which power source is used yet,
4526 * or no presence signals are available
4528 POWER_SOURCE_UNKNOWN
= 0,
4529 /* System is running on battery alone */
4530 POWER_SOURCE_BATTERY
= 1,
4531 /* System is running on A/C alone */
4532 POWER_SOURCE_AC
= 2,
4533 /* System is running on A/C and battery */
4534 POWER_SOURCE_AC_BATTERY
= 3,
4537 struct ec_response_power_info_v1
{
4538 /* enum system_power_source */
4539 uint8_t system_power_source
;
4540 /* Battery state-of-charge, 0-100, 0 if not present */
4541 uint8_t battery_soc
;
4542 /* AC Adapter 100% rating, Watts */
4543 uint8_t ac_adapter_100pct
;
4544 /* AC Adapter 10ms rating, Watts */
4545 uint8_t ac_adapter_10ms
;
4546 /* Battery 1C rating, derated */
4547 uint8_t battery_1cd
;
4548 /* Rest of Platform average, Watts */
4550 /* Rest of Platform peak, Watts */
4552 /* Nominal charger efficiency, % */
4553 uint8_t nominal_charger_eff
;
4554 /* Rest of Platform VR Average Efficiency, % */
4555 uint8_t rop_avg_eff
;
4556 /* Rest of Platform VR Peak Efficiency, % */
4557 uint8_t rop_peak_eff
;
4558 /* SoC VR Efficiency at Average level, % */
4559 uint8_t soc_avg_eff
;
4560 /* SoC VR Efficiency at Peak level, % */
4561 uint8_t soc_peak_eff
;
4562 /* Intel-specific items */
4564 /* Battery's level of DBPT support: 0, 2 */
4565 uint8_t batt_dbpt_support_level
;
4567 * Maximum peak power from battery (10ms), Watts
4568 * If DBPT is not supported, this is 0
4570 uint8_t batt_dbpt_max_peak_power
;
4572 * Sustained peak power from battery, Watts
4573 * If DBPT is not supported, this is 0
4575 uint8_t batt_dbpt_sus_peak_power
;
4579 /*****************************************************************************/
4580 /* I2C passthru command */
4582 #define EC_CMD_I2C_PASSTHRU 0x009E
4584 /* Read data; if not present, message is a write */
4585 #define EC_I2C_FLAG_READ BIT(15)
4587 /* Mask for address */
4588 #define EC_I2C_ADDR_MASK 0x3ff
4590 #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */
4591 #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */
4594 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
4596 struct ec_params_i2c_passthru_msg
{
4597 uint16_t addr_flags
; /* I2C peripheral address and flags */
4598 uint16_t len
; /* Number of bytes to read or write */
4601 struct ec_params_i2c_passthru
{
4602 uint8_t port
; /* I2C port number */
4603 uint8_t num_msgs
; /* Number of messages */
4604 struct ec_params_i2c_passthru_msg msg
[];
4605 /* Data to write for all messages is concatenated here */
4608 struct ec_response_i2c_passthru
{
4609 uint8_t i2c_status
; /* Status flags (EC_I2C_STATUS_...) */
4610 uint8_t num_msgs
; /* Number of messages processed */
4611 uint8_t data
[]; /* Data read by messages concatenated here */
4614 /*****************************************************************************/
4615 /* Power button hang detect */
4617 #define EC_CMD_HANG_DETECT 0x009F
4619 /* Reasons to start hang detection timer */
4620 /* Power button pressed */
4621 #define EC_HANG_START_ON_POWER_PRESS BIT(0)
4624 #define EC_HANG_START_ON_LID_CLOSE BIT(1)
4627 #define EC_HANG_START_ON_LID_OPEN BIT(2)
4629 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
4630 #define EC_HANG_START_ON_RESUME BIT(3)
4632 /* Reasons to cancel hang detection */
4634 /* Power button released */
4635 #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8)
4637 /* Any host command from AP received */
4638 #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9)
4640 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
4641 #define EC_HANG_STOP_ON_SUSPEND BIT(10)
4644 * If this flag is set, all the other fields are ignored, and the hang detect
4645 * timer is started. This provides the AP a way to start the hang timer
4646 * without reconfiguring any of the other hang detect settings. Note that
4647 * you must previously have configured the timeouts.
4649 #define EC_HANG_START_NOW BIT(30)
4652 * If this flag is set, all the other fields are ignored (including
4653 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer
4654 * without reconfiguring any of the other hang detect settings.
4656 #define EC_HANG_STOP_NOW BIT(31)
4658 struct ec_params_hang_detect
{
4659 /* Flags; see EC_HANG_* */
4662 /* Timeout in msec before generating host event, if enabled */
4663 uint16_t host_event_timeout_msec
;
4665 /* Timeout in msec before generating warm reboot, if enabled */
4666 uint16_t warm_reboot_timeout_msec
;
4669 /*****************************************************************************/
4670 /* Commands for battery charging */
4673 * This is the single catch-all host command to exchange data regarding the
4674 * charge state machine (v2 and up).
4676 #define EC_CMD_CHARGE_STATE 0x00A0
4678 /* Subcommands for this host command */
4679 enum charge_state_command
{
4680 CHARGE_STATE_CMD_GET_STATE
,
4681 CHARGE_STATE_CMD_GET_PARAM
,
4682 CHARGE_STATE_CMD_SET_PARAM
,
4683 CHARGE_STATE_NUM_CMDS
,
4687 * Known param numbers are defined here. Ranges are reserved for board-specific
4688 * params, which are handled by the particular implementations.
4690 enum charge_state_params
{
4691 /* charger voltage limit */
4692 CS_PARAM_CHG_VOLTAGE
,
4694 /* charger current limit */
4695 CS_PARAM_CHG_CURRENT
,
4697 /* charger input current limit */
4698 CS_PARAM_CHG_INPUT_CURRENT
,
4700 /* charger-specific status */
4701 CS_PARAM_CHG_STATUS
,
4703 /* charger-specific options */
4704 CS_PARAM_CHG_OPTION
,
4707 * Check if power is limited due to low battery and / or a
4708 * weak external charger. READ ONLY.
4710 CS_PARAM_LIMIT_POWER
,
4712 /* How many so far? */
4715 /* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
4716 CS_PARAM_CUSTOM_PROFILE_MIN
= 0x10000,
4717 CS_PARAM_CUSTOM_PROFILE_MAX
= 0x1ffff,
4719 /* Range for CONFIG_CHARGE_STATE_DEBUG params */
4720 CS_PARAM_DEBUG_MIN
= 0x20000,
4721 CS_PARAM_DEBUG_CTL_MODE
= 0x20000,
4722 CS_PARAM_DEBUG_MANUAL_MODE
,
4723 CS_PARAM_DEBUG_SEEMS_DEAD
,
4724 CS_PARAM_DEBUG_SEEMS_DISCONNECTED
,
4725 CS_PARAM_DEBUG_BATT_REMOVED
,
4726 CS_PARAM_DEBUG_MANUAL_CURRENT
,
4727 CS_PARAM_DEBUG_MANUAL_VOLTAGE
,
4728 CS_PARAM_DEBUG_MAX
= 0x2ffff,
4730 /* Other custom param ranges go here... */
4733 struct ec_params_charge_state
{
4734 uint8_t cmd
; /* enum charge_state_command */
4736 /* get_state has no args */
4738 struct __ec_todo_unpacked
{
4739 uint32_t param
; /* enum charge_state_param */
4742 struct __ec_todo_unpacked
{
4743 uint32_t param
; /* param to set */
4744 uint32_t value
; /* value to set */
4747 uint8_t chgnum
; /* Version 1 supports chgnum */
4750 struct ec_response_charge_state
{
4752 struct __ec_align4
{
4756 int chg_input_current
;
4757 int batt_state_of_charge
;
4760 struct __ec_align4
{
4764 /* set_param returns no args */
4769 * Set maximum battery charging current.
4771 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
4773 struct ec_params_current_limit
{
4774 uint32_t limit
; /* in mA */
4778 * Set maximum external voltage / current.
4780 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
4782 /* Command v0 is used only on Spring and is obsolete + unsupported */
4783 struct ec_params_external_power_limit_v1
{
4784 uint16_t current_lim
; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
4785 uint16_t voltage_lim
; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
4788 #define EC_POWER_LIMIT_NONE 0xffff
4791 * Set maximum voltage & current of a dedicated charge port
4793 #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3
4795 struct ec_params_dedicated_charger_limit
{
4796 uint16_t current_lim
; /* in mA */
4797 uint16_t voltage_lim
; /* in mV */
4801 * Get and set charging splashscreen variables
4803 #define EC_CMD_CHARGESPLASH 0x00A5
4805 enum ec_chargesplash_cmd
{
4806 /* Get the current state variables */
4807 EC_CHARGESPLASH_GET_STATE
= 0,
4809 /* Indicate initialization of the display loop */
4810 EC_CHARGESPLASH_DISPLAY_READY
,
4812 /* Manually put the EC into the requested state */
4813 EC_CHARGESPLASH_REQUEST
,
4815 /* Reset all state variables */
4816 EC_CHARGESPLASH_RESET
,
4818 /* Manually trigger a lockout */
4819 EC_CHARGESPLASH_LOCKOUT
,
4822 struct __ec_align1 ec_params_chargesplash
{
4823 /* enum ec_chargesplash_cmd */
4827 struct __ec_align1 ec_response_chargesplash
{
4829 uint8_t display_initialized
;
4833 /*****************************************************************************/
4834 /* Hibernate/Deep Sleep Commands */
4836 /* Set the delay before going into hibernation. */
4837 #define EC_CMD_HIBERNATION_DELAY 0x00A8
4839 struct ec_params_hibernation_delay
{
4841 * Seconds to wait in G3 before hibernate. Pass in 0 to read the
4842 * current settings without changing them.
4847 struct ec_response_hibernation_delay
{
4849 * The current time in seconds in which the system has been in the G3
4850 * state. This value is reset if the EC transitions out of G3.
4855 * The current time remaining in seconds until the EC should hibernate.
4856 * This value is also reset if the EC transitions out of G3.
4858 uint32_t time_remaining
;
4861 * The current time in seconds that the EC should wait in G3 before
4864 uint32_t hibernate_delay
;
4867 /* Inform the EC when entering a sleep state */
4868 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
4870 enum host_sleep_event
{
4871 HOST_SLEEP_EVENT_S3_SUSPEND
= 1,
4872 HOST_SLEEP_EVENT_S3_RESUME
= 2,
4873 HOST_SLEEP_EVENT_S0IX_SUSPEND
= 3,
4874 HOST_SLEEP_EVENT_S0IX_RESUME
= 4,
4875 /* S3 suspend with additional enabled wake sources */
4876 HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND
= 5,
4879 struct ec_params_host_sleep_event
{
4880 uint8_t sleep_event
;
4884 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep
4885 * transition failures
4887 #define EC_HOST_SLEEP_TIMEOUT_DEFAULT 0
4889 /* Disable timeout detection for this sleep transition */
4890 #define EC_HOST_SLEEP_TIMEOUT_INFINITE 0xFFFF
4892 struct ec_params_host_sleep_event_v1
{
4893 /* The type of sleep being entered or exited. */
4894 uint8_t sleep_event
;
4899 /* Parameters that apply for suspend messages. */
4902 * The timeout in milliseconds between when this message
4903 * is received and when the EC will declare sleep
4904 * transition failure if the sleep signal is not
4907 uint16_t sleep_timeout_ms
;
4910 /* No parameters for non-suspend messages. */
4914 /* A timeout occurred when this bit is set */
4915 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000
4918 * The mask defining which bits correspond to the number of sleep transitions,
4919 * as well as the maximum number of suspend line transitions that will be
4920 * reported back to the host.
4922 #define EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK 0x7FFFFFFF
4924 struct ec_response_host_sleep_event_v1
{
4926 /* Response fields that apply for resume messages. */
4929 * The number of sleep power signal transitions that
4930 * occurred since the suspend message. The high bit
4931 * indicates a timeout occurred.
4933 uint32_t sleep_transitions
;
4936 /* No response fields for non-resume messages. */
4940 /*****************************************************************************/
4942 #define EC_CMD_DEVICE_EVENT 0x00AA
4944 enum ec_device_event
{
4945 EC_DEVICE_EVENT_TRACKPAD
,
4946 EC_DEVICE_EVENT_DSP
,
4947 EC_DEVICE_EVENT_WIFI
,
4948 EC_DEVICE_EVENT_WLC
,
4951 enum ec_device_event_param
{
4952 /* Get and clear pending device events */
4953 EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS
,
4954 /* Get device event mask */
4955 EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS
,
4956 /* Set device event mask */
4957 EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS
,
4960 #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32)
4962 struct ec_params_device_event
{
4963 uint32_t event_mask
;
4967 struct ec_response_device_event
{
4968 uint32_t event_mask
;
4971 /*****************************************************************************/
4972 /* Smart battery pass-through */
4974 /* Get / Set 16-bit smart battery registers */
4975 #define EC_CMD_SB_READ_WORD 0x00B0
4976 #define EC_CMD_SB_WRITE_WORD 0x00B1
4978 /* Get / Set string smart battery parameters
4979 * formatted as SMBUS "block".
4981 #define EC_CMD_SB_READ_BLOCK 0x00B2
4982 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
4984 struct ec_params_sb_rd
{
4988 struct ec_response_sb_rd_word
{
4992 struct ec_params_sb_wr_word
{
4997 struct ec_response_sb_rd_block
{
5001 struct ec_params_sb_wr_block
{
5006 /*****************************************************************************/
5007 /* Battery vendor parameters
5009 * Get or set vendor-specific parameters in the battery. Implementations may
5010 * differ between boards or batteries. On a set operation, the response
5011 * contains the actual value set, which may be rounded or clipped from the
5015 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
5017 enum ec_battery_vendor_param_mode
{
5018 BATTERY_VENDOR_PARAM_MODE_GET
= 0,
5019 BATTERY_VENDOR_PARAM_MODE_SET
,
5022 struct ec_params_battery_vendor_param
{
5028 struct ec_response_battery_vendor_param
{
5032 /*****************************************************************************/
5034 * Smart Battery Firmware Update Commands
5036 #define EC_CMD_SB_FW_UPDATE 0x00B5
5038 enum ec_sb_fw_update_subcmd
{
5039 EC_SB_FW_UPDATE_PREPARE
= 0x0,
5040 EC_SB_FW_UPDATE_INFO
= 0x1, /*query sb info */
5041 EC_SB_FW_UPDATE_BEGIN
= 0x2, /*check if protected */
5042 EC_SB_FW_UPDATE_WRITE
= 0x3, /*check if protected */
5043 EC_SB_FW_UPDATE_END
= 0x4,
5044 EC_SB_FW_UPDATE_STATUS
= 0x5,
5045 EC_SB_FW_UPDATE_PROTECT
= 0x6,
5046 EC_SB_FW_UPDATE_MAX
= 0x7,
5049 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
5050 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2
5051 #define SB_FW_UPDATE_CMD_INFO_SIZE 8
5053 struct ec_sb_fw_update_header
{
5054 uint16_t subcmd
; /* enum ec_sb_fw_update_subcmd */
5055 uint16_t fw_id
; /* firmware id */
5058 struct ec_params_sb_fw_update
{
5059 struct ec_sb_fw_update_header hdr
;
5061 /* EC_SB_FW_UPDATE_PREPARE = 0x0 */
5062 /* EC_SB_FW_UPDATE_INFO = 0x1 */
5063 /* EC_SB_FW_UPDATE_BEGIN = 0x2 */
5064 /* EC_SB_FW_UPDATE_END = 0x4 */
5065 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
5066 /* EC_SB_FW_UPDATE_PROTECT = 0x6 */
5067 /* Those have no args */
5069 /* EC_SB_FW_UPDATE_WRITE = 0x3 */
5070 struct __ec_align4
{
5071 uint8_t data
[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE
];
5076 struct ec_response_sb_fw_update
{
5078 /* EC_SB_FW_UPDATE_INFO = 0x1 */
5079 struct __ec_align1
{
5080 uint8_t data
[SB_FW_UPDATE_CMD_INFO_SIZE
];
5083 /* EC_SB_FW_UPDATE_STATUS = 0x5 */
5084 struct __ec_align1
{
5085 uint8_t data
[SB_FW_UPDATE_CMD_STATUS_SIZE
];
5091 * Entering Verified Boot Mode Command
5092 * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
5093 * Valid Modes are: normal, developer, and recovery.
5095 * EC no longer needs to know what mode vboot has entered,
5096 * so this command is deprecated. (See chromium:1014379.)
5098 #define EC_CMD_ENTERING_MODE 0x00B6
5100 struct ec_params_entering_mode
{
5104 #define VBOOT_MODE_NORMAL 0
5105 #define VBOOT_MODE_DEVELOPER 1
5106 #define VBOOT_MODE_RECOVERY 2
5108 /*****************************************************************************/
5110 * I2C passthru protection command: Protects I2C tunnels against access on
5111 * certain addresses (board-specific).
5113 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
5115 enum ec_i2c_passthru_protect_subcmd
{
5116 EC_CMD_I2C_PASSTHRU_PROTECT_STATUS
= 0,
5117 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE
= 1,
5118 EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE_TCPCS
= 2,
5121 struct ec_params_i2c_passthru_protect
{
5123 uint8_t port
; /* I2C port number */
5126 struct ec_response_i2c_passthru_protect
{
5127 uint8_t status
; /* Status flags (0: unlocked, 1: locked) */
5130 /*****************************************************************************/
5134 * These commands are for sending and receiving message via HDMI CEC
5137 #define MAX_CEC_MSG_LEN 16
5139 /* CEC message from the AP to be written on the CEC bus */
5140 #define EC_CMD_CEC_WRITE_MSG 0x00B8
5143 * struct ec_params_cec_write - Message to write to the CEC bus
5144 * @msg: message content to write to the CEC bus
5146 struct ec_params_cec_write
{
5147 uint8_t msg
[MAX_CEC_MSG_LEN
];
5150 /* Set various CEC parameters */
5151 #define EC_CMD_CEC_SET 0x00BA
5154 * struct ec_params_cec_set - CEC parameters set
5155 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
5156 * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC
5157 * or 1 to enable CEC functionality, in case cmd is
5158 * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical
5159 * address between 0 and 15 or 0xff to unregister
5161 struct ec_params_cec_set
{
5162 uint8_t cmd
; /* enum cec_command */
5166 /* Read various CEC parameters */
5167 #define EC_CMD_CEC_GET 0x00BB
5170 * struct ec_params_cec_get - CEC parameters get
5171 * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS
5173 struct ec_params_cec_get
{
5174 uint8_t cmd
; /* enum cec_command */
5178 * struct ec_response_cec_get - CEC parameters get response
5179 * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is
5180 * disabled or 1 if CEC functionality is enabled,
5181 * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the
5182 * configured logical address between 0 and 15 or 0xff if unregistered
5184 struct ec_response_cec_get
{
5188 /* CEC parameters command */
5190 /* CEC reading, writing and events enable */
5192 /* CEC logical address */
5193 CEC_CMD_LOGICAL_ADDRESS
,
5196 /* Events from CEC to AP */
5197 enum mkbp_cec_event
{
5198 /* Outgoing message was acknowledged by a follower */
5199 EC_MKBP_CEC_SEND_OK
= BIT(0),
5200 /* Outgoing message was not acknowledged */
5201 EC_MKBP_CEC_SEND_FAILED
= BIT(1),
5204 /*****************************************************************************/
5206 /* Commands for audio codec. */
5207 #define EC_CMD_EC_CODEC 0x00BC
5209 enum ec_codec_subcmd
{
5210 EC_CODEC_GET_CAPABILITIES
= 0x0,
5211 EC_CODEC_GET_SHM_ADDR
= 0x1,
5212 EC_CODEC_SET_SHM_ADDR
= 0x2,
5213 EC_CODEC_SUBCMD_COUNT
,
5217 EC_CODEC_CAP_WOV_AUDIO_SHM
= 0,
5218 EC_CODEC_CAP_WOV_LANG_SHM
= 1,
5219 EC_CODEC_CAP_LAST
= 32,
5222 enum ec_codec_shm_id
{
5223 EC_CODEC_SHM_ID_WOV_AUDIO
= 0x0,
5224 EC_CODEC_SHM_ID_WOV_LANG
= 0x1,
5225 EC_CODEC_SHM_ID_LAST
,
5228 enum ec_codec_shm_type
{
5229 EC_CODEC_SHM_TYPE_EC_RAM
= 0x0,
5230 EC_CODEC_SHM_TYPE_SYSTEM_RAM
= 0x1,
5233 struct __ec_align1 ec_param_ec_codec_get_shm_addr
{
5235 uint8_t reserved
[3];
5238 struct __ec_align4 ec_param_ec_codec_set_shm_addr
{
5242 uint8_t reserved
[3];
5245 struct __ec_align4 ec_param_ec_codec
{
5246 uint8_t cmd
; /* enum ec_codec_subcmd */
5247 uint8_t reserved
[3];
5250 struct ec_param_ec_codec_get_shm_addr get_shm_addr_param
;
5251 struct ec_param_ec_codec_set_shm_addr set_shm_addr_param
;
5255 struct __ec_align4 ec_response_ec_codec_get_capabilities
{
5256 uint32_t capabilities
;
5259 struct __ec_align4 ec_response_ec_codec_get_shm_addr
{
5263 uint8_t reserved
[3];
5266 /*****************************************************************************/
5268 /* Commands for DMIC on audio codec. */
5269 #define EC_CMD_EC_CODEC_DMIC 0x00BD
5271 enum ec_codec_dmic_subcmd
{
5272 EC_CODEC_DMIC_GET_MAX_GAIN
= 0x0,
5273 EC_CODEC_DMIC_SET_GAIN_IDX
= 0x1,
5274 EC_CODEC_DMIC_GET_GAIN_IDX
= 0x2,
5275 EC_CODEC_DMIC_SUBCMD_COUNT
,
5278 enum ec_codec_dmic_channel
{
5279 EC_CODEC_DMIC_CHANNEL_0
= 0x0,
5280 EC_CODEC_DMIC_CHANNEL_1
= 0x1,
5281 EC_CODEC_DMIC_CHANNEL_2
= 0x2,
5282 EC_CODEC_DMIC_CHANNEL_3
= 0x3,
5283 EC_CODEC_DMIC_CHANNEL_4
= 0x4,
5284 EC_CODEC_DMIC_CHANNEL_5
= 0x5,
5285 EC_CODEC_DMIC_CHANNEL_6
= 0x6,
5286 EC_CODEC_DMIC_CHANNEL_7
= 0x7,
5287 EC_CODEC_DMIC_CHANNEL_COUNT
,
5290 struct __ec_align1 ec_param_ec_codec_dmic_set_gain_idx
{
5291 uint8_t channel
; /* enum ec_codec_dmic_channel */
5293 uint8_t reserved
[2];
5296 struct __ec_align1 ec_param_ec_codec_dmic_get_gain_idx
{
5297 uint8_t channel
; /* enum ec_codec_dmic_channel */
5298 uint8_t reserved
[3];
5301 struct __ec_align4 ec_param_ec_codec_dmic
{
5302 uint8_t cmd
; /* enum ec_codec_dmic_subcmd */
5303 uint8_t reserved
[3];
5306 struct ec_param_ec_codec_dmic_set_gain_idx set_gain_idx_param
;
5307 struct ec_param_ec_codec_dmic_get_gain_idx get_gain_idx_param
;
5311 struct __ec_align1 ec_response_ec_codec_dmic_get_max_gain
{
5315 struct __ec_align1 ec_response_ec_codec_dmic_get_gain_idx
{
5319 /*****************************************************************************/
5321 /* Commands for I2S RX on audio codec. */
5323 #define EC_CMD_EC_CODEC_I2S_RX 0x00BE
5325 enum ec_codec_i2s_rx_subcmd
{
5326 EC_CODEC_I2S_RX_ENABLE
= 0x0,
5327 EC_CODEC_I2S_RX_DISABLE
= 0x1,
5328 EC_CODEC_I2S_RX_SET_SAMPLE_DEPTH
= 0x2,
5329 EC_CODEC_I2S_RX_SET_DAIFMT
= 0x3,
5330 EC_CODEC_I2S_RX_SET_BCLK
= 0x4,
5331 EC_CODEC_I2S_RX_RESET
= 0x5,
5332 EC_CODEC_I2S_RX_SUBCMD_COUNT
,
5335 enum ec_codec_i2s_rx_sample_depth
{
5336 EC_CODEC_I2S_RX_SAMPLE_DEPTH_16
= 0x0,
5337 EC_CODEC_I2S_RX_SAMPLE_DEPTH_24
= 0x1,
5338 EC_CODEC_I2S_RX_SAMPLE_DEPTH_COUNT
,
5341 enum ec_codec_i2s_rx_daifmt
{
5342 EC_CODEC_I2S_RX_DAIFMT_I2S
= 0x0,
5343 EC_CODEC_I2S_RX_DAIFMT_RIGHT_J
= 0x1,
5344 EC_CODEC_I2S_RX_DAIFMT_LEFT_J
= 0x2,
5345 EC_CODEC_I2S_RX_DAIFMT_COUNT
,
5348 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_sample_depth
{
5350 uint8_t reserved
[3];
5353 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_gain
{
5356 uint8_t reserved
[2];
5359 struct __ec_align1 ec_param_ec_codec_i2s_rx_set_daifmt
{
5361 uint8_t reserved
[3];
5364 struct __ec_align4 ec_param_ec_codec_i2s_rx_set_bclk
{
5368 struct __ec_align4 ec_param_ec_codec_i2s_rx
{
5369 uint8_t cmd
; /* enum ec_codec_i2s_rx_subcmd */
5370 uint8_t reserved
[3];
5373 struct ec_param_ec_codec_i2s_rx_set_sample_depth
5374 set_sample_depth_param
;
5375 struct ec_param_ec_codec_i2s_rx_set_daifmt set_daifmt_param
;
5376 struct ec_param_ec_codec_i2s_rx_set_bclk set_bclk_param
;
5380 /*****************************************************************************/
5381 /* Commands for WoV on audio codec. */
5383 #define EC_CMD_EC_CODEC_WOV 0x00BF
5385 enum ec_codec_wov_subcmd
{
5386 EC_CODEC_WOV_SET_LANG
= 0x0,
5387 EC_CODEC_WOV_SET_LANG_SHM
= 0x1,
5388 EC_CODEC_WOV_GET_LANG
= 0x2,
5389 EC_CODEC_WOV_ENABLE
= 0x3,
5390 EC_CODEC_WOV_DISABLE
= 0x4,
5391 EC_CODEC_WOV_READ_AUDIO
= 0x5,
5392 EC_CODEC_WOV_READ_AUDIO_SHM
= 0x6,
5393 EC_CODEC_WOV_SUBCMD_COUNT
,
5397 * @hash is SHA256 of the whole language model.
5398 * @total_len indicates the length of whole language model.
5399 * @offset is the cursor from the beginning of the model.
5400 * @buf is the packet buffer.
5401 * @len denotes how many bytes in the buf.
5403 struct __ec_align4 ec_param_ec_codec_wov_set_lang
{
5411 struct __ec_align4 ec_param_ec_codec_wov_set_lang_shm
{
5416 struct __ec_align4 ec_param_ec_codec_wov
{
5417 uint8_t cmd
; /* enum ec_codec_wov_subcmd */
5418 uint8_t reserved
[3];
5421 struct ec_param_ec_codec_wov_set_lang set_lang_param
;
5422 struct ec_param_ec_codec_wov_set_lang_shm set_lang_shm_param
;
5426 struct __ec_align4 ec_response_ec_codec_wov_get_lang
{
5430 struct __ec_align4 ec_response_ec_codec_wov_read_audio
{
5435 struct __ec_align4 ec_response_ec_codec_wov_read_audio_shm
{
5440 /*****************************************************************************/
5441 /* Commands for PoE PSE controller */
5443 #define EC_CMD_PSE 0x00C0
5445 enum ec_pse_subcmd
{
5446 EC_PSE_STATUS
= 0x0,
5447 EC_PSE_ENABLE
= 0x1,
5448 EC_PSE_DISABLE
= 0x2,
5449 EC_PSE_SUBCMD_COUNT
,
5452 struct __ec_align1 ec_params_pse
{
5453 uint8_t cmd
; /* enum ec_pse_subcmd */
5454 uint8_t port
; /* PSE port */
5457 enum ec_pse_status
{
5458 EC_PSE_STATUS_DISABLED
= 0x0,
5459 EC_PSE_STATUS_ENABLED
= 0x1,
5460 EC_PSE_STATUS_POWERED
= 0x2,
5463 struct __ec_align1 ec_response_pse_status
{
5464 uint8_t status
; /* enum ec_pse_status */
5467 /*****************************************************************************/
5468 /* System commands */
5471 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
5472 * necessarily reboot the EC. Rename to "image" or something similar?
5474 #define EC_CMD_REBOOT_EC 0x00D2
5477 enum ec_reboot_cmd
{
5478 EC_REBOOT_CANCEL
= 0, /* Cancel a pending reboot */
5479 EC_REBOOT_JUMP_RO
= 1, /* Jump to RO without rebooting */
5480 EC_REBOOT_JUMP_RW
= 2, /* Jump to active RW without rebooting */
5481 /* (command 3 was jump to RW-B) */
5482 EC_REBOOT_COLD
= 4, /* Cold-reboot */
5483 EC_REBOOT_DISABLE_JUMP
= 5, /* Disable jump until next reboot */
5484 EC_REBOOT_HIBERNATE
= 6, /* Hibernate EC */
5486 * DEPRECATED: Hibernate EC and clears AP_IDLE flag.
5487 * Use EC_REBOOT_HIBERNATE and EC_REBOOT_FLAG_CLEAR_AP_IDLE, instead.
5489 EC_REBOOT_HIBERNATE_CLEAR_AP_OFF
= 7,
5490 EC_REBOOT_COLD_AP_OFF
= 8, /* Cold-reboot and don't boot AP */
5491 EC_REBOOT_NO_OP
= 9, /* Do nothing but apply the flags. */
5494 /* Flags for ec_params_reboot_ec.reboot_flags */
5495 #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */
5496 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */
5497 #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */
5498 #define EC_REBOOT_FLAG_CLEAR_AP_IDLE BIT(3) /* Clear AP_IDLE flag */
5500 struct ec_params_reboot_ec
{
5501 uint8_t cmd
; /* enum ec_reboot_cmd */
5502 uint8_t flags
; /* See EC_REBOOT_FLAG_* */
5506 * Get information on last EC panic.
5508 * Returns variable-length platform-dependent panic information. See panic.h
5511 #define EC_CMD_GET_PANIC_INFO 0x00D3
5513 /*****************************************************************************/
5517 * These do not follow the normal rules for commands. See each command for
5524 * This command will work even when the EC LPC interface is busy, because the
5525 * reboot command is processed at interrupt level. Note that when the EC
5526 * reboots, the host will reboot too, so there is no response to this command.
5528 * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
5530 #define EC_CMD_REBOOT 0x00D1 /* Think "die" */
5533 * Resend last response (not supported on LPC).
5535 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
5536 * there was no previous command, or the previous command's response was too
5539 #define EC_CMD_RESEND_RESPONSE 0x00DB
5542 * This header byte on a command indicate version 0. Any header byte less
5543 * than this means that we are talking to an old EC which doesn't support
5544 * versioning. In that case, we assume version 0.
5546 * Header bytes greater than this indicate a later version. For example,
5547 * EC_CMD_VERSION0 + 1 means we are using version 1.
5549 * The old EC interface must not use commands 0xdc or higher.
5551 #define EC_CMD_VERSION0 0x00DC
5553 /*****************************************************************************/
5557 * These commands are for PD MCU communication.
5560 /* EC to PD MCU exchange status command */
5561 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
5562 #define EC_VER_PD_EXCHANGE_STATUS 2
5564 enum pd_charge_state
{
5565 /* Don't change charge state */
5566 PD_CHARGE_NO_CHANGE
= 0,
5568 /* No charging allowed */
5571 /* 5V charging only */
5574 /* Charge at max voltage */
5578 /* Status of EC being sent to PD */
5579 #define EC_STATUS_HIBERNATING BIT(0)
5581 struct ec_params_pd_status
{
5585 /* battery state of charge */
5588 /* charging state (from enum pd_charge_state) */
5589 uint8_t charge_state
;
5592 /* Status of PD being sent back to EC */
5593 #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */
5594 #define PD_STATUS_IN_RW BIT(1) /* Running RW image */
5595 #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */
5596 #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */
5597 #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */
5598 #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */
5599 #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */
5600 #define PD_STATUS_EC_INT_ACTIVE \
5601 (PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_1 | PD_STATUS_HOST_EVENT)
5602 struct ec_response_pd_status
{
5603 /* input current limit */
5604 uint32_t curr_lim_ma
;
5609 /* active charging port */
5610 int8_t active_charge_port
;
5613 /* AP to PD MCU host event status command, cleared on read */
5614 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
5616 /* PD MCU host event status bits */
5617 #define PD_EVENT_UPDATE_DEVICE BIT(0)
5618 #define PD_EVENT_POWER_CHANGE BIT(1)
5619 #define PD_EVENT_IDENTITY_RECEIVED BIT(2)
5620 #define PD_EVENT_DATA_SWAP BIT(3)
5621 #define PD_EVENT_TYPEC BIT(4)
5623 struct ec_response_host_event_status
{
5624 uint32_t status
; /* PD MCU host event status */
5628 * Set USB type-C port role and muxes
5630 * Deprecated in favor of TYPEC_STATUS and TYPEC_CONTROL commands.
5632 * TODO(b/169771803): TCPMv2: Remove EC_CMD_USB_PD_CONTROL
5634 #define EC_CMD_USB_PD_CONTROL 0x0101
5636 enum usb_pd_control_role
{
5637 USB_PD_CTRL_ROLE_NO_CHANGE
= 0,
5638 USB_PD_CTRL_ROLE_TOGGLE_ON
= 1, /* == AUTO */
5639 USB_PD_CTRL_ROLE_TOGGLE_OFF
= 2,
5640 USB_PD_CTRL_ROLE_FORCE_SINK
= 3,
5641 USB_PD_CTRL_ROLE_FORCE_SOURCE
= 4,
5642 USB_PD_CTRL_ROLE_FREEZE
= 5,
5643 USB_PD_CTRL_ROLE_COUNT
,
5646 enum usb_pd_control_mux
{
5647 USB_PD_CTRL_MUX_NO_CHANGE
= 0,
5648 USB_PD_CTRL_MUX_NONE
= 1,
5649 USB_PD_CTRL_MUX_USB
= 2,
5650 USB_PD_CTRL_MUX_DP
= 3,
5651 USB_PD_CTRL_MUX_DOCK
= 4,
5652 USB_PD_CTRL_MUX_AUTO
= 5,
5653 USB_PD_CTRL_MUX_COUNT
,
5656 enum usb_pd_control_swap
{
5657 USB_PD_CTRL_SWAP_NONE
= 0,
5658 USB_PD_CTRL_SWAP_DATA
= 1,
5659 USB_PD_CTRL_SWAP_POWER
= 2,
5660 USB_PD_CTRL_SWAP_VCONN
= 3,
5661 USB_PD_CTRL_SWAP_COUNT
,
5664 struct ec_params_usb_pd_control
{
5671 #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */
5672 #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */
5673 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */
5675 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */
5676 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */
5677 #define PD_CTRL_RESP_ROLE_VCONN BIT(2) /* Vconn status */
5678 #define PD_CTRL_RESP_ROLE_DR_POWER BIT(3) /* Partner is dualrole power */
5679 #define PD_CTRL_RESP_ROLE_DR_DATA BIT(4) /* Partner is dualrole data */
5680 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */
5681 /* Partner unconstrained power */
5682 #define PD_CTRL_RESP_ROLE_UNCONSTRAINED BIT(6)
5684 struct ec_response_usb_pd_control
{
5691 struct ec_response_usb_pd_control_v1
{
5698 /* Possible port partner connections based on CC line states */
5700 PD_CC_NONE
= 0, /* No port partner attached */
5702 /* From DFP perspective */
5703 PD_CC_UFP_NONE
= 1, /* No UFP accessory connected */
5704 PD_CC_UFP_AUDIO_ACC
= 2, /* UFP Audio accessory connected */
5705 PD_CC_UFP_DEBUG_ACC
= 3, /* UFP Debug accessory connected */
5706 PD_CC_UFP_ATTACHED
= 4, /* Plain UFP attached */
5708 /* From UFP perspective */
5709 PD_CC_DFP_ATTACHED
= 5, /* Plain DFP attached */
5710 PD_CC_DFP_DEBUG_ACC
= 6, /* DFP debug accessory connected */
5713 /* Active/Passive Cable */
5714 #define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
5715 /* Optical/Non-optical cable */
5716 #define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
5717 /* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
5718 #define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
5719 /* Active Link Uni-Direction */
5720 #define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
5722 struct ec_response_usb_pd_control_v2
{
5727 uint8_t cc_state
; /* enum pd_cc_states representing cc state */
5728 uint8_t dp_mode
; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
5729 uint8_t reserved
; /* Reserved for future use */
5730 uint8_t control_flags
; /* USB_PD_CTRL_*flags */
5731 uint8_t cable_speed
; /* TBT_SS_* cable speed */
5732 uint8_t cable_gen
; /* TBT_GEN3_* cable rounded support */
5735 #define EC_CMD_USB_PD_PORTS 0x0102
5737 /* Maximum number of PD ports on a device, num_ports will be <= this */
5738 #define EC_USB_PD_MAX_PORTS 8
5740 struct ec_response_usb_pd_ports
{
5744 #define EC_CMD_USB_PD_POWER_INFO 0x0103
5746 #define PD_POWER_CHARGING_PORT 0xff
5747 struct ec_params_usb_pd_power_info
{
5755 USB_CHG_TYPE_PROPRIETARY
,
5756 USB_CHG_TYPE_BC12_DCP
,
5757 USB_CHG_TYPE_BC12_CDP
,
5758 USB_CHG_TYPE_BC12_SDP
,
5761 USB_CHG_TYPE_UNKNOWN
,
5762 USB_CHG_TYPE_DEDICATED
,
5764 enum usb_power_roles
{
5765 USB_PD_PORT_POWER_DISCONNECTED
,
5766 USB_PD_PORT_POWER_SOURCE
,
5767 USB_PD_PORT_POWER_SINK
,
5768 USB_PD_PORT_POWER_SINK_NOT_CHARGING
,
5771 struct usb_chg_measures
{
5772 uint16_t voltage_max
;
5773 uint16_t voltage_now
;
5774 uint16_t current_max
;
5775 uint16_t current_lim
;
5778 struct ec_response_usb_pd_power_info
{
5783 struct usb_chg_measures meas
;
5788 * This command will return the number of USB PD charge port + the number
5789 * of dedicated port present.
5790 * EC_CMD_USB_PD_PORTS does NOT include the dedicated ports
5792 #define EC_CMD_CHARGE_PORT_COUNT 0x0105
5793 struct ec_response_charge_port_count
{
5798 * This command enable/disable dynamic PDO selection.
5800 #define EC_CMD_USB_PD_DPS_CONTROL 0x0106
5802 struct ec_params_usb_pd_dps_control
{
5806 /* Write USB-PD device FW */
5807 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
5809 enum usb_pd_fw_update_cmds
{
5811 USB_PD_FW_FLASH_ERASE
,
5812 USB_PD_FW_FLASH_WRITE
,
5813 USB_PD_FW_ERASE_SIG
,
5816 struct ec_params_usb_pd_fw_update
{
5821 /* Size to write in bytes */
5824 /* Followed by data to write */
5827 /* Write USB-PD Accessory RW_HASH table entry */
5828 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
5829 /* RW hash is first 20 bytes of SHA-256 of RW section */
5830 #define PD_RW_HASH_SIZE 20
5831 struct ec_params_usb_pd_rw_hash_entry
{
5833 uint8_t dev_rw_hash
[PD_RW_HASH_SIZE
];
5836 * Reserved for alignment of current_image
5837 * TODO(rspangler) but it's not aligned!
5838 * Should have been reserved[2].
5842 /* One of ec_image */
5843 uint32_t current_image
;
5846 /* Read USB-PD Accessory info */
5847 #define EC_CMD_USB_PD_DEV_INFO 0x0112
5849 struct ec_params_usb_pd_info_request
{
5853 /* Read USB-PD Device discovery info */
5854 #define EC_CMD_USB_PD_DISCOVERY 0x0113
5855 struct ec_params_usb_pd_discovery_entry
{
5856 uint16_t vid
; /* USB-IF VID */
5857 uint16_t pid
; /* USB-IF PID */
5858 uint8_t ptype
; /* product type (hub,periph,cable,ama) */
5861 /* Override default charge behavior */
5862 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
5864 /* Negative port parameters have special meaning */
5865 enum usb_pd_override_ports
{
5866 OVERRIDE_DONT_CHARGE
= -2,
5868 /* [0, CONFIG_USB_PD_PORT_MAX_COUNT): Port# */
5871 struct ec_params_charge_port_override
{
5872 int16_t override_port
; /* Override port# */
5876 * Read (and delete) one entry of PD event log.
5877 * TODO(crbug.com/751742): Make this host command more generic to accommodate
5878 * future non-PD logs that use the same internal EC event_log.
5880 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
5882 struct ec_response_pd_log
{
5883 uint32_t timestamp
; /* relative timestamp in milliseconds */
5884 uint8_t type
; /* event type : see PD_EVENT_xx below */
5885 uint8_t size_port
; /* [7:5] port number [4:0] payload size in bytes */
5886 uint16_t data
; /* type-defined data payload */
5887 uint8_t payload
[0]; /* optional additional data payload: 0..16 bytes */
5890 /* The timestamp is the microsecond counter shifted to get about a ms. */
5891 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
5893 #define PD_LOG_SIZE_MASK 0x1f
5894 #define PD_LOG_PORT_MASK 0xe0
5895 #define PD_LOG_PORT_SHIFT 5
5896 #define PD_LOG_PORT_SIZE(port, size) \
5897 (((port) << PD_LOG_PORT_SHIFT) | ((size)&PD_LOG_SIZE_MASK))
5898 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
5899 #define PD_LOG_SIZE(size_port) ((size_port)&PD_LOG_SIZE_MASK)
5901 /* PD event log : entry types */
5903 #define PD_EVENT_MCU_BASE 0x00
5904 #define PD_EVENT_MCU_CHARGE (PD_EVENT_MCU_BASE + 0)
5905 #define PD_EVENT_MCU_CONNECT (PD_EVENT_MCU_BASE + 1)
5906 /* Reserved for custom board event */
5907 #define PD_EVENT_MCU_BOARD_CUSTOM (PD_EVENT_MCU_BASE + 2)
5908 /* PD generic accessory events */
5909 #define PD_EVENT_ACC_BASE 0x20
5910 #define PD_EVENT_ACC_RW_FAIL (PD_EVENT_ACC_BASE + 0)
5911 #define PD_EVENT_ACC_RW_ERASE (PD_EVENT_ACC_BASE + 1)
5912 /* PD power supply events */
5913 #define PD_EVENT_PS_BASE 0x40
5914 #define PD_EVENT_PS_FAULT (PD_EVENT_PS_BASE + 0)
5915 /* PD video dongles events */
5916 #define PD_EVENT_VIDEO_BASE 0x60
5917 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE + 0)
5918 #define PD_EVENT_VIDEO_CODEC (PD_EVENT_VIDEO_BASE + 1)
5919 /* Returned in the "type" field, when there is no entry available */
5920 #define PD_EVENT_NO_ENTRY 0xff
5923 * PD_EVENT_MCU_CHARGE event definition :
5924 * the payload is "struct usb_chg_measures"
5925 * the data field contains the port state flags as defined below :
5927 /* Port partner is a dual role device */
5928 #define CHARGE_FLAGS_DUAL_ROLE BIT(15)
5929 /* Port is the pending override port */
5930 #define CHARGE_FLAGS_DELAYED_OVERRIDE BIT(14)
5931 /* Port is the override port */
5932 #define CHARGE_FLAGS_OVERRIDE BIT(13)
5934 #define CHARGE_FLAGS_TYPE_SHIFT 3
5935 #define CHARGE_FLAGS_TYPE_MASK (0xf << CHARGE_FLAGS_TYPE_SHIFT)
5936 /* Power delivery role */
5937 #define CHARGE_FLAGS_ROLE_MASK (7 << 0)
5940 * PD_EVENT_PS_FAULT data field flags definition :
5942 #define PS_FAULT_OCP 1
5943 #define PS_FAULT_FAST_OCP 2
5944 #define PS_FAULT_OVP 3
5945 #define PS_FAULT_DISCH 4
5948 * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
5950 struct mcdp_version
{
5959 struct mcdp_version irom
;
5960 struct mcdp_version fw
;
5963 /* struct mcdp_info field decoding */
5964 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
5965 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
5967 /* Get/Set USB-PD Alternate mode info */
5968 #define EC_CMD_USB_PD_GET_AMODE 0x0116
5969 struct ec_params_usb_pd_get_mode_request
{
5970 uint16_t svid_idx
; /* SVID index to get */
5971 uint8_t port
; /* port */
5974 struct ec_params_usb_pd_get_mode_response
{
5975 uint16_t svid
; /* SVID */
5976 uint16_t opos
; /* Object Position */
5977 uint32_t vdo
[6]; /* Mode VDOs */
5980 #define EC_CMD_USB_PD_SET_AMODE 0x0117
5985 /* Not a command. Do NOT remove. */
5989 struct ec_params_usb_pd_set_mode_request
{
5990 uint32_t cmd
; /* enum pd_mode_cmd */
5991 uint16_t svid
; /* SVID to set */
5992 uint8_t opos
; /* Object Position */
5993 uint8_t port
; /* port */
5996 /* Ask the PD MCU to record a log of a requested type */
5997 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
5999 struct ec_params_pd_write_log_entry
{
6000 uint8_t type
; /* event type : see PD_EVENT_xx above */
6001 uint8_t port
; /* port#, or 0 for events unrelated to a given port */
6004 /* Control USB-PD chip */
6005 #define EC_CMD_PD_CONTROL 0x0119
6007 enum ec_pd_control_cmd
{
6008 PD_SUSPEND
= 0, /* Suspend the PD chip (EC: stop talking to PD) */
6009 PD_RESUME
, /* Resume the PD chip (EC: start talking to PD) */
6010 PD_RESET
, /* Force reset the PD chip */
6011 PD_CONTROL_DISABLE
, /* Disable further calls to this command */
6012 PD_CHIP_ON
, /* Power on the PD chip */
6015 struct ec_params_pd_control
{
6016 uint8_t chip
; /* chip id */
6020 /* Get info about USB-C SS muxes */
6021 #define EC_CMD_USB_PD_MUX_INFO 0x011A
6023 struct ec_params_usb_pd_mux_info
{
6024 uint8_t port
; /* USB-C port number */
6027 /* Flags representing mux state */
6028 #define USB_PD_MUX_NONE 0 /* Open switch */
6029 #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
6030 #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
6031 #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
6032 #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
6033 #define USB_PD_MUX_HPD_IRQ_DEASSERTED 0 /* HPD IRQ is deasserted */
6034 #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
6035 #define USB_PD_MUX_HPD_LVL_DEASSERTED 0 /* HPD level is deasserted */
6036 #define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
6037 #define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
6038 #define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
6040 /* USB-C Dock connected */
6041 #define USB_PD_MUX_DOCK (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED)
6043 struct ec_response_usb_pd_mux_info
{
6044 uint8_t flags
; /* USB_PD_MUX_*-encoded USB mux state */
6047 #define EC_CMD_PD_CHIP_INFO 0x011B
6049 struct ec_params_pd_chip_info
{
6050 uint8_t port
; /* USB-C port number */
6052 * Fetch the live chip info or hard-coded + cached chip info
6053 * 0: hardcoded value for VID/PID, cached value for FW version
6054 * 1: live chip value for VID/PID/FW Version
6059 struct ec_response_pd_chip_info
{
6061 uint16_t product_id
;
6064 uint8_t fw_version_string
[8];
6065 uint64_t fw_version_number
;
6069 struct ec_response_pd_chip_info_v1
{
6071 uint16_t product_id
;
6074 uint8_t fw_version_string
[8];
6075 uint64_t fw_version_number
;
6078 uint8_t min_req_fw_version_string
[8];
6079 uint64_t min_req_fw_version_number
;
6083 /* Run RW signature verification and get status */
6084 #define EC_CMD_RWSIG_CHECK_STATUS 0x011C
6086 struct ec_response_rwsig_check_status
{
6090 /* For controlling RWSIG task */
6091 #define EC_CMD_RWSIG_ACTION 0x011D
6094 RWSIG_ACTION_ABORT
= 0, /* Abort RWSIG and prevent jumping */
6095 RWSIG_ACTION_CONTINUE
= 1, /* Jump to RW immediately */
6098 struct ec_params_rwsig_action
{
6102 /* Run verification on a slot */
6103 #define EC_CMD_EFS_VERIFY 0x011E
6105 struct ec_params_efs_verify
{
6106 uint8_t region
; /* enum ec_flash_region */
6110 * Retrieve info from Cros Board Info store. Response is based on the data
6111 * type. Integers return a uint32. Strings return a string, using the response
6112 * size to determine how big it is.
6114 #define EC_CMD_GET_CROS_BOARD_INFO 0x011F
6116 * Write info into Cros Board Info on EEPROM. Write fails if the board has
6117 * hardware write-protect enabled.
6119 #define EC_CMD_SET_CROS_BOARD_INFO 0x0120
6122 CBI_TAG_BOARD_VERSION
= 0, /* uint32_t or smaller */
6123 CBI_TAG_OEM_ID
= 1, /* uint32_t or smaller */
6124 CBI_TAG_SKU_ID
= 2, /* uint32_t or smaller */
6125 CBI_TAG_DRAM_PART_NUM
= 3, /* variable length ascii, nul terminated. */
6126 CBI_TAG_OEM_NAME
= 4, /* variable length ascii, nul terminated. */
6127 CBI_TAG_MODEL_ID
= 5, /* uint32_t or smaller */
6128 CBI_TAG_FW_CONFIG
= 6, /* uint32_t bit field */
6129 CBI_TAG_PCB_SUPPLIER
= 7, /* uint32_t or smaller */
6130 /* Second Source Factory Cache */
6131 CBI_TAG_SSFC
= 8, /* uint32_t bit field */
6132 CBI_TAG_REWORK_ID
= 9, /* uint64_t or smaller */
6133 CBI_TAG_FACTORY_CALIBRATION_DATA
= 10, /* uint32_t bit field */
6138 * Flags to control read operation
6140 * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify
6141 * write was successful without reboot.
6143 #define CBI_GET_RELOAD BIT(0)
6145 struct ec_params_get_cbi
{
6146 uint32_t tag
; /* enum cbi_data_tag */
6147 uint32_t flag
; /* CBI_GET_* */
6151 * Flags to control write behavior.
6153 * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's
6154 * useful when writing multiple fields in a row.
6155 * INIT: Need to be set when creating a new CBI from scratch. All fields
6156 * will be initialized to zero first.
6158 #define CBI_SET_NO_SYNC BIT(0)
6159 #define CBI_SET_INIT BIT(1)
6161 struct ec_params_set_cbi
{
6162 uint32_t tag
; /* enum cbi_data_tag */
6163 uint32_t flag
; /* CBI_SET_* */
6164 uint32_t size
; /* Data size */
6165 uint8_t data
[]; /* For string and raw data */
6169 * Information about resets of the AP by the EC and the EC's own uptime.
6171 #define EC_CMD_GET_UPTIME_INFO 0x0121
6173 /* EC reset causes */
6174 #define EC_RESET_FLAG_OTHER BIT(0) /* Other known reason */
6175 #define EC_RESET_FLAG_RESET_PIN BIT(1) /* Reset pin asserted */
6176 #define EC_RESET_FLAG_BROWNOUT BIT(2) /* Brownout */
6177 #define EC_RESET_FLAG_POWER_ON BIT(3) /* Power-on reset */
6178 #define EC_RESET_FLAG_WATCHDOG BIT(4) /* Watchdog timer reset */
6179 #define EC_RESET_FLAG_SOFT BIT(5) /* Soft reset trigger by core */
6180 #define EC_RESET_FLAG_HIBERNATE BIT(6) /* Wake from hibernate */
6181 #define EC_RESET_FLAG_RTC_ALARM BIT(7) /* RTC alarm wake */
6182 #define EC_RESET_FLAG_WAKE_PIN BIT(8) /* Wake pin triggered wake */
6183 #define EC_RESET_FLAG_LOW_BATTERY BIT(9) /* Low battery triggered wake */
6184 #define EC_RESET_FLAG_SYSJUMP BIT(10) /* Jumped directly to this image */
6185 #define EC_RESET_FLAG_HARD BIT(11) /* Hard reset from software */
6186 #define EC_RESET_FLAG_AP_OFF BIT(12) /* Do not power on AP */
6187 /* Some reset flags preserved from previous boot */
6188 #define EC_RESET_FLAG_PRESERVED BIT(13)
6189 #define EC_RESET_FLAG_USB_RESUME BIT(14) /* USB resume triggered wake */
6190 #define EC_RESET_FLAG_RDD BIT(15) /* USB Type-C debug cable */
6191 #define EC_RESET_FLAG_RBOX BIT(16) /* Fixed Reset Functionality */
6192 #define EC_RESET_FLAG_SECURITY BIT(17) /* Security threat */
6193 /* AP experienced a watchdog reset */
6194 #define EC_RESET_FLAG_AP_WATCHDOG BIT(18)
6195 /* Do not select RW in EFS. This enables PD in RO for Chromebox. */
6196 #define EC_RESET_FLAG_STAY_IN_RO BIT(19)
6197 #define EC_RESET_FLAG_EFS BIT(20) /* Jumped to this image by EFS */
6198 #define EC_RESET_FLAG_AP_IDLE BIT(21) /* Leave alone AP */
6199 #define EC_RESET_FLAG_INITIAL_PWR BIT(22) /* EC had power, then was reset */
6202 * Reason codes used by the AP after a shutdown to figure out why it was reset
6203 * by the EC. These are sent in EC commands. Therefore, to maintain protocol
6205 * - New entries must be inserted prior to the _COUNT field
6206 * - If an existing entry is no longer in service, it must be replaced with a
6207 * RESERVED entry instead.
6208 * - The semantic meaning of an entry should not change.
6209 * - Do not exceed 2^15 - 1 for reset reasons or 2^16 - 1 for shutdown reasons.
6211 enum chipset_shutdown_reason
{
6213 * Beginning of reset reasons.
6215 CHIPSET_RESET_BEGIN
= 0,
6216 CHIPSET_RESET_UNKNOWN
= CHIPSET_RESET_BEGIN
,
6217 /* Custom reason defined by a board.c or baseboard.c file */
6218 CHIPSET_RESET_BOARD_CUSTOM
,
6219 /* Believe that the AP has hung */
6220 CHIPSET_RESET_HANG_REBOOT
,
6221 /* Reset by EC console command */
6222 CHIPSET_RESET_CONSOLE_CMD
,
6223 /* Reset by EC host command */
6224 CHIPSET_RESET_HOST_CMD
,
6225 /* Keyboard module reset key combination */
6226 CHIPSET_RESET_KB_SYSRESET
,
6227 /* Keyboard module warm reboot */
6228 CHIPSET_RESET_KB_WARM_REBOOT
,
6229 /* Debug module warm reboot */
6230 CHIPSET_RESET_DBG_WARM_REBOOT
,
6231 /* I cannot self-terminate. You must lower me into the steel. */
6232 CHIPSET_RESET_AP_REQ
,
6233 /* Reset as side-effect of startup sequence */
6235 /* EC detected an AP watchdog event. */
6236 CHIPSET_RESET_AP_WATCHDOG
,
6238 CHIPSET_RESET_COUNT
, /* End of reset reasons. */
6241 * Beginning of shutdown reasons.
6243 CHIPSET_SHUTDOWN_BEGIN
= BIT(15),
6244 CHIPSET_SHUTDOWN_POWERFAIL
= CHIPSET_SHUTDOWN_BEGIN
,
6245 /* Forcing a shutdown as part of EC initialization */
6246 CHIPSET_SHUTDOWN_INIT
,
6247 /* Custom reason on a per-board basis. */
6248 CHIPSET_SHUTDOWN_BOARD_CUSTOM
,
6249 /* This is a reason to inhibit startup, not cause shut down. */
6250 CHIPSET_SHUTDOWN_BATTERY_INHIBIT
,
6251 /* A power_wait_signal is being asserted */
6252 CHIPSET_SHUTDOWN_WAIT
,
6253 /* Critical battery level. */
6254 CHIPSET_SHUTDOWN_BATTERY_CRIT
,
6255 /* Because you told me to. */
6256 CHIPSET_SHUTDOWN_CONSOLE_CMD
,
6257 /* Forcing a shutdown to effect entry to G3. */
6258 CHIPSET_SHUTDOWN_G3
,
6259 /* Force shutdown due to over-temperature. */
6260 CHIPSET_SHUTDOWN_THERMAL
,
6261 /* Force a chipset shutdown from the power button through EC */
6262 CHIPSET_SHUTDOWN_BUTTON
,
6264 CHIPSET_SHUTDOWN_COUNT
, /* End of shutdown reasons. */
6267 struct ec_response_uptime_info
{
6269 * Number of milliseconds since the last EC boot. Sysjump resets
6270 * typically do not restart the EC's time_since_boot epoch.
6272 * WARNING: The EC's sense of time is much less accurate than the AP's
6273 * sense of time, in both phase and frequency. This timebase is similar
6274 * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error.
6276 uint32_t time_since_ec_boot_ms
;
6279 * Number of times the AP was reset by the EC since the last EC boot.
6280 * Note that the AP may be held in reset by the EC during the initial
6281 * boot sequence, such that the very first AP boot may count as more
6284 uint32_t ap_resets_since_ec_boot
;
6287 * The set of flags which describe the EC's most recent reset.
6288 * See EC_RESET_FLAG_* for details.
6290 uint32_t ec_reset_flags
;
6292 /* Empty log entries have both the cause and timestamp set to zero. */
6293 struct ap_reset_log_entry
{
6294 /* See enum chipset_{reset,shutdown}_reason for details. */
6295 uint16_t reset_cause
;
6297 /* Reserved for protocol growth. */
6301 * The time of the reset's assertion, in milliseconds since the
6302 * last EC boot, in the same epoch as time_since_ec_boot_ms.
6303 * Set to zero if the log entry is empty.
6305 uint32_t reset_time_ms
;
6306 } recent_ap_reset
[4];
6310 * Add entropy to the device secret (stored in the rollback region).
6312 * Depending on the chip, the operation may take a long time (e.g. to erase
6313 * flash), so the commands are asynchronous.
6315 #define EC_CMD_ADD_ENTROPY 0x0122
6317 enum add_entropy_action
{
6318 /* Add entropy to the current secret. */
6319 ADD_ENTROPY_ASYNC
= 0,
6321 * Add entropy, and also make sure that the previous secret is erased.
6322 * (this can be implemented by adding entropy multiple times until
6323 * all rolback blocks have been overwritten).
6325 ADD_ENTROPY_RESET_ASYNC
= 1,
6326 /* Read back result from the previous operation. */
6327 ADD_ENTROPY_GET_RESULT
= 2,
6330 struct ec_params_rollback_add_entropy
{
6335 * Perform a single read of a given ADC channel.
6337 #define EC_CMD_ADC_READ 0x0123
6339 struct ec_params_adc_read
{
6340 uint8_t adc_channel
;
6343 struct ec_response_adc_read
{
6348 * Read back rollback info
6350 #define EC_CMD_ROLLBACK_INFO 0x0124
6352 struct ec_response_rollback_info
{
6353 int32_t id
; /* Incrementing number to indicate which region to use. */
6354 int32_t rollback_min_version
;
6355 int32_t rw_rollback_version
;
6358 /* Issue AP reset */
6359 #define EC_CMD_AP_RESET 0x0125
6361 /*****************************************************************************/
6362 /* Locate peripheral chips
6365 * EC_RES_UNAVAILABLE: The chip type is supported but not found on system.
6366 * EC_RES_INVALID_PARAM: The chip type was unrecognized.
6367 * EC_RES_OVERFLOW: The index number exceeded the number of chip instances.
6369 #define EC_CMD_LOCATE_CHIP 0x0126
6372 EC_CHIP_TYPE_CBI_EEPROM
= 0,
6373 EC_CHIP_TYPE_TCPC
= 1,
6375 EC_CHIP_TYPE_MAX
= 0xFF,
6379 EC_BUS_TYPE_I2C
= 0,
6380 EC_BUS_TYPE_EMBEDDED
= 1,
6382 EC_BUS_TYPE_MAX
= 0xFF,
6385 struct ec_i2c_info
{
6386 uint16_t port
; /* Physical port for device */
6387 uint16_t addr_flags
; /* 7-bit (or 10-bit) address */
6390 struct ec_params_locate_chip
{
6391 uint8_t type
; /* enum ec_chip_type */
6392 uint8_t index
; /* Specifies one instance of chip type */
6393 /* Used for type specific parameters in future */
6399 struct ec_response_locate_chip
{
6400 uint8_t bus_type
; /* enum ec_bus_type */
6401 uint8_t reserved
; /* Aligning the following union to 2 bytes */
6403 struct ec_i2c_info i2c_info
;
6410 * This command is used for validation purpose, where the AP needs to be
6411 * returned back to S0 state from G3 state without using the servo to trigger
6413 * - With command version 0:
6414 * AP reboots immediately from G3
6415 * command usage: ectool reboot_ap_on_g3 && shutdown -h now
6416 * - With command version 1:
6417 * AP reboots after the user specified delay
6418 * command usage: ectool reboot_ap_on_g3 [<delay>] && shutdown -h now
6420 #define EC_CMD_REBOOT_AP_ON_G3 0x0127
6422 struct ec_params_reboot_ap_on_g3_v1
{
6423 /* configurable delay in seconds in G3 state */
6424 uint32_t reboot_ap_at_g3_delay
;
6427 /*****************************************************************************/
6428 /* Get PD port capabilities
6430 * Returns the following static *capabilities* of the given port:
6431 * 1) Power role: source, sink, or dual. It is not anticipated that
6432 * future CrOS devices would ever be only a source, so the options are
6434 * 2) Try-power role: source, sink, or none (practically speaking, I don't
6435 * believe any CrOS device would support Try.SNK, so this would be source
6437 * 3) Data role: dfp, ufp, or dual. This will probably only be DFP or dual
6440 #define EC_CMD_GET_PD_PORT_CAPS 0x0128
6442 enum ec_pd_power_role_caps
{
6443 EC_PD_POWER_ROLE_SOURCE
= 0,
6444 EC_PD_POWER_ROLE_SINK
= 1,
6445 EC_PD_POWER_ROLE_DUAL
= 2,
6448 enum ec_pd_try_power_role_caps
{
6449 EC_PD_TRY_POWER_ROLE_NONE
= 0,
6450 EC_PD_TRY_POWER_ROLE_SINK
= 1,
6451 EC_PD_TRY_POWER_ROLE_SOURCE
= 2,
6454 enum ec_pd_data_role_caps
{
6455 EC_PD_DATA_ROLE_DFP
= 0,
6456 EC_PD_DATA_ROLE_UFP
= 1,
6457 EC_PD_DATA_ROLE_DUAL
= 2,
6460 /* From: power_manager/power_supply_properties.proto */
6461 enum ec_pd_port_location
{
6462 /* The location of the port is unknown, or there's only one port. */
6463 EC_PD_PORT_LOCATION_UNKNOWN
= 0,
6466 * Various positions on the device. The first word describes the side of
6467 * the device where the port is located while the second clarifies the
6468 * position. For example, LEFT_BACK means the farthest-back port on the
6469 * left side, while BACK_LEFT means the leftmost port on the back of the
6472 EC_PD_PORT_LOCATION_LEFT
= 1,
6473 EC_PD_PORT_LOCATION_RIGHT
= 2,
6474 EC_PD_PORT_LOCATION_BACK
= 3,
6475 EC_PD_PORT_LOCATION_FRONT
= 4,
6476 EC_PD_PORT_LOCATION_LEFT_FRONT
= 5,
6477 EC_PD_PORT_LOCATION_LEFT_BACK
= 6,
6478 EC_PD_PORT_LOCATION_RIGHT_FRONT
= 7,
6479 EC_PD_PORT_LOCATION_RIGHT_BACK
= 8,
6480 EC_PD_PORT_LOCATION_BACK_LEFT
= 9,
6481 EC_PD_PORT_LOCATION_BACK_RIGHT
= 10,
6484 struct ec_params_get_pd_port_caps
{
6485 uint8_t port
; /* Which port to interrogate */
6488 struct ec_response_get_pd_port_caps
{
6489 uint8_t pd_power_role_cap
; /* enum ec_pd_power_role_caps */
6490 uint8_t pd_try_power_role_cap
; /* enum ec_pd_try_power_role_caps */
6491 uint8_t pd_data_role_cap
; /* enum ec_pd_data_role_caps */
6492 uint8_t pd_port_location
; /* enum ec_pd_port_location */
6495 /*****************************************************************************/
6497 * Button press simulation
6499 * This command is used to simulate a button press.
6500 * Supported commands are vup(volume up) vdown(volume down) & rec(recovery)
6501 * Time duration for which button needs to be pressed is an optional parameter.
6503 * NOTE: This is only available on unlocked devices for testing purposes only.
6505 #define EC_CMD_BUTTON 0x0129
6507 struct ec_params_button
{
6508 /* Button mask aligned to enum keyboard_button_type */
6511 /* Duration in milliseconds button needs to be pressed */
6515 enum keyboard_button_type
{
6516 KEYBOARD_BUTTON_POWER
= 0,
6517 KEYBOARD_BUTTON_VOLUME_DOWN
= 1,
6518 KEYBOARD_BUTTON_VOLUME_UP
= 2,
6519 KEYBOARD_BUTTON_RECOVERY
= 3,
6520 KEYBOARD_BUTTON_CAPSENSE_1
= 4,
6521 KEYBOARD_BUTTON_CAPSENSE_2
= 5,
6522 KEYBOARD_BUTTON_CAPSENSE_3
= 6,
6523 KEYBOARD_BUTTON_CAPSENSE_4
= 7,
6524 KEYBOARD_BUTTON_CAPSENSE_5
= 8,
6525 KEYBOARD_BUTTON_CAPSENSE_6
= 9,
6526 KEYBOARD_BUTTON_CAPSENSE_7
= 10,
6527 KEYBOARD_BUTTON_CAPSENSE_8
= 11,
6529 KEYBOARD_BUTTON_COUNT
,
6532 /*****************************************************************************/
6534 * "Get the Keyboard Config". An EC implementing this command is expected to be
6535 * vivaldi capable, i.e. can send action codes for the top row keys.
6536 * Additionally, capability to send function codes for the same keys is
6537 * optional and acceptable.
6539 * Note: If the top row can generate both function and action codes by
6540 * using a dedicated Fn key, it does not matter whether the key sends
6541 * "function" or "action" codes by default. In both cases, the response
6542 * for this command will look the same.
6544 #define EC_CMD_GET_KEYBD_CONFIG 0x012A
6546 /* Possible values for the top row keys */
6554 TK_BRIGHTNESS_DOWN
= 6,
6555 TK_BRIGHTNESS_UP
= 7,
6560 TK_PRIVACY_SCRN_TOGGLE
= 12,
6561 TK_KBD_BKLIGHT_DOWN
= 13,
6562 TK_KBD_BKLIGHT_UP
= 14,
6566 TK_KBD_BKLIGHT_TOGGLE
= 18,
6572 * Max & Min number of top row keys, excluding Esc and Screenlock keys.
6573 * If this needs to change, please create a new version of the command.
6575 #define MAX_TOP_ROW_KEYS 15
6576 #define MIN_TOP_ROW_KEYS 10
6579 * Is the keyboard capable of sending function keys *in addition to*
6580 * action keys. This is possible for e.g. if the keyboard has a
6583 #define KEYBD_CAP_FUNCTION_KEYS BIT(0)
6585 * Whether the keyboard has a dedicated numeric keyboard.
6587 #define KEYBD_CAP_NUMERIC_KEYPAD BIT(1)
6589 * Whether the keyboard has a screenlock key.
6591 #define KEYBD_CAP_SCRNLOCK_KEY BIT(2)
6593 struct ec_response_keybd_config
{
6595 * Number of top row keys, excluding Esc and Screenlock.
6596 * If this is 0, all Vivaldi keyboard code is disabled.
6597 * (i.e. does not expose any tables to the kernel).
6599 uint8_t num_top_row_keys
;
6602 * The action keys in the top row, in order from left to right.
6603 * The values are filled from enum action_key. Esc and Screenlock
6604 * keys are not considered part of top row keys.
6606 uint8_t action_keys
[MAX_TOP_ROW_KEYS
];
6608 /* Capability flags */
6609 uint8_t capabilities
;
6614 * Configure smart discharge
6616 #define EC_CMD_SMART_DISCHARGE 0x012B
6618 #define EC_SMART_DISCHARGE_FLAGS_SET BIT(0)
6620 /* Discharge rates when the system is in cutoff or hibernation. */
6621 struct discharge_rate
{
6622 uint16_t cutoff
; /* Discharge rate (uA) in cutoff */
6623 uint16_t hibern
; /* Discharge rate (uA) in hibernation */
6626 struct smart_discharge_zone
{
6627 /* When the capacity (mAh) goes below this, EC cuts off the battery. */
6629 /* When the capacity (mAh) is below this, EC stays up. */
6633 struct ec_params_smart_discharge
{
6634 uint8_t flags
; /* EC_SMART_DISCHARGE_FLAGS_* */
6636 * Desired hours for the battery to survive before reaching 0%. Set to
6637 * zero to disable smart discharging. That is, the system hibernates as
6638 * soon as the G3 idle timer expires.
6640 uint16_t hours_to_zero
;
6641 /* Set both to zero to keep the current rates. */
6642 struct discharge_rate drate
;
6645 struct ec_response_smart_discharge
{
6646 uint16_t hours_to_zero
;
6647 struct discharge_rate drate
;
6648 struct smart_discharge_zone dzone
;
6651 /*****************************************************************************/
6652 /* Voltage regulator controls */
6655 * Get basic info of voltage regulator for given index.
6657 * Returns the regulator name and supported voltage list in mV.
6659 #define EC_CMD_REGULATOR_GET_INFO 0x012C
6661 /* Maximum length of regulator name */
6662 #define EC_REGULATOR_NAME_MAX_LEN 16
6664 /* Maximum length of the supported voltage list. */
6665 #define EC_REGULATOR_VOLTAGE_MAX_COUNT 16
6667 struct ec_params_regulator_get_info
{
6671 struct ec_response_regulator_get_info
{
6672 char name
[EC_REGULATOR_NAME_MAX_LEN
];
6673 uint16_t num_voltages
;
6674 uint16_t voltages_mv
[EC_REGULATOR_VOLTAGE_MAX_COUNT
];
6678 * Configure the regulator as enabled / disabled.
6680 #define EC_CMD_REGULATOR_ENABLE 0x012D
6682 struct ec_params_regulator_enable
{
6688 * Query if the regulator is enabled.
6690 * Returns 1 if the regulator is enabled, 0 if not.
6692 #define EC_CMD_REGULATOR_IS_ENABLED 0x012E
6694 struct ec_params_regulator_is_enabled
{
6698 struct ec_response_regulator_is_enabled
{
6703 * Set voltage for the voltage regulator within the range specified.
6705 * The driver should select the voltage in range closest to min_mv.
6707 * Also note that this might be called before the regulator is enabled, and the
6708 * setting should be in effect after the regulator is enabled.
6710 #define EC_CMD_REGULATOR_SET_VOLTAGE 0x012F
6712 struct ec_params_regulator_set_voltage
{
6719 * Get the currently configured voltage for the voltage regulator.
6721 * Note that this might be called before the regulator is enabled, and this
6722 * should return the configured output voltage if the regulator is enabled.
6724 #define EC_CMD_REGULATOR_GET_VOLTAGE 0x0130
6726 struct ec_params_regulator_get_voltage
{
6730 struct ec_response_regulator_get_voltage
{
6731 uint32_t voltage_mv
;
6735 * Gather all discovery information for the given port and partner type.
6737 * Note that if discovery has not yet completed, only the currently completed
6738 * responses will be filled in. If the discovery data structures are changed
6739 * in the process of the command running, BUSY will be returned.
6741 * VDO field sizes are set to the maximum possible number of VDOs a VDM may
6742 * contain, while the number of SVIDs here is selected to fit within the PROTO2
6743 * maximum parameter size.
6745 #define EC_CMD_TYPEC_DISCOVERY 0x0131
6747 enum typec_partner_type
{
6748 TYPEC_PARTNER_SOP
= 0,
6749 TYPEC_PARTNER_SOP_PRIME
= 1,
6750 TYPEC_PARTNER_SOP_PRIME_PRIME
= 2,
6753 struct ec_params_typec_discovery
{
6755 uint8_t partner_type
; /* enum typec_partner_type */
6758 struct svid_mode_info
{
6760 uint16_t mode_count
; /* Number of modes partner sent */
6761 uint32_t mode_vdo
[6]; /* Max VDOs allowed after VDM header is 6 */
6764 struct ec_response_typec_discovery
{
6765 uint8_t identity_count
; /* Number of identity VDOs partner sent */
6766 uint8_t svid_count
; /* Number of SVIDs partner sent */
6768 uint32_t discovery_vdo
[6]; /* Max VDOs allowed after VDM header is 6 */
6769 struct svid_mode_info svids
[0];
6772 /* USB Type-C commands for AP-controlled device policy. */
6773 #define EC_CMD_TYPEC_CONTROL 0x0132
6775 enum typec_control_command
{
6776 TYPEC_CONTROL_COMMAND_EXIT_MODES
,
6777 TYPEC_CONTROL_COMMAND_CLEAR_EVENTS
,
6778 TYPEC_CONTROL_COMMAND_ENTER_MODE
,
6779 TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY
,
6780 TYPEC_CONTROL_COMMAND_USB_MUX_SET
,
6781 TYPEC_CONTROL_COMMAND_BIST_SHARE_MODE
,
6782 TYPEC_CONTROL_COMMAND_SEND_VDM_REQ
,
6785 /* Modes (USB or alternate) that a type-C port may enter. */
6792 /* Replies the AP may specify to the TBT EnterMode command as a UFP */
6793 enum typec_tbt_ufp_reply
{
6794 TYPEC_TBT_UFP_REPLY_NAK
,
6795 TYPEC_TBT_UFP_REPLY_ACK
,
6798 #define TYPEC_USB_MUX_SET_ALL_CHIPS 0xFF
6800 struct typec_usb_mux_set
{
6801 /* Index of the mux to set in the chain */
6804 /* USB_PD_MUX_*-encoded USB mux state to set */
6808 #define VDO_MAX_SIZE 7
6810 struct typec_vdm_req
{
6811 /* VDM data, including VDM header */
6812 uint32_t vdm_data
[VDO_MAX_SIZE
];
6813 /* Number of 32-bit fields filled in */
6814 uint8_t vdm_data_objects
;
6815 /* Partner to address - see enum typec_partner_type */
6816 uint8_t partner_type
;
6819 struct ec_params_typec_control
{
6821 uint8_t command
; /* enum typec_control_command */
6825 * This section will be interpreted based on |command|. Define a
6826 * placeholder structure to avoid having to increase the size and bump
6827 * the command version when adding new sub-commands.
6830 /* Used for CLEAR_EVENTS */
6831 uint32_t clear_events_mask
;
6832 /* Used for ENTER_MODE - enum typec_mode */
6833 uint8_t mode_to_enter
;
6834 /* Used for TBT_UFP_REPLY - enum typec_tbt_ufp_reply */
6835 uint8_t tbt_ufp_reply
;
6836 /* Used for USB_MUX_SET */
6837 struct typec_usb_mux_set mux_params
;
6838 /* Used for BIST_SHARE_MODE */
6839 uint8_t bist_share_mode
;
6840 /* Used for VMD_REQ */
6841 struct typec_vdm_req vdm_req_params
;
6842 uint8_t placeholder
[128];
6847 * Gather all status information for a port.
6849 * Note: this covers many of the return fields from the deprecated
6850 * EC_CMD_USB_PD_CONTROL command, except those that are redundant with the
6851 * discovery data. The "enum pd_cc_states" is defined with the deprecated
6852 * EC_CMD_USB_PD_CONTROL command.
6854 * This also combines in the EC_CMD_USB_PD_MUX_INFO flags.
6856 #define EC_CMD_TYPEC_STATUS 0x0133
6861 * Note this is also used for PD header creation, and values align to those in
6862 * the Power Delivery Specification Revision 3.0 (See
6863 * 6.2.1.1.4 Port Power Role).
6865 enum pd_power_role
{
6873 * Note this is also used for PD header creation, and the first two values
6874 * align to those in the Power Delivery Specification Revision 3.0 (See
6875 * 6.2.1.1.6 Port Data Role).
6880 PD_ROLE_DISCONNECTED
= 2,
6883 enum pd_vconn_role
{
6884 PD_ROLE_VCONN_OFF
= 0,
6885 PD_ROLE_VCONN_SRC
= 1,
6889 * Note: BIT(0) may be used to determine whether the polarity is CC1 or CC2,
6890 * regardless of whether a debug accessory is connected.
6892 enum tcpc_cc_polarity
{
6894 * _CCx: is used to indicate the polarity while not connected to
6895 * a Debug Accessory. Only one CC line will assert a resistor and
6896 * the other will be open.
6902 * _CCx_DTS is used to indicate the polarity while connected to a
6903 * SRC Debug Accessory. Assert resistors on both lines.
6905 POLARITY_CC1_DTS
= 2,
6906 POLARITY_CC2_DTS
= 3,
6909 * The current TCPC code relies on these specific POLARITY values.
6910 * Adding in a check to verify if the list grows for any reason
6911 * that this will give a hint that other places need to be
6917 #define MODE_DP_PIN_A BIT(0)
6918 #define MODE_DP_PIN_B BIT(1)
6919 #define MODE_DP_PIN_C BIT(2)
6920 #define MODE_DP_PIN_D BIT(3)
6921 #define MODE_DP_PIN_E BIT(4)
6922 #define MODE_DP_PIN_F BIT(5)
6923 #define MODE_DP_PIN_ALL GENMASK(5, 0)
6925 #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
6926 #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
6927 #define PD_STATUS_EVENT_HARD_RESET BIT(2)
6928 #define PD_STATUS_EVENT_DISCONNECTED BIT(3)
6929 #define PD_STATUS_EVENT_MUX_0_SET_DONE BIT(4)
6930 #define PD_STATUS_EVENT_MUX_1_SET_DONE BIT(5)
6931 #define PD_STATUS_EVENT_VDM_REQ_REPLY BIT(6)
6932 #define PD_STATUS_EVENT_VDM_REQ_FAILED BIT(7)
6933 #define PD_STATUS_EVENT_VDM_ATTENTION BIT(8)
6936 * Encode and decode for BCD revision response
6938 * Note: the major revision set is written assuming that the value given is the
6939 * Specification Revision from the PD header, which currently only maps to PD
6940 * 1.0-3.0 with the major revision being one greater than the binary value.
6942 #define PD_STATUS_REV_SET_MAJOR(r) ((r + 1) << 12)
6943 #define PD_STATUS_REV_GET_MAJOR(r) ((r >> 12) & 0xF)
6944 #define PD_STATUS_REV_GET_MINOR(r) ((r >> 8) & 0xF)
6947 * Encode revision from partner RMDO
6949 * Unlike the specification revision given in the PD header, specification and
6950 * version information returned in the revision message data object (RMDO) is
6953 #define PD_STATUS_RMDO_REV_SET_MAJOR(r) (r << 12)
6954 #define PD_STATUS_RMDO_REV_SET_MINOR(r) (r << 8)
6955 #define PD_STATUS_RMDO_VER_SET_MAJOR(r) (r << 4)
6956 #define PD_STATUS_RMDO_VER_SET_MINOR(r) (r)
6959 * Decode helpers for Source and Sink Capability PDOs
6961 * Note: The Power Delivery Specification should be considered the ultimate
6962 * source of truth on the decoding of these PDOs
6964 #define PDO_TYPE_FIXED (0 << 30)
6965 #define PDO_TYPE_BATTERY (1 << 30)
6966 #define PDO_TYPE_VARIABLE (2 << 30)
6967 #define PDO_TYPE_AUGMENTED (3 << 30)
6968 #define PDO_TYPE_MASK (3 << 30)
6971 * From Table 6-9 and Table 6-14 PD Rev 3.0 Ver 2.0
6973 * <31:30> : Fixed Supply
6974 * <29> : Dual-Role Power
6975 * <28> : SNK/SRC dependent
6976 * <27> : Unconstrained Power
6977 * <26> : USB Communications Capable
6978 * <25> : Dual-Role Data
6979 * <24:20> : SNK/SRC dependent
6980 * <19:10> : Voltage in 50mV Units
6981 * <9:0> : Maximum Current in 10mA units
6983 #define PDO_FIXED_DUAL_ROLE BIT(29)
6984 #define PDO_FIXED_UNCONSTRAINED BIT(27)
6985 #define PDO_FIXED_COMM_CAP BIT(26)
6986 #define PDO_FIXED_DATA_SWAP BIT(25)
6987 #define PDO_FIXED_FRS_CURR_MASK GENMASK(24, 23) /* Sink Cap only */
6988 #define PDO_FIXED_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
6989 #define PDO_FIXED_CURRENT(p) ((p & 0x3FF) * 10)
6992 * From Table 6-12 and Table 6-16 PD Rev 3.0 Ver 2.0
6995 * <29:20> : Maximum Voltage in 50mV units
6996 * <19:10> : Minimum Voltage in 50mV units
6997 * <9:0> : Maximum Allowable Power in 250mW units
6999 #define PDO_BATT_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)
7000 #define PDO_BATT_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
7001 #define PDO_BATT_MAX_POWER(p) ((p & 0x3FF) * 250)
7004 * From Table 6-11 and Table 6-15 PD Rev 3.0 Ver 2.0
7006 * <31:30> : Variable Supply (non-Battery)
7007 * <29:20> : Maximum Voltage in 50mV units
7008 * <19:10> : Minimum Voltage in 50mV units
7009 * <9:0> : Operational Current in 10mA units
7011 #define PDO_VAR_MAX_VOLTAGE(p) ((p >> 20 & 0x3FF) * 50)
7012 #define PDO_VAR_MIN_VOLTAGE(p) ((p >> 10 & 0x3FF) * 50)
7013 #define PDO_VAR_MAX_CURRENT(p) ((p & 0x3FF) * 10)
7016 * From Table 6-13 and Table 6-17 PD Rev 3.0 Ver 2.0
7018 * Note this type is reserved in PD 2.0, and only one type of APDO is
7019 * supported as of the cited version.
7021 * <31:30> : Augmented Power Data Object
7022 * <29:28> : Programmable Power Supply
7023 * <27> : PPS Power Limited
7024 * <26:25> : Reserved
7025 * <24:17> : Maximum Voltage in 100mV increments
7027 * <15:8> : Minimum Voltage in 100mV increments
7029 * <6:0> : Maximum Current in 50mA increments
7031 #define PDO_AUG_MAX_VOLTAGE(p) ((p >> 17 & 0xFF) * 100)
7032 #define PDO_AUG_MIN_VOLTAGE(p) ((p >> 8 & 0xFF) * 100)
7033 #define PDO_AUG_MAX_CURRENT(p) ((p & 0x7F) * 50)
7035 struct ec_params_typec_status
{
7039 struct ec_response_typec_status
{
7040 uint8_t pd_enabled
; /* PD communication enabled - bool */
7041 uint8_t dev_connected
; /* Device connected - bool */
7042 uint8_t sop_connected
; /* Device is SOP PD capable - bool */
7043 uint8_t source_cap_count
; /* Number of Source Cap PDOs */
7045 uint8_t power_role
; /* enum pd_power_role */
7046 uint8_t data_role
; /* enum pd_data_role */
7047 uint8_t vconn_role
; /* enum pd_vconn_role */
7048 uint8_t sink_cap_count
; /* Number of Sink Cap PDOs */
7050 uint8_t polarity
; /* enum tcpc_cc_polarity */
7051 uint8_t cc_state
; /* enum pd_cc_states */
7052 uint8_t dp_pin
; /* DP pin mode (MODE_DP_IN_[A-E]) */
7053 uint8_t mux_state
; /* USB_PD_MUX* - encoded mux state */
7055 char tc_state
[32]; /* TC state name */
7057 uint32_t events
; /* PD_STATUS_EVENT bitmask */
7060 * BCD PD revisions for partners
7062 * The format has the PD major revision in the upper nibble, and the PD
7063 * minor revision in the next nibble. The following two nibbles hold the
7064 * major and minor specification version. If a partner does not support
7065 * the Revision message, only the major revision will be given.
7066 * ex. PD Revision 3.2 Version 1.9 would map to 0x3219
7068 * PD revision/version will be 0 if no PD device is connected.
7070 uint16_t sop_revision
;
7071 uint16_t sop_prime_revision
;
7073 uint32_t source_cap_pdos
[7]; /* Max 7 PDOs can be present */
7075 uint32_t sink_cap_pdos
[7]; /* Max 7 PDOs can be present */
7079 * Get the number of peripheral charge ports
7081 #define EC_CMD_PCHG_COUNT 0x0134
7083 #define EC_PCHG_MAX_PORTS 8
7085 struct ec_response_pchg_count
{
7090 * Get the status of a peripheral charge port
7092 #define EC_CMD_PCHG 0x0135
7095 struct ec_params_pchg
{
7099 struct ec_params_pchg_v3
{
7101 /* Below are new in v3. */
7105 /* Errors acked by the host (thus to be cleared) */
7110 struct ec_response_pchg
{
7111 uint32_t error
; /* enum pchg_error */
7112 uint8_t state
; /* enum pchg_state state */
7113 uint8_t battery_percentage
;
7116 /* Fields added in version 1 */
7117 uint32_t fw_version
;
7118 uint32_t dropped_event_count
;
7122 struct ec_response_pchg_v2
{
7123 uint32_t error
; /* enum pchg_error */
7124 uint8_t state
; /* enum pchg_state state */
7125 uint8_t battery_percentage
;
7128 /* Fields added in version 1 */
7129 uint32_t fw_version
;
7130 uint32_t dropped_event_count
;
7131 /* Fields added in version 2 */
7132 uint32_t dropped_host_event_count
;
7136 /* Charger is reset and not initialized. */
7137 PCHG_STATE_RESET
= 0,
7138 /* Charger is initialized or disabled. */
7139 PCHG_STATE_INITIALIZED
,
7140 /* Charger is enabled and ready to detect a device. */
7142 /* Device is in proximity. */
7143 PCHG_STATE_DETECTED
,
7144 /* Device is being charged. */
7145 PCHG_STATE_CHARGING
,
7146 /* Device is fully charged. It implies DETECTED (& not charging). */
7148 /* In download (a.k.a. firmware update) mode */
7149 PCHG_STATE_DOWNLOAD
,
7150 /* In download mode. Ready for receiving data. */
7151 PCHG_STATE_DOWNLOADING
,
7152 /* Device is ready for data communication. */
7153 PCHG_STATE_CONNECTED
,
7154 /* Charger is in Built-In Self Test mode. */
7156 /* Put no more entry below */
7160 /* clang-format off */
7161 #define EC_PCHG_STATE_TEXT \
7163 [PCHG_STATE_RESET] = "RESET", \
7164 [PCHG_STATE_INITIALIZED] = "INITIALIZED", \
7165 [PCHG_STATE_ENABLED] = "ENABLED", \
7166 [PCHG_STATE_DETECTED] = "DETECTED", \
7167 [PCHG_STATE_CHARGING] = "CHARGING", \
7168 [PCHG_STATE_FULL] = "FULL", \
7169 [PCHG_STATE_DOWNLOAD] = "DOWNLOAD", \
7170 [PCHG_STATE_DOWNLOADING] = "DOWNLOADING", \
7171 [PCHG_STATE_CONNECTED] = "CONNECTED", \
7172 [PCHG_STATE_BIST] = "BIST", \
7174 /* clang-format on */
7177 * Update firmware of peripheral chip
7179 #define EC_CMD_PCHG_UPDATE 0x0136
7181 /* Port number is encoded in bit[28:31]. */
7182 #define EC_MKBP_PCHG_PORT_SHIFT 28
7183 /* Utility macros for converting MKBP event <-> port number. */
7184 #define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
7185 #define EC_MKBP_PCHG_PORT_TO_EVENT(p) ((p) << EC_MKBP_PCHG_PORT_SHIFT)
7186 /* Utility macro for extracting event bits. */
7187 #define EC_MKBP_PCHG_EVENT_MASK(e) ((e)&GENMASK(EC_MKBP_PCHG_PORT_SHIFT - 1, 0))
7189 #define EC_MKBP_PCHG_UPDATE_OPENED BIT(0)
7190 #define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1)
7191 #define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2)
7192 #define EC_MKBP_PCHG_UPDATE_ERROR BIT(3)
7193 #define EC_MKBP_PCHG_DEVICE_EVENT BIT(4)
7195 enum ec_pchg_update_cmd
{
7196 /* Reset chip to normal mode. */
7197 EC_PCHG_UPDATE_CMD_RESET_TO_NORMAL
= 0,
7198 /* Reset and put a chip in update (a.k.a. download) mode. */
7199 EC_PCHG_UPDATE_CMD_OPEN
,
7200 /* Write a block of data containing FW image. */
7201 EC_PCHG_UPDATE_CMD_WRITE
,
7202 /* Close update session. */
7203 EC_PCHG_UPDATE_CMD_CLOSE
,
7204 /* Reset chip (without mode change). */
7205 EC_PCHG_UPDATE_CMD_RESET
,
7206 /* Enable pass-through mode. */
7207 EC_PCHG_UPDATE_CMD_ENABLE_PASSTHRU
,
7208 /* End of commands */
7209 EC_PCHG_UPDATE_CMD_COUNT
,
7212 struct ec_params_pchg_update
{
7213 /* PCHG port number */
7215 /* enum ec_pchg_update_cmd */
7220 /* Version of new firmware */
7222 /* CRC32 of new firmware */
7224 /* Address in chip memory where <data> is written to */
7226 /* Size of <data> */
7228 /* Partial data of new firmware */
7232 BUILD_ASSERT(EC_PCHG_UPDATE_CMD_COUNT
<
7233 BIT(sizeof(((struct ec_params_pchg_update
*)0)->cmd
) * 8));
7235 struct ec_response_pchg_update
{
7237 uint32_t block_size
;
7240 #define EC_CMD_DISPLAY_SOC 0x0137
7242 struct ec_response_display_soc
{
7243 /* Display charge in 10ths of a % (1000=100.0%) */
7244 int16_t display_soc
;
7245 /* Full factor in 10ths of a % (1000=100.0%) */
7246 int16_t full_factor
;
7247 /* Shutdown SoC in 10ths of a % (1000=100.0%) */
7248 int16_t shutdown_soc
;
7251 #define EC_CMD_SET_BASE_STATE 0x0138
7253 struct ec_params_set_base_state
{
7254 uint8_t cmd
; /* enum ec_set_base_state_cmd */
7257 enum ec_set_base_state_cmd
{
7258 EC_SET_BASE_STATE_DETACH
= 0,
7259 EC_SET_BASE_STATE_ATTACH
,
7260 EC_SET_BASE_STATE_RESET
,
7263 #define EC_CMD_I2C_CONTROL 0x0139
7265 /* Subcommands for I2C control */
7267 enum ec_i2c_control_command
{
7268 EC_I2C_CONTROL_GET_SPEED
,
7269 EC_I2C_CONTROL_SET_SPEED
,
7272 #define EC_I2C_CONTROL_SPEED_UNKNOWN 0
7274 struct ec_params_i2c_control
{
7275 uint8_t port
; /* I2C port number */
7276 uint8_t cmd
; /* enum ec_i2c_control_command */
7282 struct ec_response_i2c_control
{
7288 #define EC_CMD_RGBKBD_SET_COLOR 0x013A
7289 #define EC_CMD_RGBKBD 0x013B
7291 #define EC_RGBKBD_MAX_KEY_COUNT 128
7292 #define EC_RGBKBD_MAX_RGB_COLOR 0xFFFFFF
7293 #define EC_RGBKBD_MAX_SCALE 0xFF
7296 /* RGB keyboard is reset and not initialized. */
7297 RGBKBD_STATE_RESET
= 0,
7298 /* RGB keyboard is initialized but not enabled. */
7299 RGBKBD_STATE_INITIALIZED
,
7300 /* RGB keyboard is disabled. */
7301 RGBKBD_STATE_DISABLED
,
7302 /* RGB keyboard is enabled and ready to receive a command. */
7303 RGBKBD_STATE_ENABLED
,
7305 /* Put no more entry below */
7309 enum ec_rgbkbd_subcmd
{
7310 EC_RGBKBD_SUBCMD_CLEAR
= 1,
7311 EC_RGBKBD_SUBCMD_DEMO
= 2,
7312 EC_RGBKBD_SUBCMD_SET_SCALE
= 3,
7313 EC_RGBKBD_SUBCMD_GET_CONFIG
= 4,
7314 EC_RGBKBD_SUBCMD_COUNT
7317 enum ec_rgbkbd_demo
{
7318 EC_RGBKBD_DEMO_OFF
= 0,
7319 EC_RGBKBD_DEMO_FLOW
= 1,
7320 EC_RGBKBD_DEMO_DOT
= 2,
7321 EC_RGBKBD_DEMO_COUNT
,
7324 BUILD_ASSERT(EC_RGBKBD_DEMO_COUNT
<= 255);
7326 enum ec_rgbkbd_type
{
7327 EC_RGBKBD_TYPE_UNKNOWN
= 0,
7328 EC_RGBKBD_TYPE_PER_KEY
= 1, /* e.g. Vell */
7329 EC_RGBKBD_TYPE_FOUR_ZONES_40_LEDS
= 2, /* e.g. Taniks */
7330 EC_RGBKBD_TYPE_FOUR_ZONES_12_LEDS
= 3, /* e.g. Osiris */
7331 EC_RGBKBD_TYPE_FOUR_ZONES_4_LEDS
= 4, /* e.g. Mithrax */
7332 EC_RGBKBD_TYPE_COUNT
,
7335 struct ec_rgbkbd_set_scale
{
7340 struct ec_params_rgbkbd
{
7341 uint8_t subcmd
; /* Sub-command (enum ec_rgbkbd_subcmd) */
7343 struct rgb_s color
; /* EC_RGBKBD_SUBCMD_CLEAR */
7344 uint8_t demo
; /* EC_RGBKBD_SUBCMD_DEMO */
7345 struct ec_rgbkbd_set_scale set_scale
;
7349 struct ec_response_rgbkbd
{
7351 * RGBKBD type supported by the device.
7354 uint8_t rgbkbd_type
; /* enum ec_rgbkbd_type */
7357 struct ec_params_rgbkbd_set_color
{
7358 /* Specifies the starting key ID whose color is being changed. */
7360 /* Specifies # of elements in <color>. */
7362 /* RGB color data array of length up to MAX_KEY_COUNT. */
7363 struct rgb_s color
[];
7367 * Gather the response to the most recent VDM REQ from the AP, as well
7368 * as popping the oldest VDM:Attention from the DPM queue
7370 #define EC_CMD_TYPEC_VDM_RESPONSE 0x013C
7372 struct ec_params_typec_vdm_response
{
7376 struct ec_response_typec_vdm_response
{
7377 /* Number of 32-bit fields filled in */
7378 uint8_t vdm_data_objects
;
7379 /* Partner to address - see enum typec_partner_type */
7380 uint8_t partner_type
;
7381 /* enum ec_status describing VDM response */
7382 uint16_t vdm_response_err
;
7383 /* VDM data, including VDM header */
7384 uint32_t vdm_response
[VDO_MAX_SIZE
];
7385 /* Number of 32-bit Attention fields filled in */
7386 uint8_t vdm_attention_objects
;
7387 /* Number of remaining messages to consume */
7388 uint8_t vdm_attention_left
;
7391 /* VDM:Attention contents */
7392 uint32_t vdm_attention
[2];
7395 /*****************************************************************************/
7396 /* The command range 0x200-0x2FF is reserved for Rotor. */
7398 /*****************************************************************************/
7400 * Reserve a range of host commands for the CR51 firmware.
7402 #define EC_CMD_CR51_BASE 0x0300
7403 #define EC_CMD_CR51_LAST 0x03FF
7405 /*****************************************************************************/
7406 /* Fingerprint MCU commands: range 0x0400-0x040x */
7408 /* Fingerprint SPI sensor passthru command: prototyping ONLY */
7409 #define EC_CMD_FP_PASSTHRU 0x0400
7411 #define EC_FP_FLAG_NOT_COMPLETE 0x1
7413 struct ec_params_fp_passthru
{
7414 uint16_t len
; /* Number of bytes to write then read */
7415 uint16_t flags
; /* EC_FP_FLAG_xxx */
7416 uint8_t data
[]; /* Data to send */
7419 /* Configure the Fingerprint MCU behavior */
7420 #define EC_CMD_FP_MODE 0x0402
7422 /* Put the sensor in its lowest power mode */
7423 #define FP_MODE_DEEPSLEEP BIT(0)
7424 /* Wait to see a finger on the sensor */
7425 #define FP_MODE_FINGER_DOWN BIT(1)
7426 /* Poll until the finger has left the sensor */
7427 #define FP_MODE_FINGER_UP BIT(2)
7428 /* Capture the current finger image */
7429 #define FP_MODE_CAPTURE BIT(3)
7430 /* Finger enrollment session on-going */
7431 #define FP_MODE_ENROLL_SESSION BIT(4)
7432 /* Enroll the current finger image */
7433 #define FP_MODE_ENROLL_IMAGE BIT(5)
7434 /* Try to match the current finger image */
7435 #define FP_MODE_MATCH BIT(6)
7436 /* Reset and re-initialize the sensor. */
7437 #define FP_MODE_RESET_SENSOR BIT(7)
7438 /* Sensor maintenance for dead pixels. */
7439 #define FP_MODE_SENSOR_MAINTENANCE BIT(8)
7440 /* special value: don't change anything just read back current mode */
7441 #define FP_MODE_DONT_CHANGE BIT(31)
7443 #define FP_VALID_MODES \
7444 (FP_MODE_DEEPSLEEP | FP_MODE_FINGER_DOWN | FP_MODE_FINGER_UP | \
7445 FP_MODE_CAPTURE | FP_MODE_ENROLL_SESSION | FP_MODE_ENROLL_IMAGE | \
7446 FP_MODE_MATCH | FP_MODE_RESET_SENSOR | FP_MODE_SENSOR_MAINTENANCE | \
7447 FP_MODE_DONT_CHANGE)
7449 /* Capture types defined in bits [30..28] */
7450 #define FP_MODE_CAPTURE_TYPE_SHIFT 28
7451 #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT)
7453 * enum fp_capture_type - Specifies the "mode" when capturing images.
7455 * @FP_CAPTURE_VENDOR_FORMAT: Capture 1-3 images and choose the best quality
7456 * image (produces 'frame_size' bytes)
7457 * @FP_CAPTURE_SIMPLE_IMAGE: Simple raw image capture (produces width x height x
7459 * @FP_CAPTURE_PATTERN0: Self test pattern (e.g. checkerboard)
7460 * @FP_CAPTURE_PATTERN1: Self test pattern (e.g. inverted checkerboard)
7461 * @FP_CAPTURE_QUALITY_TEST: Capture for Quality test with fixed contrast
7462 * @FP_CAPTURE_RESET_TEST: Capture for pixel reset value test
7463 * @FP_CAPTURE_TYPE_MAX: End of enum
7465 * @note This enum must remain ordered, if you add new values you must ensure
7466 * that FP_CAPTURE_TYPE_MAX is still the last one.
7468 enum fp_capture_type
{
7469 FP_CAPTURE_VENDOR_FORMAT
= 0,
7470 FP_CAPTURE_SIMPLE_IMAGE
= 1,
7471 FP_CAPTURE_PATTERN0
= 2,
7472 FP_CAPTURE_PATTERN1
= 3,
7473 FP_CAPTURE_QUALITY_TEST
= 4,
7474 FP_CAPTURE_RESET_TEST
= 5,
7475 FP_CAPTURE_TYPE_MAX
,
7477 /* Extracts the capture type from the sensor 'mode' word */
7478 #define FP_CAPTURE_TYPE(mode) \
7479 (((mode)&FP_MODE_CAPTURE_TYPE_MASK) >> FP_MODE_CAPTURE_TYPE_SHIFT)
7481 struct ec_params_fp_mode
{
7482 uint32_t mode
; /* as defined by FP_MODE_ constants */
7485 struct ec_response_fp_mode
{
7486 uint32_t mode
; /* as defined by FP_MODE_ constants */
7489 /* Retrieve Fingerprint sensor information */
7490 #define EC_CMD_FP_INFO 0x0403
7492 /* Number of dead pixels detected on the last maintenance */
7493 #define FP_ERROR_DEAD_PIXELS(errors) ((errors)&0x3FF)
7494 /* Unknown number of dead pixels detected on the last maintenance */
7495 #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF)
7496 /* No interrupt from the sensor */
7497 #define FP_ERROR_NO_IRQ BIT(12)
7498 /* SPI communication error */
7499 #define FP_ERROR_SPI_COMM BIT(13)
7500 /* Invalid sensor Hardware ID */
7501 #define FP_ERROR_BAD_HWID BIT(14)
7502 /* Sensor initialization failed */
7503 #define FP_ERROR_INIT_FAIL BIT(15)
7505 struct ec_response_fp_info_v0
{
7506 /* Sensor identification */
7508 uint32_t product_id
;
7511 /* Image frame characteristics */
7512 uint32_t frame_size
;
7513 uint32_t pixel_format
; /* using V4L2_PIX_FMT_ */
7517 uint16_t errors
; /* see FP_ERROR_ flags above */
7520 struct ec_response_fp_info
{
7521 /* Sensor identification */
7523 uint32_t product_id
;
7526 /* Image frame characteristics */
7527 uint32_t frame_size
;
7528 uint32_t pixel_format
; /* using V4L2_PIX_FMT_ */
7532 uint16_t errors
; /* see FP_ERROR_ flags above */
7533 /* Template/finger current information */
7534 uint32_t template_size
; /* max template size in bytes */
7535 uint16_t template_max
; /* maximum number of fingers/templates */
7536 uint16_t template_valid
; /* number of valid fingers/templates */
7537 uint32_t template_dirty
; /* bitmap of templates with MCU side changes */
7538 uint32_t template_version
; /* version of the template format */
7541 /* Get the last captured finger frame or a template content */
7542 #define EC_CMD_FP_FRAME 0x0404
7544 /* constants defining the 'offset' field which also contains the frame index */
7545 #define FP_FRAME_INDEX_SHIFT 28
7546 /* Frame buffer where the captured image is stored */
7547 #define FP_FRAME_INDEX_RAW_IMAGE 0
7548 /* First frame buffer holding a template */
7549 #define FP_FRAME_INDEX_TEMPLATE 1
7550 #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT)
7551 #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF
7553 /* Version of the format of the encrypted templates. */
7554 #define FP_TEMPLATE_FORMAT_VERSION 4
7556 /* Constants for encryption parameters */
7557 #define FP_CONTEXT_NONCE_BYTES 12
7558 #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t))
7559 #define FP_CONTEXT_TAG_BYTES 16
7560 #define FP_CONTEXT_ENCRYPTION_SALT_BYTES 16
7561 #define FP_CONTEXT_TPM_BYTES 32
7563 /* Constants for positive match parameters. */
7564 #define FP_POSITIVE_MATCH_SALT_BYTES 16
7566 struct ec_fp_template_encryption_metadata
{
7568 * Version of the structure format (N=3).
7570 uint16_t struct_version
;
7571 /* Reserved bytes, set to 0. */
7574 * The salt is *only* ever used for key derivation. The nonce is unique,
7575 * a different one is used for every message.
7577 uint8_t nonce
[FP_CONTEXT_NONCE_BYTES
];
7578 uint8_t encryption_salt
[FP_CONTEXT_ENCRYPTION_SALT_BYTES
];
7579 uint8_t tag
[FP_CONTEXT_TAG_BYTES
];
7582 struct ec_params_fp_frame
{
7584 * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE
7585 * in the high nibble, and the real offset within the frame in
7586 * FP_FRAME_OFFSET_MASK.
7592 /* Load a template into the MCU */
7593 #define EC_CMD_FP_TEMPLATE 0x0405
7595 /* Flag in the 'size' field indicating that the full template has been sent */
7596 #define FP_TEMPLATE_COMMIT 0x80000000
7598 struct ec_params_fp_template
{
7604 /* Clear the current fingerprint user context and set a new one */
7605 #define EC_CMD_FP_CONTEXT 0x0406
7607 struct ec_params_fp_context
{
7608 uint32_t userid
[FP_CONTEXT_USERID_WORDS
];
7611 enum fp_context_action
{
7612 FP_CONTEXT_ASYNC
= 0,
7613 FP_CONTEXT_GET_RESULT
= 1,
7616 /* Version 1 of the command is "asynchronous". */
7617 struct ec_params_fp_context_v1
{
7618 uint8_t action
; /**< enum fp_context_action */
7619 uint8_t reserved
[3]; /**< padding for alignment */
7620 uint32_t userid
[FP_CONTEXT_USERID_WORDS
];
7623 #define EC_CMD_FP_STATS 0x0407
7625 #define FPSTATS_CAPTURE_INV BIT(0)
7626 #define FPSTATS_MATCHING_INV BIT(1)
7628 struct ec_response_fp_stats
{
7629 uint32_t capture_time_us
;
7630 uint32_t matching_time_us
;
7631 uint32_t overall_time_us
;
7636 uint8_t timestamps_invalid
;
7637 int8_t template_matched
;
7640 #define EC_CMD_FP_SEED 0x0408
7641 struct ec_params_fp_seed
{
7643 * Version of the structure format (N=3).
7645 uint16_t struct_version
;
7646 /* Reserved bytes, set to 0. */
7648 /* Seed from the TPM. */
7649 uint8_t seed
[FP_CONTEXT_TPM_BYTES
];
7652 #define EC_CMD_FP_ENC_STATUS 0x0409
7654 /* FP TPM seed has been set or not */
7655 #define FP_ENC_STATUS_SEED_SET BIT(0)
7657 struct ec_response_fp_encryption_status
{
7658 /* Used bits in encryption engine status */
7659 uint32_t valid_flags
;
7660 /* Encryption engine status */
7664 #define EC_CMD_FP_READ_MATCH_SECRET 0x040A
7665 struct ec_params_fp_read_match_secret
{
7669 /* The positive match secret has the length of the SHA256 digest. */
7670 #define FP_POSITIVE_MATCH_SECRET_BYTES 32
7671 struct ec_response_fp_read_match_secret
{
7672 uint8_t positive_match_secret
[FP_POSITIVE_MATCH_SECRET_BYTES
];
7675 /*****************************************************************************/
7676 /* Touchpad MCU commands: range 0x0500-0x05FF */
7678 /* Perform touchpad self test */
7679 #define EC_CMD_TP_SELF_TEST 0x0500
7681 /* Get number of frame types, and the size of each type */
7682 #define EC_CMD_TP_FRAME_INFO 0x0501
7684 struct ec_response_tp_frame_info
{
7686 uint32_t frame_sizes
[0];
7689 /* Create a snapshot of current frame readings */
7690 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
7692 /* Read the frame */
7693 #define EC_CMD_TP_FRAME_GET 0x0503
7695 struct ec_params_tp_frame_get
{
7696 uint32_t frame_index
;
7701 /*****************************************************************************/
7702 /* EC-EC communication commands: range 0x0600-0x06FF */
7704 #define EC_COMM_TEXT_MAX 8
7707 * Get battery static information, i.e. information that never changes, or
7708 * very infrequently.
7710 #define EC_CMD_BATTERY_GET_STATIC 0x0600
7713 * struct ec_params_battery_static_info - Battery static info parameters
7714 * @index: Battery index.
7716 struct ec_params_battery_static_info
{
7721 * struct ec_response_battery_static_info - Battery static info response
7722 * @design_capacity: Battery Design Capacity (mAh)
7723 * @design_voltage: Battery Design Voltage (mV)
7724 * @manufacturer: Battery Manufacturer String
7725 * @model: Battery Model Number String
7726 * @serial: Battery Serial Number String
7727 * @type: Battery Type String
7728 * @cycle_count: Battery Cycle Count
7730 struct ec_response_battery_static_info
{
7731 uint16_t design_capacity
;
7732 uint16_t design_voltage
;
7733 char manufacturer
[EC_COMM_TEXT_MAX
];
7734 char model
[EC_COMM_TEXT_MAX
];
7735 char serial
[EC_COMM_TEXT_MAX
];
7736 char type
[EC_COMM_TEXT_MAX
];
7737 /* TODO(crbug.com/795991): Consider moving to dynamic structure. */
7738 uint32_t cycle_count
;
7742 * struct ec_response_battery_static_info_v1 - hostcmd v1 battery static info
7743 * Equivalent to struct ec_response_battery_static_info, but with longer
7745 * @design_capacity: battery design capacity (in mAh)
7746 * @design_voltage: battery design voltage (in mV)
7747 * @cycle_count: battery cycle count
7748 * @manufacturer_ext: battery manufacturer string
7749 * @model_ext: battery model string
7750 * @serial_ext: battery serial number string
7751 * @type_ext: battery type string
7753 struct ec_response_battery_static_info_v1
{
7754 uint16_t design_capacity
;
7755 uint16_t design_voltage
;
7756 uint32_t cycle_count
;
7757 char manufacturer_ext
[12];
7759 char serial_ext
[12];
7764 * struct ec_response_battery_static_info_v2 - hostcmd v2 battery static info
7766 * Equivalent to struct ec_response_battery_static_info, but with strings
7767 * further lengthened (relative to v1) to accommodate the maximum string length
7768 * permitted by the Smart Battery Data Specification revision 1.1 and fields
7769 * renamed to better match that specification.
7771 * @design_capacity: battery design capacity (in mAh)
7772 * @design_voltage: battery design voltage (in mV)
7773 * @cycle_count: battery cycle count
7774 * @manufacturer: battery manufacturer string
7775 * @device_name: battery model string
7776 * @serial: battery serial number string
7777 * @chemistry: battery type string
7779 struct ec_response_battery_static_info_v2
{
7780 uint16_t design_capacity
;
7781 uint16_t design_voltage
;
7782 uint32_t cycle_count
;
7783 char manufacturer
[32];
7784 char device_name
[32];
7790 * Get battery dynamic information, i.e. information that is likely to change
7791 * every time it is read.
7793 #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601
7796 * struct ec_params_battery_dynamic_info - Battery dynamic info parameters
7797 * @index: Battery index.
7799 struct ec_params_battery_dynamic_info
{
7804 * struct ec_response_battery_dynamic_info - Battery dynamic info response
7805 * @actual_voltage: Battery voltage (mV)
7806 * @actual_current: Battery current (mA); negative=discharging
7807 * @remaining_capacity: Remaining capacity (mAh)
7808 * @full_capacity: Capacity (mAh, might change occasionally)
7809 * @flags: Flags, see EC_BATT_FLAG_*
7810 * @desired_voltage: Charging voltage desired by battery (mV)
7811 * @desired_current: Charging current desired by battery (mA)
7813 struct ec_response_battery_dynamic_info
{
7814 int16_t actual_voltage
;
7815 int16_t actual_current
;
7816 int16_t remaining_capacity
;
7817 int16_t full_capacity
;
7819 int16_t desired_voltage
;
7820 int16_t desired_current
;
7824 * Control charger chip. Used to control charger chip on the peripheral.
7826 #define EC_CMD_CHARGER_CONTROL 0x0602
7829 * struct ec_params_charger_control - Charger control parameters
7830 * @max_current: Charger current (mA). Positive to allow base to draw up to
7831 * max_current and (possibly) charge battery, negative to request current
7833 * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is
7835 * @allow_charging: Allow base battery charging (only makes sense if
7838 struct ec_params_charger_control
{
7839 int16_t max_current
;
7840 uint16_t otg_voltage
;
7841 uint8_t allow_charging
;
7844 /* Get ACK from the USB-C SS muxes */
7845 #define EC_CMD_USB_PD_MUX_ACK 0x0603
7847 struct ec_params_usb_pd_mux_ack
{
7848 uint8_t port
; /* USB-C port number */
7852 #define EC_CMD_GET_BOOT_TIME 0x0604
7854 enum boot_time_param
{
7864 struct ec_response_get_boot_time
{
7865 uint64_t timestamp
[RESET_CNT
];
7869 /*****************************************************************************/
7871 * Reserve a range of host commands for board-specific, experimental, or
7872 * special purpose features. These can be (re)used without updating this file.
7874 * CAUTION: Don't go nuts with this. Shipping products should document ALL
7875 * their EC commands for easier development, testing, debugging, and support.
7877 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
7878 * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
7880 * In your experimental code, you may want to do something like this:
7882 * #define EC_CMD_MAGIC_FOO 0x0000
7883 * #define EC_CMD_MAGIC_BAR 0x0001
7884 * #define EC_CMD_MAGIC_HEY 0x0002
7886 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
7889 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
7892 * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
7895 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
7896 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
7899 * Given the private host command offset, calculate the true private host
7902 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
7903 (EC_CMD_BOARD_SPECIFIC_BASE + (command))
7905 /*****************************************************************************/
7909 * Some platforms have sub-processors chained to each other. For example.
7911 * AP <--> EC <--> PD MCU
7913 * The top 2 bits of the command number are used to indicate which device the
7914 * command is intended for. Device 0 is always the device receiving the
7915 * command; other device mapping is board-specific.
7917 * When a device receives a command to be passed to a sub-processor, it passes
7918 * it on with the device number set back to 0. This allows the sub-processor
7919 * to remain blissfully unaware of whether the command originated on the next
7920 * device up the chain, or was passed through from the AP.
7922 * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
7923 * AP sends command 0x4002 to the EC
7924 * EC sends command 0x0002 to the PD MCU
7925 * EC forwards PD MCU response back to the AP
7928 /* Offset and max command number for sub-device n */
7929 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
7930 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
7932 /*****************************************************************************/
7934 * Deprecated constants. These constants have been renamed for clarity. The
7935 * meaning and size has not changed. Programs that use the old names should
7936 * switch to the new names soon, as the old names may not be carried forward
7939 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE
7940 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1
7941 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
7943 #endif /* !__ACPI__ */
7949 #endif /* __CROS_EC_EC_COMMANDS_H */