2 * This file is part of the coreboot project.
4 * Copyright (C) 2016 Intel Corp.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #ifndef _FSP2_0_UPD_H_
13 #define _FSP2_0_UPD_H_
17 struct FSP_UPD_HEADER
{
19 /// UPD Region Signature. This signature will be
20 /// "XXXXXX_T" for FSP-T
21 /// "XXXXXX_M" for FSP-M
22 /// "XXXXXX_S" for FSP-S
23 /// Where XXXXXX is an unique signature
27 /// Revision of the Data structure. For FSP v2.0 value is 1.
33 struct FSPM_ARCH_UPD
{
35 /// Revision of the structure. For FSP v2.0 value is 1.
40 /// Pointer to the non-volatile storage (NVS) data buffer.
41 /// If it is NULL it indicates the NVS data is not available.
45 /// Pointer to the temporary stack base address to be
46 /// consumed inside FspMemoryInit() API.
50 /// Temporary stack size to be consumed inside
51 /// FspMemoryInit() API.
55 /// Size of memory to be reserved by FSP below "top
56 /// of low usable memory" for bootloader usage.
58 uint32_t BootLoaderTolumSize
;
60 /// Current boot mode.
66 #endif /* _FSP2_0_UPD_H_ */