Rename __attribute__((packed)) --> __packed
[coreboot.git] / src / drivers / intel / fsp1_0 / fsp_util.c
blobfc1bd5116182b0f2bf05913172be0d1d21fa72a3
1 /*
2 * This file is part of the coreboot project.
4 * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <types.h>
17 #include <string.h>
18 #include <console/console.h>
19 #include <bootstate.h>
20 #include <cbmem.h>
21 #include "fsp_util.h"
22 #include <lib.h> // hexdump
23 #include <ip_checksum.h>
24 #include <timestamp.h>
26 #ifndef __PRE_RAM__
27 /* Globals pointers for FSP structures */
28 void *FspHobListPtr = NULL;
29 FSP_INFO_HEADER *fsp_header_ptr = NULL;
31 void FspNotify (u32 Phase)
33 FSP_NOTFY_PHASE NotifyPhaseProc;
34 NOTIFY_PHASE_PARAMS NotifyPhaseParams;
35 EFI_STATUS Status;
37 if (fsp_header_ptr == NULL) {
38 fsp_header_ptr = (void *)find_fsp();
39 if ((u32)fsp_header_ptr < 0xff) {
40 post_code(0x4F); /* output something in case there is no serial */
41 die("Can't find the FSP!\n");
45 /* call FSP PEI to Notify PostPciEnumeration */
46 NotifyPhaseProc = (FSP_NOTFY_PHASE)(fsp_header_ptr->ImageBase +
47 fsp_header_ptr->NotifyPhaseEntry);
48 NotifyPhaseParams.Phase = Phase;
50 timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
51 TS_FSP_BEFORE_FINALIZE : TS_FSP_BEFORE_ENUMERATE);
53 Status = NotifyPhaseProc (&NotifyPhaseParams);
55 timestamp_add_now(Phase == EnumInitPhaseReadyToBoot ?
56 TS_FSP_AFTER_FINALIZE : TS_FSP_AFTER_ENUMERATE);
58 if (Status != 0)
59 printk(BIOS_ERR,"FSP API NotifyPhase failed for phase 0x%x with status: 0x%x\n", Phase, Status);
61 #endif /* #ifndef __PRE_RAM__ */
63 #ifdef __PRE_RAM__
66 * Call the FSP to do memory init. The FSP doesn't return to this function.
67 * The FSP returns to the romstage_main_continue().
69 void __attribute__((noreturn)) fsp_early_init (FSP_INFO_HEADER *fsp_ptr)
71 FSP_FSP_INIT FspInitApi;
72 FSP_INIT_PARAMS FspInitParams;
73 FSP_INIT_RT_BUFFER FspRtBuffer;
74 #if IS_ENABLED(CONFIG_FSP_USES_UPD)
75 UPD_DATA_REGION fsp_upd_data;
76 #endif
78 memset((void*)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER));
79 FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP;
80 FspInitParams.NvsBufferPtr = NULL;
82 #if IS_ENABLED(CONFIG_FSP_USES_UPD)
83 FspRtBuffer.Common.UpdDataRgnPtr = &fsp_upd_data;
84 #endif
85 FspInitParams.RtBufferPtr = (FSP_INIT_RT_BUFFER *)&FspRtBuffer;
86 FspInitParams.ContinuationFunc = (CONTINUATION_PROC)ChipsetFspReturnPoint;
87 FspInitApi = (FSP_FSP_INIT)(fsp_ptr->ImageBase + fsp_ptr->FspInitEntry);
89 /* Call the chipset code to fill in the chipset specific structures */
90 chipset_fsp_early_init(&FspInitParams, fsp_ptr);
92 /* Call back to romstage for board specific changes */
93 romstage_fsp_rt_buffer_callback(&FspRtBuffer);
95 post_code(POST_FSP_MEMORY_INIT);
96 FspInitApi(&FspInitParams);
98 /* Should never return. Control will continue from ContinuationFunc */
99 die("Uh Oh! FspInitApi returned");
101 #endif /* __PRE_RAM__ */
103 volatile u8 * find_fsp ()
106 #ifdef __PRE_RAM__
107 volatile register u8 *fsp_ptr asm ("eax");
109 /* Entry point for CAR assembly routine */
110 __asm__ __volatile__ (
111 ".global find_fsp\n\t"
112 "find_fsp:\n\t"
114 #else
115 volatile u8 *fsp_ptr;
116 #endif /* __PRE_RAM__ */
118 /* The FSP is stored in CBFS */
119 fsp_ptr = (u8 *) CONFIG_FSP_LOC;
121 /* Check the FV signature, _FVH */
122 if (((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->Signature == 0x4856465F) {
123 /* Go to the end of the FV header and align the address. */
124 fsp_ptr += ((EFI_FIRMWARE_VOLUME_HEADER *)fsp_ptr)->ExtHeaderOffset;
125 fsp_ptr += ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)fsp_ptr)->ExtHeaderSize;
126 fsp_ptr = (u8 *)(((u32)fsp_ptr + 7) & 0xFFFFFFF8);
127 } else {
128 fsp_ptr = (u8*)ERROR_NO_FV_SIG;
131 /* Check the FFS GUID */
132 if (((u32)fsp_ptr > 0xff) &&
133 (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[0] == 0x912740BE) &&
134 (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[1] == 0x47342284) &&
135 (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[2] == 0xB08471B9) &&
136 (((u32 *)&(((EFI_FFS_FILE_HEADER *)fsp_ptr)->Name))[3] == 0x0C3F3527)) {
137 /* Add the FFS Header size to the base to find the Raw section Header */
138 fsp_ptr += sizeof(EFI_FFS_FILE_HEADER);
139 } else {
140 fsp_ptr = (u8 *)ERROR_NO_FFS_GUID;
143 if (((u32)fsp_ptr > 0xff) &&
144 ((EFI_RAW_SECTION *)fsp_ptr)->Type == EFI_SECTION_RAW) {
145 /* Add the Raw Header size to the base to find the FSP INFO Header */
146 fsp_ptr += sizeof(EFI_RAW_SECTION);
147 } else {
148 fsp_ptr = (u8 *)ERROR_NO_INFO_HEADER;
151 /* Verify that the FSP is set to the base address we're expecting.*/
152 if (((u32)fsp_ptr > 0xff) &&
153 (*(u32*)(fsp_ptr + FSP_IMAGE_BASE_LOC) != CONFIG_FSP_LOC)) {
154 fsp_ptr = (u8 *)ERROR_IMAGEBASE_MISMATCH;
157 /* Verify the FSP Signature */
158 if (((u32)fsp_ptr > 0xff) &&
159 (*(u32*)(fsp_ptr + FSP_IMAGE_SIG_LOC) != FSP_SIG)){
160 fsp_ptr = (u8 *)ERROR_INFO_HEAD_SIG_MISMATCH;
163 /* Verify the FSP ID */
164 if (((u32)fsp_ptr > 0xff) &&
165 ((*(u32 *)(fsp_ptr + FSP_IMAGE_ID_LOC) != FSP_IMAGE_ID_DWORD0) ||
166 (*(u32 *)(fsp_ptr + (FSP_IMAGE_ID_LOC + 4)) != FSP_IMAGE_ID_DWORD1))) {
167 fsp_ptr = (u8 *)ERROR_FSP_SIG_MISMATCH;
170 return (fsp_ptr);
173 /** finds the saved temporary memory information in the FSP HOB list
175 * @param hob_list_ptr pointer to the start of the hob list
176 * @return pointer to saved CAR MEM or NULL if not found.
178 void * find_saved_temp_mem(void *hob_list_ptr)
180 EFI_GUID temp_hob_guid = FSP_BOOTLOADER_TEMPORARY_MEMORY_HOB_GUID;
181 EFI_HOB_GUID_TYPE *saved_mem_hob =
182 (EFI_HOB_GUID_TYPE *) find_hob_by_guid(
183 hob_list_ptr, &temp_hob_guid);
185 if (saved_mem_hob == NULL)
186 return NULL;
188 return (void *) ((char *) saved_mem_hob + sizeof(EFI_HOB_GUID_TYPE));
191 #ifndef FSP_RESERVE_MEMORY_SIZE
192 /** @brief locates the HOB containing the location of the fsp reserved mem area
194 * @param hob_list_ptr pointer to the start of the hob list
195 * @return pointer to the start of the FSP reserved memory or NULL if not found.
197 void * find_fsp_reserved_mem(void *hob_list_ptr)
199 EFI_GUID fsp_reserved_guid = FSP_HOB_RESOURCE_OWNER_FSP_GUID;
200 EFI_HOB_RESOURCE_DESCRIPTOR *fsp_reserved_mem =
201 (EFI_HOB_RESOURCE_DESCRIPTOR *) find_hob_by_guid(
202 hob_list_ptr, &fsp_reserved_guid);
204 if (fsp_reserved_mem == NULL)
205 return NULL;
207 return (void *)((uintptr_t)fsp_reserved_mem->PhysicalStart);
209 #endif /* FSP_RESERVE_MEMORY_SIZE */
211 #ifndef __PRE_RAM__ /* Only parse HOB data in ramstage */
213 void print_fsp_info(void) {
215 if (fsp_header_ptr == NULL)
216 fsp_header_ptr = (void *)find_fsp();
218 if ((u32)fsp_header_ptr < 0xff) {
219 post_code(0x4F); /* post code in case there is no serial */
220 die("Can't find the FSP!\n");
223 if (FspHobListPtr == NULL) {
224 FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
227 printk(BIOS_SPEW,"fsp_header_ptr: %p\n", fsp_header_ptr);
228 printk(BIOS_INFO,"FSP Header Version: %d\n", fsp_header_ptr->HeaderRevision);
229 printk(BIOS_INFO,"FSP Revision: %d.%d\n",
230 (u8)((fsp_header_ptr->ImageRevision >> 8) & 0xff),
231 (u8)(fsp_header_ptr->ImageRevision & 0xff));
235 #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
237 * Save the FSP memory HOB (mrc data) to the MRC area in CBMEM
239 int save_mrc_data(void *hob_start)
241 u32 *mrc_hob;
242 u32 *mrc_hob_data;
243 u32 mrc_hob_size;
244 struct mrc_data_container *mrc_data;
245 int output_len;
246 const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
248 mrc_hob = GetNextGuidHob(&mrc_guid, hob_start);
249 if (mrc_hob == NULL){
250 printk(BIOS_DEBUG, "Memory Configure Data Hob is not present\n");
251 return(0);
254 mrc_hob_data = GET_GUID_HOB_DATA (mrc_hob);
255 mrc_hob_size = (u32) GET_HOB_LENGTH(mrc_hob);
257 printk(BIOS_DEBUG, "Memory Configure Data Hob at %p (size = 0x%x).\n",
258 (void *)mrc_hob_data, mrc_hob_size);
260 output_len = ALIGN(mrc_hob_size, 16);
262 /* Save the MRC S3/fast boot/ADR restore data to cbmem */
263 mrc_data = cbmem_add (CBMEM_ID_MRCDATA,
264 output_len + sizeof(struct mrc_data_container));
266 /* Just return if there was a problem with getting CBMEM */
267 if (mrc_data == NULL) {
268 printk(BIOS_WARNING, "CBMEM was not available to save the fast boot cache data.\n");
269 return 0;
272 printk(BIOS_DEBUG, "Copy FSP MRC DATA to HOB (source addr %p, dest addr %p, %u bytes)\n",
273 (void *)mrc_hob_data, mrc_data, output_len);
275 mrc_data->mrc_signature = MRC_DATA_SIGNATURE;
276 mrc_data->mrc_data_size = output_len;
277 mrc_data->reserved = 0;
278 memcpy(mrc_data->mrc_data, (const void *)mrc_hob_data, mrc_hob_size);
280 /* Zero the unused space in aligned buffer. */
281 if (output_len > mrc_hob_size)
282 memset((mrc_data->mrc_data + mrc_hob_size), 0,
283 output_len - mrc_hob_size);
285 mrc_data->mrc_checksum = compute_ip_checksum(mrc_data->mrc_data,
286 mrc_data->mrc_data_size);
288 printk(BIOS_SPEW, "Fast boot data (includes align and checksum):\n");
289 hexdump32(BIOS_SPEW, (void *)mrc_data->mrc_data, output_len / 4);
290 return (1);
292 #endif /* CONFIG_ENABLE_MRC_CACHE */
294 static void find_fsp_hob_update_mrc(void *unused)
296 /* Set the global HOB list pointer */
297 FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
299 if (!FspHobListPtr){
300 printk(BIOS_ERR, "ERROR: Could not find FSP HOB pointer in CBFS!\n");
301 } else {
302 /* 0x0000: Print all types */
303 print_hob_type_structure(0x000, FspHobListPtr);
305 #if IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)
306 if (save_mrc_data(FspHobListPtr))
307 update_mrc_cache(NULL);
308 else
309 printk(BIOS_DEBUG,"Not updating MRC data in flash.\n");
310 #endif
314 /** @brief Notify FSP for PostPciEnumeration
316 * @param unused
318 static void fsp_after_pci_enum(void *unused)
320 /* This call needs to be done before resource allocation. */
321 printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
322 post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE);
323 FspNotify(EnumInitPhaseAfterPciEnumeration);
324 printk(BIOS_DEBUG,
325 "Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
328 /** @brief Notify FSP for ReadyToBoot
330 * @param unused
332 static void fsp_finalize(void *unused)
334 printk(BIOS_DEBUG, "FspNotify(EnumInitPhaseReadyToBoot)\n");
335 print_fsp_info();
336 post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE);
337 FspNotify(EnumInitPhaseReadyToBoot);
338 printk(BIOS_DEBUG, "Returned from FspNotify(EnumInitPhaseReadyToBoot)\n");
341 /* Set up for the ramstage FSP calls */
342 BOOT_STATE_INIT_ENTRY(BS_DEV_ENUMERATE, BS_ON_EXIT, fsp_after_pci_enum, NULL);
343 BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, fsp_finalize, NULL);
345 /* Update the MRC/fast boot cache as part of the late table writing stage */
346 BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
347 find_fsp_hob_update_mrc, NULL);
348 #endif /* #ifndef __PRE_RAM__ */