src/cpu/ti/am335x/pinmux.h

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  * Copyright (C) 2013 Google Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #ifndef __CPU_TI_AM335X_PINMUX_H
  17 #define __CPU_TI_AM335X_PINMUX_H
  18
  19 #include <stdint.h>
  20
  21 // PAD Control Fields
  22 #define SLEWCTRL        (0x1 << 6)
  23 #define RXACTIVE        (0x1 << 5)
  24 #define PULLDOWN_EN     (0x0 << 4) // Pull down
  25 #define PULLUP_EN       (0x1 << 4) // Pull up
  26 #define PULLUDEN        (0x0 << 3) // Pull up enabled
  27 #define PULLUDDIS       (0x1 << 3) // Pull up disabled
  28 #define MODE(val)       val
  29
  30 void am335x_pinmux_uart0(void);
  31 void am335x_pinmux_uart1(void);
  32 void am335x_pinmux_uart2(void);
  33 void am335x_pinmux_uart3(void);
  34 void am335x_pinmux_uart4(void);
  35 void am335x_pinmux_uart5(void);
  36
  37 void am335x_pinmux_mmc0(int cd, int sk_evm);
  38 void am335x_pinmux_mmc1(void);
  39
  40 void am335x_pinmux_i2c0(void);
  41 void am335x_pinmux_i2c1(void);
  42
  43 void am335x_pinmux_spi0(void);
  44
  45 void am335x_pinmux_gpio0_7(void);
  46
  47 void am335x_pinmux_rgmii1(void);
  48 void am335x_pinmux_mii1(void);
  49
  50 void am335x_pinmux_nand(void);
  51
  52 #define AM335X_PINMUX_REG_ADDR 0x44e10800
  53
  54 struct am335x_pinmux_regs {
  55         uint32_t gpmc_ad0;
  56         uint32_t gpmc_ad1;
  57         uint32_t gpmc_ad2;
  58         uint32_t gpmc_ad3;
  59         uint32_t gpmc_ad4;
  60         uint32_t gpmc_ad5;
  61         uint32_t gpmc_ad6;
  62         uint32_t gpmc_ad7;
  63         uint32_t gpmc_ad8;
  64         uint32_t gpmc_ad9;
  65         uint32_t gpmc_ad10;
  66         uint32_t gpmc_ad11;
  67         uint32_t gpmc_ad12;
  68         uint32_t gpmc_ad13;
  69         uint32_t gpmc_ad14;
  70         uint32_t gpmc_ad15;
  71         uint32_t gpmc_a0;
  72         uint32_t gpmc_a1;
  73         uint32_t gpmc_a2;
  74         uint32_t gpmc_a3;
  75         uint32_t gpmc_a4;
  76         uint32_t gpmc_a5;
  77         uint32_t gpmc_a6;
  78         uint32_t gpmc_a7;
  79         uint32_t gpmc_a8;
  80         uint32_t gpmc_a9;
  81         uint32_t gpmc_a10;
  82         uint32_t gpmc_a11;
  83         uint32_t gpmc_wait0;
  84         uint32_t gpmc_wpn;
  85         uint32_t gpmc_be1n;
  86         uint32_t gpmc_csn0;
  87         uint32_t gpmc_csn1;
  88         uint32_t gpmc_csn2;
  89         uint32_t gpmc_csn3;
  90         uint32_t gpmc_clk;
  91         uint32_t gpmc_advn_ale;
  92         uint32_t gpmc_oen_ren;
  93         uint32_t gpmc_wen;
  94         uint32_t gpmc_be0n_cle;
  95         uint32_t lcd_data0;
  96         uint32_t lcd_data1;
  97         uint32_t lcd_data2;
  98         uint32_t lcd_data3;
  99         uint32_t lcd_data4;
 100         uint32_t lcd_data5;
 101         uint32_t lcd_data6;
 102         uint32_t lcd_data7;
 103         uint32_t lcd_data8;
 104         uint32_t lcd_data9;
 105         uint32_t lcd_data10;
 106         uint32_t lcd_data11;
 107         uint32_t lcd_data12;
 108         uint32_t lcd_data13;
 109         uint32_t lcd_data14;
 110         uint32_t lcd_data15;
 111         uint32_t lcd_vsync;
 112         uint32_t lcd_hsync;
 113         uint32_t lcd_pclk;
 114         uint32_t lcd_ac_bias_en;
 115         uint32_t mmc0_dat3;
 116         uint32_t mmc0_dat2;
 117         uint32_t mmc0_dat1;
 118         uint32_t mmc0_dat0;
 119         uint32_t mmc0_clk;
 120         uint32_t mmc0_cmd;
 121         uint32_t mii1_col;
 122         uint32_t mii1_crs;
 123         uint32_t mii1_rxerr;
 124         uint32_t mii1_txen;
 125         uint32_t mii1_rxdv;
 126         uint32_t mii1_txd3;
 127         uint32_t mii1_txd2;
 128         uint32_t mii1_txd1;
 129         uint32_t mii1_txd0;
 130         uint32_t mii1_txclk;
 131         uint32_t mii1_rxclk;
 132         uint32_t mii1_rxd3;
 133         uint32_t mii1_rxd2;
 134         uint32_t mii1_rxd1;
 135         uint32_t mii1_rxd0;
 136         uint32_t rmii1_refclk;
 137         uint32_t mdio_data;
 138         uint32_t mdio_clk;
 139         uint32_t spi0_sclk;
 140         uint32_t spi0_d0;
 141         uint32_t spi0_d1;
 142         uint32_t spi0_cs0;
 143         uint32_t spi0_cs1;
 144         uint32_t ecap0_in_pwm0_out;
 145         uint32_t uart0_ctsn;
 146         uint32_t uart0_rtsn;
 147         uint32_t uart0_rxd;
 148         uint32_t uart0_txd;
 149         uint32_t uart1_ctsn;
 150         uint32_t uart1_rtsn;
 151         uint32_t uart1_rxd;
 152         uint32_t uart1_txd;
 153         uint32_t i2c0_sda;
 154         uint32_t i2c0_scl;
 155         uint32_t mcasp0_aclkx;
 156         uint32_t mcasp0_fsx;
 157         uint32_t mcasp0_axr0;
 158         uint32_t mcasp0_ahclkr;
 159         uint32_t mcasp0_aclkr;
 160         uint32_t mcasp0_fsr;
 161         uint32_t mcasp0_axr1;
 162         uint32_t mcasp0_ahclkx;
 163         uint32_t xdma_event_intr0;
 164         uint32_t xdma_event_intr1;
 165         uint32_t nresetin_out;
 166         uint32_t porz;
 167         uint32_t nnmi;
 168         uint32_t osc0_in;
 169         uint32_t osc0_out;
 170         uint32_t rsvd1;
 171         uint32_t tms;
 172         uint32_t tdi;
 173         uint32_t tdo;
 174         uint32_t tck;
 175         uint32_t ntrst;
 176         uint32_t emu0;
 177         uint32_t emu1;
 178         uint32_t osc1_in;
 179         uint32_t osc1_out;
 180         uint32_t pmic_power_en;
 181         uint32_t rtc_porz;
 182         uint32_t rsvd2;
 183         uint32_t ext_wakeup;
 184         uint32_t enz_kaldo_1p8v;
 185         uint32_t usb0_dm;
 186         uint32_t usb0_dp;
 187         uint32_t usb0_ce;
 188         uint32_t usb0_id;
 189         uint32_t usb0_vbus;
 190         uint32_t usb0_drvvbus;
 191         uint32_t usb1_dm;
 192         uint32_t usb1_dp;
 193         uint32_t usb1_ce;
 194         uint32_t usb1_id;
 195         uint32_t usb1_vbus;
 196         uint32_t usb1_drvvbus;
 197         uint32_t ddr_resetn;
 198         uint32_t ddr_csn0;
 199         uint32_t ddr_cke;
 200         uint32_t ddr_ck;
 201         uint32_t ddr_nck;
 202         uint32_t ddr_casn;
 203         uint32_t ddr_rasn;
 204         uint32_t ddr_wen;
 205         uint32_t ddr_ba0;
 206         uint32_t ddr_ba1;
 207         uint32_t ddr_ba2;
 208         uint32_t ddr_a0;
 209         uint32_t ddr_a1;
 210         uint32_t ddr_a2;
 211         uint32_t ddr_a3;
 212         uint32_t ddr_a4;
 213         uint32_t ddr_a5;
 214         uint32_t ddr_a6;
 215         uint32_t ddr_a7;
 216         uint32_t ddr_a8;
 217         uint32_t ddr_a9;
 218         uint32_t ddr_a10;
 219         uint32_t ddr_a11;
 220         uint32_t ddr_a12;
 221         uint32_t ddr_a13;
 222         uint32_t ddr_a14;
 223         uint32_t ddr_a15;
 224         uint32_t ddr_odt;
 225         uint32_t ddr_d0;
 226         uint32_t ddr_d1;
 227         uint32_t ddr_d2;
 228         uint32_t ddr_d3;
 229         uint32_t ddr_d4;
 230         uint32_t ddr_d5;
 231         uint32_t ddr_d6;
 232         uint32_t ddr_d7;
 233         uint32_t ddr_d8;
 234         uint32_t ddr_d9;
 235         uint32_t ddr_d10;
 236         uint32_t ddr_d11;
 237         uint32_t ddr_d12;
 238         uint32_t ddr_d13;
 239         uint32_t ddr_d14;
 240         uint32_t ddr_d15;
 241         uint32_t ddr_dqm0;
 242         uint32_t ddr_dqm1;
 243         uint32_t ddr_dqs0;
 244         uint32_t ddr_dqsn0;
 245         uint32_t ddr_dqs1;
 246         uint32_t ddr_dqsn1;
 247         uint32_t ddr_vref;
 248         uint32_t ddr_vtp;
 249         uint32_t ddr_strben0;
 250         uint32_t ddr_strben1;
 251         uint32_t ain7;
 252         uint32_t ain6;
 253         uint32_t ain5;
 254         uint32_t ain4;
 255         uint32_t ain3;
 256         uint32_t ain2;
 257         uint32_t ain1;
 258         uint32_t ain0;
 259         uint32_t vrefp;
 260         uint32_t vrefn;
 261 };
 262
 263 #endif