src/mainboard/intel/tglrvp/dsdt.asl

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi.h>
   4 #include <baseboard/ec.h>
   5 #include <baseboard/gpio.h>
   6
   7 DefinitionBlock(
   8         "dsdt.aml",
   9         "DSDT",
  10         0x02,           /* DSDT revision: ACPI v2.0 and up */
  11         OEM_ID,
  12         ACPI_TABLE_CREATOR,
  13         0x20110725      /* OEM revision */
  14 )
  15 {
  16         #include <soc/intel/common/block/acpi/acpi/platform.asl>
  17
  18         /* global NVS and variables */
  19         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
  20
  21         /* CPU */
  22         #include <cpu/intel/common/acpi/cpu.asl>
  23
  24         Scope (\_SB) {
  25                 Device (PCI0)
  26                 {
  27                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
  28                         #include <soc/intel/tigerlake/acpi/southbridge.asl>
  29                         #include <soc/intel/tigerlake/acpi/tcss.asl>
  30                         #include <soc/intel/common/block/acpi/acpi/ipu.asl>
  31                 }
  32         }
  33
  34 #if CONFIG(CHROMEOS)
  35         /* Chrome OS specific */
  36         #include <vendorcode/google/chromeos/acpi/chromeos.asl>
  37 #endif
  38
  39 #if CONFIG(EC_GOOGLE_CHROMEEC)
  40         /* Chrome OS Embedded Controller */
  41                 Scope (\_SB.PCI0.LPCB)
  42                 {
  43                         /* ACPI code for EC SuperIO functions */
  44                         #include <ec/google/chromeec/acpi/superio.asl>
  45                         /* ACPI code for EC functions */
  46                         #include <ec/google/chromeec/acpi/ec.asl>
  47                 }
  48 #endif
  49
  50         #include <southbridge/intel/common/acpi/sleepstates.asl>
  51
  52         /* Mainboard specific */
  53         #include "acpi/mainboard.asl"
  54
  55         /* Camera */
  56         #include "acpi/mipi_camera.asl"
  57 }