soc/intel/common/block/acpi: Factor out common platform.asl
[coreboot.git] / src / mainboard / intel / icelake_rvp / dsdt.asl
blob41a9c0ae52cb487ac169b73185e1d011cd914f2a
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <baseboard/ec.h>
5 #include <baseboard/gpio.h>
7 DefinitionBlock(
8         "dsdt.aml",
9         "DSDT",
10         0x02,           // DSDT revision: ACPI v2.0 and up
11         OEM_ID,
12         ACPI_TABLE_CREATOR,
13         0x20110725      // OEM revision
16         #include <soc/intel/common/block/acpi/acpi/platform.asl>
18         // global NVS and variables
19         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
21         // CPU
22         #include <cpu/intel/common/acpi/cpu.asl>
24         Scope (\_SB) {
25                 Device (PCI0)
26                 {
27                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
28                         #include <soc/intel/icelake/acpi/southbridge.asl>
29                 }
30         }
32 #if CONFIG(CHROMEOS)
33         // Chrome OS specific
34         #include <vendorcode/google/chromeos/acpi/chromeos.asl>
35 #endif
37 #if CONFIG(EC_GOOGLE_CHROMEEC)
38         /* Chrome OS Embedded Controller */
39                 Scope (\_SB.PCI0.LPCB)
40                 {
41                         /* ACPI code for EC SuperIO functions */
42                         #include <ec/google/chromeec/acpi/superio.asl>
43                         /* ACPI code for EC functions */
44                         #include <ec/google/chromeec/acpi/ec.asl>
45                 }
46 #endif
48         #include <southbridge/intel/common/acpi/sleepstates.asl>
50         // Mainboard specific
51         #include "acpi/mainboard.asl"