1 chip northbridge
/intel
/sandybridge
3 register
"gfx.ndid" = "3"
4 register
"gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
6 # Enable DisplayPort Hotplug with
6ms pulse
7 register
"gpu_dp_d_hotplug" = "0x06"
9 # Enable Panel
as LVDS
and configure power delays
10 register
"gpu_panel_port_select" = "0" # LVDS
11 register
"gpu_panel_power_cycle_delay" = "5" # T4
: 400ms
12 register
"gpu_panel_power_up_delay" = "400" # T1
+T2
: 40ms
13 register
"gpu_panel_power_down_delay" = "150" # T3
: 15ms
14 register
"gpu_panel_power_backlight_on_delay" = "2100" # T5
: 210ms
15 register
"gpu_panel_power_backlight_off_delay" = "2100" # TD
: 210ms
18 register
"gfx.use_spread_spectrum_clock" = "0"
19 register
"gfx.link_frequency_270_mhz" = "1"
20 register
"gpu_cpu_backlight" = "0x1155"
21 register
"gpu_pch_backlight" = "0x06100610"
23 register
"max_mem_clock_mhz" = "666"
25 device cpu_cluster
0 on
26 chip cpu
/intel
/model_206ax
27 # Magic APIC ID
to locate this chip
28 device lapic
0x0 on
end
29 device lapic
0xacac off
end
31 register
"tcc_offset" = "5" # TCC of
95C
33 register
"c1_acpower" = "1" # ACPI
(C1
) = MWAIT
(C1
)
34 register
"c2_acpower" = "3" # ACPI
(C2
) = MWAIT
(C3
)
35 register
"c3_acpower" = "5" # ACPI
(C3
) = MWAIT
(C7
)
37 register
"c1_battery" = "1" # ACPI
(C1
) = MWAIT
(C1
)
38 register
"c2_battery" = "3" # ACPI
(C2
) = MWAIT
(C3
)
39 register
"c3_battery" = "5" # ACPI
(C3
) = MWAIT
(C7
)
43 register
"pci_mmio_size" = "1024"
46 subsystemid
0x1ae0 0xc000 inherit
47 device pci
00.0 on
end # host bridge
48 device pci
02.0 on
end # vga controller
50 chip southbridge
/intel
/bd82x6x # Intel Series
6 Cougar Point PCH
52 #
0 No effect
(default
)
53 #
1 SMI#
(if corresponding ALT_GPI_SMI_EN bit is also
set)
54 #
2 SCI
(if corresponding GPIO_EN bit is also
set)
55 register
"alt_gp_smi_en" = "0x0002"
56 register
"gpi1_routing" = "1"
57 register
"gpi6_routing" = "2"
59 register
"sata_port_map" = "0x3"
60 #
Set max SATA speed
to 3.0 Gb
/s
61 register
"sata_interface_speed_support" = "0x2"
63 # Enable EC Port
0x68/0x6C
64 register
"gen1_dec" = "0x00040069"
66 # EC range is
0x800-0x9ff
67 register
"gen2_dec" = "0x00fc0901"
69 # EC range is
0x1610-0x161F
70 register
"gen3_dec" = "0x0001C1611"
72 # Enable zero
-based linear PCIe root port functions
73 register
"pcie_port_coalesce" = "1"
75 register
"c2_latency" = "1"
77 device pci
14.0 on
end # USB
3.0 Controller
78 device pci
16.0 on
end # Management Engine Interface
1
79 device pci
16.1 off
end # Management Engine Interface
2
80 device pci
16.2 off
end # Management Engine IDE
-R
81 device pci
16.3 off
end # Management Engine KT
82 device pci
19.0 off
end # Intel Gigabit Ethernet
83 device pci
1a
.0 on
end # USB2 EHCI #
2 (AUO4
, BlueTooth
)
84 device pci
1b
.0 on
end # High Definition Audio
85 device pci
1c
.0 on
end # PCIe Port #
1
86 device pci
1c
.1 on
end # PCIe Port #
2 (WLAN
)
87 device pci
1c
.2 on
end # PCIe Port #
3 (Card Reader
)
88 register
"pcie_aspm_f2" = "0x3"
89 device pci
1c
.3 off
end # PCIe Port #
4
90 device pci
1c
.4 off
end # PCIe Port #
5
91 device pci
1c
.5 on
end # PCIe Port #
6 (LAN
)
92 device pci
1c
.6 off
end # PCIe Port #
7
93 device pci
1c
.7 off
end # PCIe Port #
8
94 device pci
1d
.0 on
end # USB2 EHCI #
1 (Camera
, WLAN
, WWAN
)
95 device pci
1e
.0 off
end # PCI bridge
98 device pnp
0c31.0 on
end
100 chip ec
/quanta
/it8518
102 device pnp ff
.1 on # dummy address
106 device pci
1f
.2 on
end # SATA Controller
1 (HDD
/SSD
)
107 device pci
1f
.3 on
end # SMBus Controller
108 device pci
1f
.5 off
end # SATA Controller
2 (MSATA
)
109 device pci
1f
.6 off
end # Thermal