src/mainboard/google/hatch/dsdt.asl

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <acpi/acpi.h>
   4 #include <variant/ec.h>
   5 #include <variant/gpio.h>
   6
   7 DefinitionBlock(
   8         "dsdt.aml",
   9         "DSDT",
  10         ACPI_DSDT_REV_2,
  11         OEM_ID,
  12         ACPI_TABLE_CREATOR,
  13         0x20110725
  14 )
  15 {
  16         #include <acpi/dsdt_top.asl>
  17         #include <soc/intel/common/block/acpi/acpi/platform.asl>
  18         #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
  19         #include <cpu/intel/common/acpi/cpu.asl>
  20
  21         Scope (\_SB) {
  22                 Device (PCI0)
  23                 {
  24                         #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
  25                         #include <soc/intel/cannonlake/acpi/southbridge.asl>
  26 #if CONFIG(BOARD_GOOGLE_BASEBOARD_HATCH)
  27                         #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
  28 #endif
  29                 }
  30         }
  31
  32         #include <southbridge/intel/common/acpi/sleepstates.asl>
  33
  34         /* ChromeOS Embedded Controller */
  35         Scope (\_SB.PCI0.LPCB)
  36         {
  37                 /* ACPI code for EC SuperIO functions */
  38                 #include <ec/google/chromeec/acpi/superio.asl>
  39                 /* ACPI code for EC functions */
  40                 #include <ec/google/chromeec/acpi/ec.asl>
  41         }
  42
  43 #if CONFIG(BOARD_GOOGLE_BASEBOARD_HATCH)
  44         /* Dynamic Platform Thermal Framework */
  45         Scope (\_SB)
  46         {
  47                 /* Per board variant specific definitions. */
  48                 #include <variant/acpi/dptf.asl>
  49                 /* Include common dptf ASL files */
  50                 #include <soc/intel/common/acpi/dptf/dptf.asl>
  51         }
  52 #endif
  53 }