src/include/elog.h

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2012 The ChromiumOS Authors.  All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
  18  */
  19
  20 #ifndef ELOG_H_
  21 #define ELOG_H_
  22
  23 #if CONFIG_ELOG
  24
  25 /* SMI command code for GSMI event logging */
  26 #define ELOG_GSMI_APM_CNT                 0xEF
  27
  28 #define MAX_EVENT_SIZE                    0x7F
  29
  30 /* End of log */
  31 #define ELOG_TYPE_EOL                     0xFF
  32
  33 /*
  34  * Standard SMBIOS event log types below 0x80
  35  */
  36 #define ELOG_TYPE_UNDEFINED_EVENT         0x00
  37 #define ELOG_TYPE_SINGLE_BIT_ECC_MEM_ERR  0x01
  38 #define ELOG_TYPE_MULTI_BIT_ECC_MEM_ERR   0x02
  39 #define ELOG_TYPE_MEM_PARITY_ERR          0x03
  40 #define ELOG_TYPE_BUS_TIMEOUT             0x04
  41 #define ELOG_TYPE_IO_CHECK                0x05
  42 #define ELOG_TYPE_SW_NMI                  0x06
  43 #define ELOG_TYPE_POST_MEM_RESIZE         0x07
  44 #define ELOG_TYPE_POST_ERR                0x08
  45 #define ELOG_TYPE_PCI_PERR                0x09
  46 #define ELOG_TYPE_PCI_SERR                0x0A
  47 #define ELOG_TYPE_CPU_FAIL                0x0B
  48 #define ELOG_TYPE_EISA_TIMEOUT            0x0C
  49 #define ELOG_TYPE_CORRECTABLE_MEMLOG_DIS  0x0D
  50 #define ELOG_TYPE_LOG_DISABLED            0x0E
  51 #define ELOG_TYPE_UNDEFINED_EVENT2        0x0F
  52 #define ELOG_TYPE_SYS_LIMIT_EXCEED        0x10
  53 #define ELOG_TYPE_ASYNC_HW_TIMER_EXPIRED  0x11
  54 #define ELOG_TYPE_SYS_CONFIG_INFO         0x12
  55 #define ELOG_TYPE_HDD_INFO                0x13
  56 #define ELOG_TYPE_SYS_RECONFIG            0x14
  57 #define ELOG_TYPE_CPU_ERROR               0x15
  58 #define ELOG_TYPE_LOG_CLEAR               0x16
  59 #define ELOG_TYPE_BOOT                    0x17
  60
  61 /*
  62  * Extended defined OEM event types start at 0x80
  63  */
  64
  65 /* OS/kernel events */
  66 #define ELOG_TYPE_OS_EVENT                0x81
  67
  68 /* Last event from coreboot */
  69 #define ELOG_TYPE_OS_BOOT                 0x90
  70
  71 /* Embedded controller event */
  72 #define ELOG_TYPE_EC_EVENT                0x91
  73
  74 /* Power */
  75 #define ELOG_TYPE_POWER_FAIL              0x92
  76 #define ELOG_TYPE_SUS_POWER_FAIL          0x93
  77 #define ELOG_TYPE_PWROK_FAIL              0x94
  78 #define ELOG_TYPE_SYS_PWROK_FAIL          0x95
  79 #define ELOG_TYPE_POWER_ON                0x96
  80 #define ELOG_TYPE_POWER_BUTTON            0x97
  81 #define ELOG_TYPE_POWER_BUTTON_OVERRIDE   0x98
  82
  83 /* Reset */
  84 #define ELOG_TYPE_RESET_BUTTON            0x99
  85 #define ELOG_TYPE_SYSTEM_RESET            0x9a
  86 #define ELOG_TYPE_RTC_RESET               0x9b
  87 #define ELOG_TYPE_TCO_RESET               0x9c
  88
  89 /* Sleep/Wake */
  90 #define ELOG_TYPE_ACPI_ENTER              0x9d
  91 #define ELOG_TYPE_ACPI_WAKE               0x9e
  92 #define ELOG_TYPE_WAKE_SOURCE             0x9f
  93 #define  ELOG_WAKE_SOURCE_PCIE             0x00
  94 #define  ELOG_WAKE_SOURCE_PME              0x01
  95 #define  ELOG_WAKE_SOURCE_PME_INTERNAL     0x02
  96 #define  ELOG_WAKE_SOURCE_RTC              0x03
  97 #define  ELOG_WAKE_SOURCE_GPIO             0x04
  98 #define  ELOG_WAKE_SOURCE_SMBUS            0x05
  99 struct elog_event_data_wake {
 100         u8 source;
 101         u32 instance;
 102 } __attribute__ ((packed));
 103
 104 /* Chrome OS related events */
 105 #define ELOG_TYPE_CROS_DEVELOPER_MODE     0xa0
 106 #define ELOG_TYPE_CROS_RECOVERY_MODE      0xa1
 107 #define  ELOG_CROS_RECOVERY_MODE_BUTTON    0x02
 108
 109 /* Management Engine Events */
 110 #define ELOG_TYPE_MANAGEMENT_ENGINE       0xa2
 111 #define ELOG_TYPE_MANAGEMENT_ENGINE_EXT   0xa4
 112 struct elog_event_data_me_extended {
 113         u8 current_working_state;
 114         u8 operation_state;
 115         u8 operation_mode;
 116         u8 error_code;
 117         u8 progress_code;
 118         u8 current_pmevent;
 119         u8 current_state;
 120 } __attribute__ ((packed));
 121
 122 /* Last post code from previous boot */
 123 #define ELOG_TYPE_LAST_POST_CODE          0xa3
 124
 125 extern int elog_init(void);
 126 extern int elog_clear(void);
 127 extern void elog_add_event_raw(u8 event_type, void *data, u8 data_size);
 128 extern void elog_add_event(u8 event_type);
 129 extern void elog_add_event_byte(u8 event_type, u8 data);
 130 extern void elog_add_event_word(u8 event_type, u16 data);
 131 extern void elog_add_event_dword(u8 event_type, u32 data);
 132 extern void elog_add_event_wake(u8 source, u32 instance);
 133 extern int elog_smbios_write_type15(unsigned long *current, int handle);
 134
 135 #if CONFIG_ELOG_GSMI
 136 extern u32 gsmi_exec(u8 command, u32 *param);
 137 #endif
 138
 139 #if CONFIG_ELOG_BOOT_COUNT
 140 u32 boot_count_read(void);
 141 u32 boot_count_increment(void);
 142 #endif
 143
 144 #endif /* !CONFIG_ELOG */
 145
 146 #endif /* ELOG_H_ */