2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include "hostbridge.asl"
21 /* PCI Device Resource Consumption */
24 Name (_HID, EISAID("PNP0C02"))
27 Name (PDRS, ResourceTemplate() {
28 Memory32Fixed(ReadWrite, 0xfed1c000, 0x00004000) // RCBA
29 Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000)
30 Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000)
31 Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000)
32 Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000)
33 Memory32Fixed(ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
34 Memory32Fixed(ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
35 Memory32Fixed(ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH
38 // Current Resource Settings
39 Method (_CRS, 0, Serialized)
45 // PCIe graphics port 0:1.0
48 // Integrated graphics 0:2.0
49 #include <drivers/intel/gma/acpi/non-pch.asl>