mediatek: Refactor to sharing code among similar SOCs
[coreboot.git] / src / soc / mediatek / mt8173 / timer.c
blobfd45f1d3d338e50b69e0f411d7f98da4da6804c7
1 /*
2 * This file is part of the coreboot project.
4 * Copyright 2015 MediaTek Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <arch/io.h>
17 #include <soc/mcucfg.h>
18 #include <soc/timer.h>
20 void timer_prepare(void)
22 /* Set XGPT_IDX to 0, then the bit field of XGPT_CTL will be programmed
23 * with following definition.
25 * [10: 8] Clock mode
26 * 100: 26Mhz / 4
27 * 010: 26Mhz / 2
28 * 001: 26Mhz
29 * [ 1: 1] Halt-on-debug enable bit
30 * [ 0: 0] XGPT enable bit
32 write32(&mt8173_mcucfg->xgpt_idx, 0);
33 /* Set clock mode to 13Mhz and enable XGPT */
34 write32(&mt8173_mcucfg->xgpt_ctl, (0x1 | ((26 / GPT4_MHZ) << 8)));