src/superio/nuvoton/nct6779d/nct6779d.h

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2015 Matt DeVillier <matt.devillier@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.
  19  */
  20
  21 #ifndef SUPERIO_NUVOTON_NCT6779D_H
  22 #define SUPERIO_NUVOTON_NCT6779D_H
  23
  24 /* Logical Device Numbers (LDN). */
  25 #define NCT6779D_PP                     0x01 /* Parallel port */
  26 #define NCT6779D_SP1            0x02 /* Com1 */
  27 #define NCT6779D_SP2            0x03 /* Com2 & IR */
  28 #define NCT6779D_KBC            0x05 /* PS/2 keyboard and mouse */
  29 #define NCT6779D_CIR            0x06 /* Consumer IR */
  30 #define NCT6779D_GPIO678_V      0x07 /* GPIO 6/7/8 */
  31 #define NCT6779D_WDT1_GPIO01_V  0x08 /* WDT1, GPIO 0/1 */
  32 #define NCT6779D_GPIO12345678_V 0x09 /* GPIO 1/2/3/4/5/6/7/8 */
  33 #define NCT6779D_ACPI           0x0A /* ACPI */
  34 #define NCT6779D_HWM_FPLED      0x0B /* Hardware monitor & front LED */
  35 #define NCT6779D_WDT1           0x0D /* Watchdog timer 1 */
  36 #define NCT6779D_CIRWKUP        0x0E /* CIR wakeup */
  37 #define NCT6779D_GPIO_PP_OD     0x0F /* GPIO Push-Pull/Open drain select */
  38 #define NCT6779D_PRT80          0x14 /* Port 80 UART */
  39 #define NCT6779D_DSLP           0x16 /* Deep sleep */
  40
  41
  42 /* virtual LDN for GPIO */
  43
  44 #define NCT6779D_GPIOBASE       ((0 << 8) | NCT6779D_WDT1_GPIO01_V)
  45
  46 #define NCT6779D_GPIO0          ((1 << 8) | NCT6779D_WDT1_GPIO01_V)
  47 #define NCT6779D_GPIO1          ((1 << 8) | NCT6779D_GPIO12345678_V)
  48 #define NCT6779D_GPIO2          ((2 << 8) | NCT6779D_GPIO12345678_V)
  49 #define NCT6779D_GPIO3          ((3 << 8) | NCT6779D_GPIO12345678_V)
  50 #define NCT6779D_GPIO4          ((4 << 8) | NCT6779D_GPIO12345678_V)
  51 #define NCT6779D_GPIO5          ((5 << 8) | NCT6779D_GPIO12345678_V)
  52 #define NCT6779D_GPIO6          ((6 << 8) | NCT6779D_GPIO12345678_V)
  53 #define NCT6779D_GPIO7          ((7 << 8) | NCT6779D_GPIO12345678_V)
  54 #define NCT6779D_GPIO8          ((0 << 8) | NCT6779D_GPIO12345678_V)
  55
  56 #endif /* SUPERIO_NUVOTON_NCT6779D_H */