arch/x86/smbios: Add Number Of Power Cords field to be overriden
[coreboot.git] / src / include / smbios.h
blob5cbd3c3e97c20296f7f9073cce4957916f3e365c
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef SMBIOS_H
4 #define SMBIOS_H
6 #include <types.h>
7 #include <memory_info.h>
9 unsigned long smbios_write_tables(unsigned long start);
10 int smbios_add_string(u8 *start, const char *str);
11 int smbios_string_table_len(u8 *start);
13 /* Used by mainboard to add an on-board device */
14 enum misc_slot_type;
15 enum misc_slot_length;
16 enum misc_slot_usage;
17 enum slot_data_bus_bandwidth;
18 int smbios_write_type9(unsigned long *current, int *handle,
19 const char *name, const enum misc_slot_type type,
20 const enum slot_data_bus_bandwidth bandwidth,
21 const enum misc_slot_usage usage,
22 const enum misc_slot_length length,
23 u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func);
24 enum smbios_bmc_interface_type;
25 int smbios_write_type38(unsigned long *current, int *handle,
26 const enum smbios_bmc_interface_type interface_type,
27 const u8 ipmi_rev, const u8 i2c_addr, const u8 nv_addr,
28 const u64 base_addr, const u8 base_modifier,
29 const u8 irq);
30 int smbios_write_type41(unsigned long *current, int *handle,
31 const char *name, u8 instance, u16 segment,
32 u8 bus, u8 device, u8 function, u8 device_type);
34 const char *smbios_system_manufacturer(void);
35 const char *smbios_system_product_name(void);
36 const char *smbios_system_serial_number(void);
37 const char *smbios_system_version(void);
38 void smbios_system_set_uuid(u8 *uuid);
39 const char *smbios_system_sku(void);
41 unsigned int smbios_cpu_get_max_speed_mhz(void);
42 unsigned int smbios_cpu_get_current_speed_mhz(void);
43 unsigned int smbios_cpu_get_voltage(void);
45 const char *smbios_mainboard_manufacturer(void);
46 const char *smbios_mainboard_product_name(void);
47 const char *smbios_mainboard_serial_number(void);
48 const char *smbios_mainboard_version(void);
50 const char *smbios_mainboard_bios_version(void);
51 const char *smbios_mainboard_asset_tag(void);
52 u8 smbios_mainboard_feature_flags(void);
53 const char *smbios_mainboard_location_in_chassis(void);
54 const char *smbios_chassis_version(void);
55 const char *smbios_chassis_serial_number(void);
56 const char *smbios_processor_serial_number(void);
57 u8 smbios_chassis_power_cords(void);
59 /* This string could be filled late in payload. */
60 void smbios_type0_bios_version(uintptr_t address);
62 void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision);
64 unsigned int smbios_memory_error_correction_type(struct memory_info *meminfo);
65 unsigned int smbios_processor_external_clock(void);
66 unsigned int smbios_processor_characteristics(void);
67 struct cpuid_result;
68 unsigned int smbios_processor_family(struct cpuid_result res);
70 unsigned int smbios_cache_error_correction_type(u8 level);
71 unsigned int smbios_cache_sram_type(void);
72 unsigned int smbios_cache_conf_operation_mode(u8 level);
74 /* Used by mainboard to add port information of type 8 */
75 struct port_information;
76 int smbios_write_type8(unsigned long *current, int *handle,
77 const struct port_information *port,
78 size_t num_ports);
80 #define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
81 #define BIOS_CHARACTERISTICS_PC_CARD (1 << 8)
82 #define BIOS_CHARACTERISTICS_PNP (1 << 9)
83 #define BIOS_CHARACTERISTICS_APM (1 << 10)
84 #define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11)
85 #define BIOS_CHARACTERISTICS_SHADOW (1 << 12)
86 #define BIOS_CHARACTERISTICS_BOOT_FROM_CD (1 << 15)
87 #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16)
88 #define BIOS_CHARACTERISTICS_BIOS_SOCKETED (1 << 17)
90 #define BIOS_EXT1_CHARACTERISTICS_ACPI (1 << 0)
91 #define BIOS_EXT2_CHARACTERISTICS_TARGET (1 << 2)
93 #define BIOS_MEMORY_ECC_SINGLE_BIT_CORRECTING (1 << 3)
94 #define BIOS_MEMORY_ECC_DOUBLE_BIT_CORRECTING (1 << 4)
95 #define BIOS_MEMORY_ECC_SCRUBBING (1 << 5)
97 #define MEMORY_TYPE_DETAIL_OTHER (1 << 1)
98 #define MEMORY_TYPE_DETAIL_UNKNOWN (1 << 2)
99 #define MEMORY_TYPE_DETAIL_FAST_PAGED (1 << 3)
100 #define MEMORY_TYPE_DETAIL_STATIC_COLUMN (1 << 4)
101 #define MEMORY_TYPE_DETAIL_PSEUDO_STATIC (1 << 5)
102 #define MEMORY_TYPE_DETAIL_RAMBUS (1 << 6)
103 #define MEMORY_TYPE_DETAIL_SYNCHRONOUS (1 << 7)
104 #define MEMORY_TYPE_DETAIL_CMOS (1 << 8)
105 #define MEMORY_TYPE_DETAIL_EDO (1 << 9)
106 #define MEMORY_TYPE_DETAIL_WINDOW_DRAM (1 << 10)
107 #define MEMORY_TYPE_DETAIL_CACHE_DRAM (1 << 11)
108 #define MEMORY_TYPE_DETAIL_NON_VOLATILE (1 << 12)
109 #define MEMORY_TYPE_DETAIL_REGISTERED (1 << 13)
110 #define MEMORY_TYPE_DETAIL_UNBUFFERED (1 << 14)
111 #define MEMORY_TYPE_DETAIL_LRDIMM (1 << 15)
113 #define MEMORY_TECHNOLOGY_OTHER 0x01
114 #define MEMORY_TECHNOLOGY_UNKNOWN 0x02
115 #define MEMORY_TECHNOLOGY_DRAM 0x03
116 #define MEMORY_TECHNOLOGY_NVDIMM_N 0x04
117 #define MEMORY_TECHNOLOGY_NVDIMM_F 0x05
118 #define MEMORY_TECHNOLOGY_NVDIMM_P 0x06
119 #define MEMORY_TECHNOLOGY_INTEL_PERSISTENT 0x07
121 #define MEMORY_OPERATING_MODE_CAP_OTHER (1 << 1)
122 #define MEMORY_OPERATING_MODE_CAP_UNKNOWN (1 << 2)
123 #define MEMORY_OPERATING_MODE_CAP_VOLATILE (1 << 3)
124 #define MEMORY_OPERATING_MODE_CAP_BYTE_ACCESS_PERSISTENT (1 << 4)
125 #define MEMORY_OPERATING_MODE_CAP_BLOCK_ACCESS_PERSISTENT (1 << 5)
127 typedef enum {
128 MEMORY_BUS_WIDTH_8 = 0,
129 MEMORY_BUS_WIDTH_16 = 1,
130 MEMORY_BUS_WIDTH_32 = 2,
131 MEMORY_BUS_WIDTH_64 = 3,
132 MEMORY_BUS_WIDTH_128 = 4,
133 MEMORY_BUS_WIDTH_256 = 5,
134 MEMORY_BUS_WIDTH_512 = 6,
135 MEMORY_BUS_WIDTH_1024 = 7,
136 MEMORY_BUS_WIDTH_MAX = 7,
137 } smbios_memory_bus_width;
139 typedef enum {
140 MEMORY_FORMFACTOR_OTHER = 0x01,
141 MEMORY_FORMFACTOR_UNKNOWN = 0x02,
142 MEMORY_FORMFACTOR_SIMM = 0x03,
143 MEMORY_FORMFACTOR_SIP = 0x04,
144 MEMORY_FORMFACTOR_CHIP = 0x05,
145 MEMORY_FORMFACTOR_DIP = 0x06,
146 MEMORY_FORMFACTOR_ZIP = 0x07,
147 MEMORY_FORMFACTOR_PROPRIETARY_CARD = 0x08,
148 MEMORY_FORMFACTOR_DIMM = 0x09,
149 MEMORY_FORMFACTOR_TSOP = 0x0a,
150 MEMORY_FORMFACTOR_ROC = 0x0b,
151 MEMORY_FORMFACTOR_RIMM = 0x0c,
152 MEMORY_FORMFACTOR_SODIMM = 0x0d,
153 MEMORY_FORMFACTOR_SRIMM = 0x0e,
154 MEMORY_FORMFACTOR_FBDIMM = 0x0f,
155 MEMORY_FORMFACTOR_DIE = 0x10,
156 } smbios_memory_form_factor;
158 typedef enum {
159 MEMORY_TYPE_OTHER = 0x01,
160 MEMORY_TYPE_UNKNOWN = 0x02,
161 MEMORY_TYPE_DRAM = 0x03,
162 MEMORY_TYPE_EDRAM = 0x04,
163 MEMORY_TYPE_VRAM = 0x05,
164 MEMORY_TYPE_SRAM = 0x06,
165 MEMORY_TYPE_RAM = 0x07,
166 MEMORY_TYPE_ROM = 0x08,
167 MEMORY_TYPE_FLASH = 0x09,
168 MEMORY_TYPE_EEPROM = 0x0a,
169 MEMORY_TYPE_FEPROM = 0x0b,
170 MEMORY_TYPE_EPROM = 0x0c,
171 MEMORY_TYPE_CDRAM = 0x0d,
172 MEMORY_TYPE_3DRAM = 0x0e,
173 MEMORY_TYPE_SDRAM = 0x0f,
174 MEMORY_TYPE_SGRAM = 0x10,
175 MEMORY_TYPE_RDRAM = 0x11,
176 MEMORY_TYPE_DDR = 0x12,
177 MEMORY_TYPE_DDR2 = 0x13,
178 MEMORY_TYPE_DDR2_FBDIMM = 0x14,
179 MEMORY_TYPE_DDR3 = 0x18,
180 MEMORY_TYPE_FBD2 = 0x19,
181 MEMORY_TYPE_DDR4 = 0x1a,
182 MEMORY_TYPE_LPDDR = 0x1b,
183 MEMORY_TYPE_LPDDR2 = 0x1c,
184 MEMORY_TYPE_LPDDR3 = 0x1d,
185 MEMORY_TYPE_LPDDR4 = 0x1e,
186 MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f,
187 MEMORY_TYPE_HBM = 0x20,
188 MEMORY_TYPE_HBM2 = 0x21,
189 } smbios_memory_type;
191 typedef enum {
192 MEMORY_ARRAY_LOCATION_OTHER = 0x01,
193 MEMORY_ARRAY_LOCATION_UNKNOWN = 0x02,
194 MEMORY_ARRAY_LOCATION_SYSTEM_BOARD = 0x03,
195 MEMORY_ARRAY_LOCATION_ISA_ADD_ON = 0x04,
196 MEMORY_ARRAY_LOCATION_EISA_ADD_ON = 0x05,
197 MEMORY_ARRAY_LOCATION_PCI_ADD_ON = 0x06,
198 MEMORY_ARRAY_LOCATION_MCA_ADD_ON = 0x07,
199 MEMORY_ARRAY_LOCATION_PCMCIA_ADD_ON = 0x08,
200 MEMORY_ARRAY_LOCATION_PROPRIETARY_ADD_ON = 0x09,
201 MEMORY_ARRAY_LOCATION_NUBUS = 0x0a,
202 MEMORY_ARRAY_LOCATION_PC_98_C20_ADD_ON = 0xa0,
203 MEMORY_ARRAY_LOCATION_PC_98_C24_ADD_ON = 0xa1,
204 MEMORY_ARRAY_LOCATION_PC_98_E_ADD_ON = 0xa2,
205 MEMORY_ARRAY_LOCATION_PC_98_LOCAL_BUS_ADD_ON = 0xa3,
206 MEMORY_ARRAY_LOCATION_CXL_FLEXBUS_1_0_ADD_ON = 0xa4,
207 } smbios_memory_array_location;
209 typedef enum {
210 MEMORY_ARRAY_USE_OTHER = 0x01,
211 MEMORY_ARRAY_USE_UNKNOWN = 0x02,
212 MEMORY_ARRAY_USE_SYSTEM = 0x03,
213 MEMORY_ARRAY_USE_VIDEO = 0x04,
214 MEMORY_ARRAY_USE_FLASH = 0x05,
215 MEMORY_ARRAY_USE_NVRAM = 0x06,
216 MEMORY_ARRAY_USE_CACHE = 0x07,
217 } smbios_memory_array_use;
219 typedef enum {
220 MEMORY_ARRAY_ECC_OTHER = 0x01,
221 MEMORY_ARRAY_ECC_UNKNOWN = 0x02,
222 MEMORY_ARRAY_ECC_NONE = 0x03,
223 MEMORY_ARRAY_ECC_PARITY = 0x04,
224 MEMORY_ARRAY_ECC_SINGLE_BIT = 0x05,
225 MEMORY_ARRAY_ECC_MULTI_BIT = 0x06,
226 MEMORY_ARRAY_ECC_CRC = 0x07,
227 } smbios_memory_array_ecc;
229 #define SMBIOS_STATE_SAFE 3
230 typedef enum {
231 SMBIOS_BIOS_INFORMATION = 0,
232 SMBIOS_SYSTEM_INFORMATION = 1,
233 SMBIOS_BOARD_INFORMATION = 2,
234 SMBIOS_SYSTEM_ENCLOSURE = 3,
235 SMBIOS_PROCESSOR_INFORMATION = 4,
236 SMBIOS_CACHE_INFORMATION = 7,
237 SMBIOS_PORT_CONNECTOR_INFORMATION = 8,
238 SMBIOS_SYSTEM_SLOTS = 9,
239 SMBIOS_OEM_STRINGS = 11,
240 SMBIOS_EVENT_LOG = 15,
241 SMBIOS_PHYS_MEMORY_ARRAY = 16,
242 SMBIOS_MEMORY_DEVICE = 17,
243 SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,
244 SMBIOS_SYSTEM_BOOT_INFORMATION = 32,
245 SMBIOS_IPMI_DEVICE_INFORMATION = 38,
246 SMBIOS_ONBOARD_DEVICES_EXTENDED_INFORMATION = 41,
247 SMBIOS_END_OF_TABLE = 127,
248 } smbios_struct_type_t;
250 struct smbios_entry {
251 u8 anchor[4];
252 u8 checksum;
253 u8 length;
254 u8 major_version;
255 u8 minor_version;
256 u16 max_struct_size;
257 u8 entry_point_rev;
258 u8 formwatted_area[5];
259 u8 intermediate_anchor_string[5];
260 u8 intermediate_checksum;
261 u16 struct_table_length;
262 u32 struct_table_address;
263 u16 struct_count;
264 u8 smbios_bcd_revision;
265 } __packed;
267 struct smbios_entry30 {
268 u8 anchor[5];
269 u8 checksum;
270 u8 length;
271 u8 major_version;
272 u8 minor_version;
273 u8 smbios_doc_rev;
274 u8 entry_point_rev;
275 u8 reserved;
276 u32 struct_table_length;
277 u64 struct_table_address;
278 } __packed;
280 struct smbios_type0 {
281 u8 type;
282 u8 length;
283 u16 handle;
284 u8 vendor;
285 u8 bios_version;
286 u16 bios_start_segment;
287 u8 bios_release_date;
288 u8 bios_rom_size;
289 u64 bios_characteristics;
290 u8 bios_characteristics_ext1;
291 u8 bios_characteristics_ext2;
292 u8 system_bios_major_release;
293 u8 system_bios_minor_release;
294 u8 ec_major_release;
295 u8 ec_minor_release;
296 u16 extended_bios_rom_size;
297 u8 eos[2];
298 } __packed;
300 struct smbios_type1 {
301 u8 type;
302 u8 length;
303 u16 handle;
304 u8 manufacturer;
305 u8 product_name;
306 u8 version;
307 u8 serial_number;
308 u8 uuid[16];
309 u8 wakeup_type;
310 u8 sku;
311 u8 family;
312 u8 eos[2];
313 } __packed;
315 typedef enum {
316 SMBIOS_BOARD_TYPE_UNKNOWN = 0x01,
317 SMBIOS_BOARD_TYPE_OTHER = 0x02,
318 SMBIOS_BOARD_TYPE_SERVER_BLADE = 0x03,
319 SMBIOS_BOARD_TYPE_CONNECTIVITY_SWITCH = 0x04,
320 SMBIOS_BOARD_TYPE_SYSTEM_MANAGEMENT_MODULE = 0x05,
321 SMBIOS_BOARD_TYPE_PROCESSOR_MODULE = 0x06,
322 SMBIOS_BOARD_TYPE_IO_MODULE = 0x07,
323 SMBIOS_BOARD_TYPE_MEMORY_MODULE = 0x08,
324 SMBIOS_BOARD_TYPE_DAUGHTER_BOARD = 0x09,
325 SMBIOS_BOARD_TYPE_MOTHERBOARD = 0x0a,
326 SMBIOS_BOARD_TYPE_PROCESSOR_MEMORY_MODULE = 0x0b,
327 SMBIOS_BOARD_TYPE_PROCESSOR_IO_MODULE = 0x0c,
328 SMBIOS_BOARD_TYPE_INTERCONNECT_BOARD = 0x0d,
329 } smbios_board_type;
331 struct smbios_type2 {
332 u8 type;
333 u8 length;
334 u16 handle;
335 u8 manufacturer;
336 u8 product_name;
337 u8 version;
338 u8 serial_number;
339 u8 asset_tag;
340 u8 feature_flags;
341 u8 location_in_chassis;
342 u16 chassis_handle;
343 u8 board_type;
344 u8 eos[2];
345 } __packed;
347 typedef enum {
348 SMBIOS_ENCLOSURE_OTHER = 0x01,
349 SMBIOS_ENCLOSURE_UNKNOWN = 0x02,
350 SMBIOS_ENCLOSURE_DESKTOP = 0x03,
351 SMBIOS_ENCLOSURE_LOW_PROFILE_DESKTOP = 0x04,
352 SMBIOS_ENCLOSURE_PIZZA_BOX = 0x05,
353 SMBIOS_ENCLOSURE_MINI_TOWER = 0x06,
354 SMBIOS_ENCLOSURE_TOWER = 0x07,
355 SMBIOS_ENCLOSURE_PORTABLE = 0x08,
356 SMBIOS_ENCLOSURE_LAPTOP = 0x09,
357 SMBIOS_ENCLOSURE_NOTEBOOK = 0x0a,
358 SMBIOS_ENCLOSURE_HAND_HELD = 0x0b,
359 SMBIOS_ENCLOSURE_DOCKING_STATION = 0x0c,
360 SMBIOS_ENCLOSURE_ALL_IN_ONE = 0x0d,
361 SMBIOS_ENCLOSURE_SUB_NOTEBOOK = 0x0e,
362 SMBIOS_ENCLOSURE_SPACE_SAVING = 0x0f,
363 SMBIOS_ENCLOSURE_LUNCH_BOX = 0x10,
364 SMBIOS_ENCLOSURE_MAIN_SERVER_CHASSIS = 0x11,
365 SMBIOS_ENCLOSURE_EXPANSION_CHASSIS = 0x12,
366 SMBIOS_ENCLOSURE_SUBCHASSIS = 0x13,
367 SMBIOS_ENCLOSURE_BUS_EXPANSION_CHASSIS = 0x14,
368 SMBIOS_ENCLOSURE_PERIPHERAL_CHASSIS = 0x15,
369 SMBIOS_ENCLOSURE_RAID_CHASSIS = 0x16,
370 SMBIOS_ENCLOSURE_RACK_MOUNT_CHASSIS = 0x17,
371 SMBIOS_ENCLOSURE_SEALED_CASE_PC = 0x18,
372 SMBIOS_ENCLOSURE_MULTI_SYSTEM_CHASSIS = 0x19,
373 SMBIOS_ENCLOSURE_COMPACT_PCI = 0x1a,
374 SMBIOS_ENCLOSURE_ADVANCED_TCA = 0x1b,
375 SMBIOS_ENCLOSURE_BLADE = 0x1c,
376 SMBIOS_ENCLOSURE_BLADE_ENCLOSURE = 0x1d,
377 SMBIOS_ENCLOSURE_TABLET = 0x1e,
378 SMBIOS_ENCLOSURE_CONVERTIBLE = 0x1f,
379 SMBIOS_ENCLOSURE_DETACHABLE = 0x20,
380 SMBIOS_ENCLOSURE_IOT_GATEWAY = 0x21,
381 SMBIOS_ENCLOSURE_EMBEDDED_PC = 0x22,
382 SMBIOS_ENCLOSURE_MINI_PC = 0x23,
383 SMBIOS_ENCLOSURE_STICK_PC = 0x24,
384 } smbios_enclosure_type;
386 struct smbios_type3 {
387 u8 type;
388 u8 length;
389 u16 handle;
390 u8 manufacturer;
391 u8 _type;
392 u8 version;
393 u8 serial_number;
394 u8 asset_tag_number;
395 u8 bootup_state;
396 u8 power_supply_state;
397 u8 thermal_state;
398 u8 security_status;
399 u32 oem_defined;
400 u8 height;
401 u8 number_of_power_cords;
402 u8 element_count;
403 u8 element_record_length;
404 u8 sku_number;
405 u8 eos[2];
406 } __packed;
408 struct smbios_type4 {
409 u8 type;
410 u8 length;
411 u16 handle;
412 u8 socket_designation;
413 u8 processor_type;
414 u8 processor_family;
415 u8 processor_manufacturer;
416 u32 processor_id[2];
417 u8 processor_version;
418 u8 voltage;
419 u16 external_clock;
420 u16 max_speed;
421 u16 current_speed;
422 u8 status;
423 u8 processor_upgrade;
424 u16 l1_cache_handle;
425 u16 l2_cache_handle;
426 u16 l3_cache_handle;
427 u8 serial_number;
428 u8 asset_tag;
429 u8 part_number;
430 u8 core_count;
431 u8 core_enabled;
432 u8 thread_count;
433 u16 processor_characteristics;
434 u16 processor_family2;
435 u16 core_count2;
436 u16 core_enabled2;
437 u16 thread_count2;
438 u8 eos[2];
439 } __packed;
441 /* defines for smbios_type4 */
443 #define SMBIOS_PROCESSOR_STATUS_POPULATED (1 << 6)
444 #define SMBIOS_PROCESSOR_STATUS_CPU_ENABLED (1 << 0)
446 /* defines for supported_sram_type/current_sram_type */
448 #define SMBIOS_CACHE_SRAM_TYPE_OTHER (1 << 0)
449 #define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN (1 << 1)
450 #define SMBIOS_CACHE_SRAM_TYPE_NON_BURST (1 << 2)
451 #define SMBIOS_CACHE_SRAM_TYPE_BURST (1 << 3)
452 #define SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST (1 << 4)
453 #define SMBIOS_CACHE_SRAM_TYPE_SYNCHRONOUS (1 << 5)
454 #define SMBIOS_CACHE_SRAM_TYPE_ASYNCHRONOUS (1 << 6)
456 /* enum for error_correction_type */
458 enum smbios_cache_error_corr {
459 SMBIOS_CACHE_ERROR_CORRECTION_OTHER = 1,
460 SMBIOS_CACHE_ERROR_CORRECTION_UNKNOWN,
461 SMBIOS_CACHE_ERROR_CORRECTION_NONE,
462 SMBIOS_CACHE_ERROR_CORRECTION_PARITY,
463 SMBIOS_CACHE_ERROR_CORRECTION_SINGLE_BIT,
464 SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT,
467 /* enum for system_cache_type */
469 enum smbios_cache_type {
470 SMBIOS_CACHE_TYPE_OTHER = 1,
471 SMBIOS_CACHE_TYPE_UNKNOWN,
472 SMBIOS_CACHE_TYPE_INSTRUCTION,
473 SMBIOS_CACHE_TYPE_DATA,
474 SMBIOS_CACHE_TYPE_UNIFIED,
477 /* enum for associativity */
479 enum smbios_cache_associativity {
480 SMBIOS_CACHE_ASSOCIATIVITY_OTHER = 1,
481 SMBIOS_CACHE_ASSOCIATIVITY_UNKNOWN,
482 SMBIOS_CACHE_ASSOCIATIVITY_DIRECT,
483 SMBIOS_CACHE_ASSOCIATIVITY_2WAY,
484 SMBIOS_CACHE_ASSOCIATIVITY_4WAY,
485 SMBIOS_CACHE_ASSOCIATIVITY_FULL,
486 SMBIOS_CACHE_ASSOCIATIVITY_8WAY,
487 SMBIOS_CACHE_ASSOCIATIVITY_16WAY,
488 SMBIOS_CACHE_ASSOCIATIVITY_12WAY,
489 SMBIOS_CACHE_ASSOCIATIVITY_24WAY,
490 SMBIOS_CACHE_ASSOCIATIVITY_32WAY,
491 SMBIOS_CACHE_ASSOCIATIVITY_48WAY,
492 SMBIOS_CACHE_ASSOCIATIVITY_64WAY,
493 SMBIOS_CACHE_ASSOCIATIVITY_20WAY,
496 /* defines for cache_configuration */
498 #define SMBIOS_CACHE_CONF_LEVEL(x) ((((x) - 1) & 0x7) << 0)
499 #define SMBIOS_CACHE_CONF_LOCATION(x) (((x) & 0x3) << 5)
500 #define SMBIOS_CACHE_CONF_ENABLED(x) (((x) & 0x1) << 7)
501 #define SMBIOS_CACHE_CONF_OPERATION_MODE(x) (((x) & 0x3) << 8)
503 /* defines for max_cache_size and installed_size */
505 #define SMBIOS_CACHE_SIZE_UNIT_1KB (0 << 15)
506 #define SMBIOS_CACHE_SIZE_UNIT_64KB (1 << 15)
507 #define SMBIOS_CACHE_SIZE_MASK 0x7fff
508 #define SMBIOS_CACHE_SIZE_OVERFLOW 0xffff
510 #define SMBIOS_CACHE_SIZE2_UNIT_1KB (0 << 31)
511 #define SMBIOS_CACHE_SIZE2_UNIT_64KB (1UL << 31)
512 #define SMBIOS_CACHE_SIZE2_MASK 0x7fffffff
514 /* define for cache operation mode */
516 #define SMBIOS_CACHE_OP_MODE_WRITE_THROUGH 0
517 #define SMBIOS_CACHE_OP_MODE_WRITE_BACK 1
518 #define SMBIOS_CACHE_OP_MODE_VARIES_WITH_MEMORY_ADDRESS 2
519 #define SMBIOS_CACHE_OP_MODE_UNKNOWN 3
521 struct smbios_type7 {
522 u8 type;
523 u8 length;
524 u16 handle;
525 u8 socket_designation;
526 u16 cache_configuration;
527 u16 max_cache_size;
528 u16 installed_size;
529 u16 supported_sram_type;
530 u16 current_sram_type;
531 u8 cache_speed;
532 u8 error_correction_type;
533 u8 system_cache_type;
534 u8 associativity;
535 u32 max_cache_size2;
536 u32 installed_size2;
537 u8 eos[2];
538 } __packed;
540 /* enum for connector types */
541 typedef enum {
542 CONN_NONE = 0x00,
543 CONN_CENTRONICS = 0x01,
544 CONN_MINI_CENTRONICS = 0x02,
545 CONN_PROPRIETARY = 0x03,
546 CONN_DB_25_PIN_MALE = 0x04,
547 CONN_DB_25_PIN_FEMALE = 0x05,
548 CONN_DB_15_PIN_MALE = 0x06,
549 CONN_DB_15_PIN_FEMALE = 0x07,
550 CONN_DB_9_PIN_MALE = 0x08,
551 CONN_DB_9_PIN_FEMALE = 0x09,
552 CONN_RJ_11 = 0x0A,
553 CONN_RJ_45 = 0x0B,
554 CONN_50_PIN_MINI_SCSI = 0x0C,
555 CONN_MINI_DIN = 0x0D,
556 CONN_MICRO_DIN = 0x0E,
557 CONN_PS_2 = 0x0F,
558 CONN_INFRARED = 0x10,
559 CONN_HP_HIL = 0x11,
560 CONN_ACCESS_BUS_USB = 0x12,
561 CONN_SSA_SCSI = 0x13,
562 CONN_CIRCULAR_DIN_8_MALE = 0x14,
563 CONN_CIRCULAR_DIN_8_FEMALE = 0x15,
564 CONN_ON_BOARD_IDE = 0x16,
565 CONN_ON_BOARD_FLOPPY = 0x17,
566 CONN_9_PIN_DUAL_INLINE = 0x18,
567 CONN_25_PIN_DUAL_INLINE = 0x19,
568 CONN_50_PIN_DUAL_INLINE = 0x1A,
569 CONN_68_PIN_DUAL_INLINE = 0x1B,
570 CONN_ON_BOARD_SOUND_INPUT_FROM_CD_ROM = 0x1C,
571 CONN_MINI_CENTRONICS_TYPE14 = 0x1D,
572 CONN_MINI_CENTRONICS_TYPE26 = 0x1E,
573 CONN_MINI_JACK_HEADPHONES = 0x1F,
574 CONN_BNC = 0x20,
575 CONN_1394 = 0x21,
576 CONN_SAS_SATA = 0x22,
577 CONN_USB_TYPE_C = 0x23,
578 CONN_PC_98 = 0xA0,
579 CONN_PC_98_HIRESO = 0xA1,
580 CONN_PC_H98 = 0xA2,
581 CONN_PC98_NOTE = 0xA3,
582 CONN_PC_98_FULL = 0xA4,
583 CONN_OTHER = 0xFF,
584 } type8_connector_types;
586 /* enum for port types */
587 typedef enum {
588 TYPE_NONE_PORT = 0x00,
589 TYPE_PARALLEL_PORT_XT_AT_COMPATIBLE = 0x01,
590 TYPE_PARALLEL_PORT_PS_2 = 0x02,
591 TYPE_PARALLEL_PORT_ECP = 0x03,
592 TYPE_PARALLEL_PORT_EPP = 0x04,
593 TYPE_PARALLEL_PORT_ECP_EPP = 0x05,
594 TYPE_SERIAL_PORT_XT_AT_COMPATIBLE = 0x06,
595 TYPE_SERIAL_PORT_16450_COMPATIBLE = 0x07,
596 TYPE_SERIAL_PORT_16550_COMPATIBLE = 0x08,
597 TYPE_SERIAL_PORT_16550A_COMPATIBLE = 0x09,
598 TYPE_SCSI_PORT = 0x0A,
599 TYPE_MIDI_PORT = 0x0B,
600 TYPE_JOY_STICK_PORT = 0x0C,
601 TYPE_KEYBOARD_PORT = 0x0D,
602 TYPE_MOUSE_PORT = 0x0E,
603 TYPE_SSA_SCSI = 0x0F,
604 TYPE_USB = 0x10,
605 TYPE_FIREWIRE_IEEE_P1394 = 0x11,
606 TYPE_PCMCIA_TYPE_I = 0x12,
607 TYPE_PCMCIA_TYPE_II = 0x13,
608 TYPE_PCMCIA_TYPE_III = 0x14,
609 TYPE_CARDBUS = 0x15,
610 TYPE_ACCESS_BUS_PORT = 0x16,
611 TYPE_SCSI_II = 0x17,
612 TYPE_SCSI_WIDE = 0x18,
613 TYPE_PC_98 = 0x19,
614 TYPE_PC_98_HIRESO = 0x1A,
615 TYPE_PC_H98 = 0x1B,
616 TYPE_VIDEO_PORT = 0x1C,
617 TYPE_AUDIO_PORT = 0x1D,
618 TYPE_MODEM_PORT = 0x1E,
619 TYPE_NETWORK_PORT = 0x1F,
620 TYPE_SATA = 0x20,
621 TYPE_SAS = 0x21,
622 TYPE_MFDP = 0x22,
623 TYPE_THUNDERBOLT = 0x23,
624 TYPE_8251_COMPATIBLE = 0xA0,
625 TYPE_8251_FIFO_COMPATIBLE = 0xA1,
626 TYPE_OTHER_PORT = 0xFF,
627 } type8_port_types;
629 struct port_information {
630 const char *internal_reference_designator;
631 type8_connector_types internal_connector_type;
632 const char *external_reference_designator;
633 type8_connector_types external_connector_type;
634 type8_port_types port_type;
637 struct smbios_type8 {
638 u8 type;
639 u8 length;
640 u16 handle;
641 u8 internal_reference_designator;
642 u8 internal_connector_type;
643 u8 external_reference_designator;
644 u8 external_connector_type;
645 u8 port_type;
646 u8 eos[2];
647 } __packed;
649 /* System Slots - Slot Type */
650 enum misc_slot_type {
651 SlotTypeOther = 0x01,
652 SlotTypeUnknown = 0x02,
653 SlotTypeIsa = 0x03,
654 SlotTypeMca = 0x04,
655 SlotTypeEisa = 0x05,
656 SlotTypePci = 0x06,
657 SlotTypePcmcia = 0x07,
658 SlotTypeVlVesa = 0x08,
659 SlotTypeProprietary = 0x09,
660 SlotTypeProcessorCardSlot = 0x0A,
661 SlotTypeProprietaryMemoryCardSlot = 0x0B,
662 SlotTypeIORiserCardSlot = 0x0C,
663 SlotTypeNuBus = 0x0D,
664 SlotTypePci66MhzCapable = 0x0E,
665 SlotTypeAgp = 0x0F,
666 SlotTypeApg2X = 0x10,
667 SlotTypeAgp4X = 0x11,
668 SlotTypePciX = 0x12,
669 SlotTypeAgp8X = 0x13,
670 SlotTypeM2Socket1_DP = 0x14,
671 SlotTypeM2Socket1_SD = 0x15,
672 SlotTypeM2Socket2 = 0x16,
673 SlotTypeM2Socket3 = 0x17,
674 SlotTypeMxmTypeI = 0x18,
675 SlotTypeMxmTypeII = 0x19,
676 SlotTypeMxmTypeIIIStandard = 0x1A,
677 SlotTypeMxmTypeIIIHe = 0x1B,
678 SlotTypeMxmTypeIV = 0x1C,
679 SlotTypeMxm30TypeA = 0x1D,
680 SlotTypeMxm30TypeB = 0x1E,
681 SlotTypePciExpressGen2Sff_8639 = 0x1F,
682 SlotTypePciExpressGen3Sff_8639 = 0x20,
683 SlotTypePciExpressMini52pinWithBSKO = 0x21,
684 SlotTypePciExpressMini52pinWithoutBSKO = 0x22,
685 SlotTypePciExpressMini76pin = 0x23,
686 SlotTypePC98C20 = 0xA0,
687 SlotTypePC98C24 = 0xA1,
688 SlotTypePC98E = 0xA2,
689 SlotTypePC98LocalBus = 0xA3,
690 SlotTypePC98Card = 0xA4,
691 SlotTypePciExpress = 0xA5,
692 SlotTypePciExpressX1 = 0xA6,
693 SlotTypePciExpressX2 = 0xA7,
694 SlotTypePciExpressX4 = 0xA8,
695 SlotTypePciExpressX8 = 0xA9,
696 SlotTypePciExpressX16 = 0xAA,
697 SlotTypePciExpressGen2 = 0xAB,
698 SlotTypePciExpressGen2X1 = 0xAC,
699 SlotTypePciExpressGen2X2 = 0xAD,
700 SlotTypePciExpressGen2X4 = 0xAE,
701 SlotTypePciExpressGen2X8 = 0xAF,
702 SlotTypePciExpressGen2X16 = 0xB0,
703 SlotTypePciExpressGen3 = 0xB1,
704 SlotTypePciExpressGen3X1 = 0xB2,
705 SlotTypePciExpressGen3X2 = 0xB3,
706 SlotTypePciExpressGen3X4 = 0xB4,
707 SlotTypePciExpressGen3X8 = 0xB5,
708 SlotTypePciExpressGen3X16 = 0xB6,
709 SlotTypePciExpressGen4 = 0xB8,
710 SlotTypePciExpressGen4x1 = 0xB9,
711 SlotTypePciExpressGen4x2 = 0xBA,
712 SlotTypePciExpressGen4x4 = 0xBB,
713 SlotTypePciExpressGen4x8 = 0xBC,
714 SlotTypePciExpressGen4x16 = 0xBD
717 /* System Slots - Slot Data Bus Width. */
718 enum slot_data_bus_bandwidth {
719 SlotDataBusWidthOther = 0x01,
720 SlotDataBusWidthUnknown = 0x02,
721 SlotDataBusWidth8Bit = 0x03,
722 SlotDataBusWidth16Bit = 0x04,
723 SlotDataBusWidth32Bit = 0x05,
724 SlotDataBusWidth64Bit = 0x06,
725 SlotDataBusWidth128Bit = 0x07,
726 SlotDataBusWidth1X = 0x08,
727 SlotDataBusWidth2X = 0x09,
728 SlotDataBusWidth4X = 0x0A,
729 SlotDataBusWidth8X = 0x0B,
730 SlotDataBusWidth12X = 0x0C,
731 SlotDataBusWidth16X = 0x0D,
732 SlotDataBusWidth32X = 0x0E
735 /* System Slots - Current Usage. */
736 enum misc_slot_usage {
737 SlotUsageOther = 0x01,
738 SlotUsageUnknown = 0x02,
739 SlotUsageAvailable = 0x03,
740 SlotUsageInUse = 0x04,
741 SlotUsageUnavailable = 0x05
744 /* System Slots - Slot Length.*/
745 enum misc_slot_length {
746 SlotLengthOther = 0x01,
747 SlotLengthUnknown = 0x02,
748 SlotLengthShort = 0x03,
749 SlotLengthLong = 0x04
752 /* System Slots - Slot Characteristics 1. */
753 #define SMBIOS_SLOT_UNKNOWN (1 << 0)
754 #define SMBIOS_SLOT_5V (1 << 1)
755 #define SMBIOS_SLOT_3P3V (1 << 2)
756 #define SMBIOS_SLOT_SHARED (1 << 3)
757 #define SMBIOS_SLOT_PCCARD_16 (1 << 4)
758 #define SMBIOS_SLOT_PCCARD_CARDBUS (1 << 5)
759 #define SMBIOS_SLOT_PCCARD_ZOOM (1 << 6)
760 #define SMBIOS_SLOT_PCCARD_MODEM_RING (1 << 7)
761 /* System Slots - Slot Characteristics 2. */
762 #define SMBIOS_SLOT_PME (1 << 0)
763 #define SMBIOS_SLOT_HOTPLUG (1 << 1)
764 #define SMBIOS_SLOT_SMBUS (1 << 2)
765 #define SMBIOS_SLOT_BIFURCATION (1 << 3)
767 struct slot_peer_groups {
768 u16 peer_seg_num;
769 u8 peer_bus_num;
770 u8 peer_dev_fn_num;
771 u8 peer_data_bus_width;
772 } __packed;
774 struct smbios_type9 {
775 u8 type;
776 u8 length;
777 u16 handle;
778 u8 slot_designation;
779 u8 slot_type;
780 u8 slot_data_bus_width;
781 u8 current_usage;
782 u8 slot_length;
783 u16 slot_id;
784 u8 slot_characteristics_1;
785 u8 slot_characteristics_2;
786 u16 segment_group_number;
787 u8 bus_number;
788 u8 device_function_number;
789 u8 data_bus_width;
790 u8 peer_group_count;
791 struct slot_peer_groups peer[0];
792 u8 eos[2];
793 } __packed;
795 struct smbios_type11 {
796 u8 type;
797 u8 length;
798 u16 handle;
799 u8 count;
800 u8 eos[2];
801 } __packed;
803 struct smbios_type15 {
804 u8 type;
805 u8 length;
806 u16 handle;
807 u16 area_length;
808 u16 header_offset;
809 u16 data_offset;
810 u8 access_method;
811 u8 log_status;
812 u32 change_token;
813 u32 address;
814 u8 header_format;
815 u8 log_type_descriptors;
816 u8 log_type_descriptor_length;
817 u8 eos[2];
818 } __packed;
820 enum {
821 SMBIOS_EVENTLOG_ACCESS_METHOD_IO8 = 0,
822 SMBIOS_EVENTLOG_ACCESS_METHOD_IO8X2,
823 SMBIOS_EVENTLOG_ACCESS_METHOD_IO16,
824 SMBIOS_EVENTLOG_ACCESS_METHOD_MMIO32,
825 SMBIOS_EVENTLOG_ACCESS_METHOD_GPNV,
828 enum {
829 SMBIOS_EVENTLOG_STATUS_VALID = 1, /* Bit 0 */
830 SMBIOS_EVENTLOG_STATUS_FULL = 2, /* Bit 1 */
833 #define SMBIOS_USE_EXTENDED_MAX_CAPACITY (1 << 31)
835 struct smbios_type16 {
836 u8 type;
837 u8 length;
838 u16 handle;
839 u8 location;
840 u8 use;
841 u8 memory_error_correction;
842 u32 maximum_capacity;
843 u16 memory_error_information_handle;
844 u16 number_of_memory_devices;
845 u64 extended_maximum_capacity;
846 u8 eos[2];
847 } __packed;
849 struct smbios_type17 {
850 u8 type;
851 u8 length;
852 u16 handle;
853 u16 phys_memory_array_handle;
854 u16 memory_error_information_handle;
855 u16 total_width;
856 u16 data_width;
857 u16 size;
858 u8 form_factor;
859 u8 device_set;
860 u8 device_locator;
861 u8 bank_locator;
862 u8 memory_type;
863 u16 type_detail;
864 u16 speed;
865 u8 manufacturer;
866 u8 serial_number;
867 u8 asset_tag;
868 u8 part_number;
869 u8 attributes;
870 u32 extended_size;
871 u16 clock_speed;
872 u16 minimum_voltage;
873 u16 maximum_voltage;
874 u16 configured_voltage;
875 u8 eos[2];
876 } __packed;
878 struct smbios_type19 {
879 u8 type;
880 u8 length;
881 u16 handle;
882 u32 starting_address;
883 u32 ending_address;
884 u16 memory_array_handle;
885 u8 partition_width;
886 u64 extended_starting_address;
887 u64 extended_ending_address;
888 u8 eos[2];
889 } __packed;
891 struct smbios_type32 {
892 u8 type;
893 u8 length;
894 u16 handle;
895 u8 reserved[6];
896 u8 boot_status;
897 u8 eos[2];
898 } __packed;
900 struct smbios_type38 {
901 u8 type;
902 u8 length;
903 u16 handle;
904 u8 interface_type;
905 u8 ipmi_rev;
906 u8 i2c_slave_addr;
907 u8 nv_storage_addr;
908 u64 base_address;
909 u8 base_address_modifier;
910 u8 irq;
911 u8 eos[2];
912 } __packed;
914 enum smbios_bmc_interface_type {
915 SMBIOS_BMC_INTERFACE_UNKNOWN = 0,
916 SMBIOS_BMC_INTERFACE_KCS,
917 SMBIOS_BMC_INTERFACE_SMIC,
918 SMBIOS_BMC_INTERFACE_BLOCK,
919 SMBIOS_BMC_INTERFACE_SMBUS,
922 typedef enum {
923 SMBIOS_DEVICE_TYPE_OTHER = 0x01,
924 SMBIOS_DEVICE_TYPE_UNKNOWN,
925 SMBIOS_DEVICE_TYPE_VIDEO,
926 SMBIOS_DEVICE_TYPE_SCSI,
927 SMBIOS_DEVICE_TYPE_ETHERNET,
928 SMBIOS_DEVICE_TYPE_TOKEN_RING,
929 SMBIOS_DEVICE_TYPE_SOUND,
930 SMBIOS_DEVICE_TYPE_PATA,
931 SMBIOS_DEVICE_TYPE_SATA,
932 SMBIOS_DEVICE_TYPE_SAS,
933 } smbios_onboard_device_type;
935 #define SMBIOS_DEVICE_TYPE_COUNT 10
937 struct smbios_type41 {
938 u8 type;
939 u8 length;
940 u16 handle;
941 u8 reference_designation;
942 u8 device_type: 7;
943 u8 device_status: 1;
944 u8 device_type_instance;
945 u16 segment_group_number;
946 u8 bus_number;
947 u8 function_number: 3;
948 u8 device_number: 5;
949 u8 eos[2];
950 } __packed;
952 struct smbios_type127 {
953 u8 type;
954 u8 length;
955 u16 handle;
956 u8 eos[2];
957 } __packed;
959 void smbios_fill_dimm_manufacturer_from_id(uint16_t mod_id,
960 struct smbios_type17 *t);
961 void smbios_fill_dimm_locator(const struct dimm_info *dimm,
962 struct smbios_type17 *t);
964 smbios_board_type smbios_mainboard_board_type(void);
965 smbios_enclosure_type smbios_mainboard_enclosure_type(void);
967 #endif