src/mainboard/abit/be6-ii_v2_0/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <stdint.h>
  18 #include <stdlib.h>
  19 #include <device/pci_def.h>
  20 #include <arch/io.h>
  21 #include <device/pnp_def.h>
  22 #include <console/console.h>
  23 #include <southbridge/intel/i82371eb/i82371eb.h>
  24 #include <northbridge/intel/i440bx/raminit.h>
  25 #include <delay.h>
  26 #include <cpu/x86/bist.h>
  27 #include <superio/winbond/common/winbond.h>
  28 /* FIXME: It's a Winbond W83977EF, actually. */
  29 #include <superio/winbond/w83977tf/w83977tf.h>
  30 #include <lib.h>
  31
  32 /* FIXME: It's a Winbond W83977EF, actually. */
  33 #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
  34
  35 int spd_read_byte(unsigned int device, unsigned int address)
  36 {
  37         return smbus_read_byte(device, address);
  38 }
  39
  40 #include <cpu/intel/romstage.h>
  41 void main(unsigned long bist)
  42 {
  43         winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
  44         console_init();
  45         report_bist_failure(bist);
  46
  47         enable_smbus();
  48         dump_spd_registers();
  49         sdram_set_registers();
  50         sdram_set_spd_registers();
  51         sdram_enable();
  52 }