soc/intel/denverton_ns: Remove variable set but not used
[coreboot.git] / util / superiotool / fintek.c
blob347462ec7a715829de56a072f2e829e899f86e93
1 /*
2 * This file is part of the superiotool project.
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5 * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
6 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
7 * Copyright (C) 2014 Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
8 * Copyright (C) 2017 Nicola Corna <nicola@corna.info>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
21 #include "superiotool.h"
23 #define DEVICE_ID_BYTE1_REG 0x20
24 #define DEVICE_ID_BYTE2_REG 0x21
26 #define VENDOR_ID_BYTE1_REG 0x23
27 #define VENDOR_ID_BYTE2_REG 0x24
29 #define FINTEK_VENDOR_ID 0x3419
31 static const struct superio_registers reg_table[] = {
32 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
33 /* We assume reserved bits are read as 0. */
34 {NOLDN, NULL,
35 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
36 0x2b,0x2c,0x2d,EOT},
37 {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
38 0x00,0x00,0x08,EOT}},
39 {0x0, "Floppy",
40 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
41 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
42 {0x1, "COM1",
43 {0x30,0x60,0x61,0x70,0xf0,EOT},
44 {0x01,0x03,0xf8,0x04,0x00,EOT}},
45 {0x2, "COM2",
46 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
47 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
48 {0x3, "Parallel port",
49 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
50 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
51 {0x4, "Hardware monitor",
52 {0x30,0x60,0x61,0x70,EOT},
53 {0x01,0x02,0x95,0x00,EOT}},
54 {0x5, "Keyboard",
55 {0x30,0x60,0x61,0x70,0x72,EOT},
56 {0x01,0x00,0x60,0x00,0x00,EOT}},
57 {0x6, "GPIO",
58 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
59 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
60 EOT},
61 {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
62 NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
63 EOT}},
64 {0x7, "VID",
65 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
66 0xf7,EOT},
67 {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
68 0x00,EOT}},
69 {0x8, "SPI",
70 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
71 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
72 {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
73 0x00,0x00,0x00,0x00,0x00,EOT}},
74 {0xa, "PME, ACPI",
75 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
76 {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
77 {EOT}}},
78 {0x0110, "F71808A", {
79 /* We assume reserved bits are read as 0. */
80 {NOLDN, NULL,
81 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
82 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
83 {0x00,0x00,0x10,0x01,0x19,0x34,0x00,0x00,MISC,0x00,
84 0xc0,0x21,0x2f,0x5c,0x27,EOT}},
85 {0x1, "COM1",
86 {0x30,0x60,0x61,0x70,0xf0,EOT},
87 {0x01,0x03,0xf8,0x04,0x00,EOT}},
88 {0x4, "Hardware monitor",
89 {0x30,0x60,0x61,0x70,EOT},
90 {0x01,0x02,0x95,0x00,EOT}},
91 {0x5, "Keyboard",
92 {0x30,0x60,0x61,0x70,0x72,0xfe,0xff,EOT},
93 {0x01,0x00,0x60,0x01,0x0c,0x01,0x29,EOT}},
94 {0x6, "GPIO",
95 {0x70,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xcb,0xcc,
96 0xcd,0xce,0xcf,0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,
97 0xd7,0xd8,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,0xf3,
98 EOT},
99 {0x00,0x00,0x3f,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
100 0x00,0xe0,0x40,0x00,0x00,NANA,0x00,0x00,0x00,0x00,
101 0x00,0x00,0x00,0x1f,NANA,0x00,0x00,0xff,NANA,0x00,
102 EOT}},
103 {0x7, "WDT",
104 {0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
105 EOT},
106 {0x00,0x00,0x00,0x03,NANA,NANA,NANA,0x00,0x0a,0x00,
107 EOT}},
108 {0x8, "CIR",
109 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
110 0xfc,0xfd,0xfe,EOT},
111 {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
112 0x00,0x00,0x00,EOT}},
113 {0xa, "PME, ACPI, and EUP Power Saving",
114 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
115 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
116 0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT},
117 {0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00,
118 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c,
119 0x1f,0x00,0x00,0x00,0x00,NANA,EOT}},
120 {EOT}}},
121 {0x0710, "F71869A/AD", {
122 /* We assume reserved bits are read as 0. */
123 {NOLDN, NULL,
124 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
125 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
126 {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
127 0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
128 {0x0, "Floppy",
129 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
130 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
131 {0x1, "COM1",
132 {0x30,0x60,0x61,0x70,0xf0,EOT},
133 {0x01,0x03,0xf8,0x04,0x00,EOT}},
134 {0x2, "COM2",
135 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
136 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
137 {0x3, "Parallel port",
138 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
139 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
140 {0x4, "Hardware monitor",
141 {0x30,0x60,0x61,0x70,EOT},
142 {0x01,0x02,0x95,0x00,EOT}},
143 {0x5, "Keyboard",
144 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
145 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
146 {0x6, "GPIO",
147 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
148 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
149 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
150 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
151 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
152 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
153 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
154 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
155 0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
156 0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
157 {0x7, "WDT",
158 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
159 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
160 {0x8, "CIR",
161 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
162 0xfc,0xfd,0xfe,EOT},
163 {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
164 0x00,0x00,0x00,EOT}},
165 {0xa, "PME, ACPI, and ERP Power Saving",
166 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
167 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
168 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
169 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
170 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
171 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
172 {EOT}}},
173 {0x1408, "F71869E/ED", {
174 /* We assume reserved bits are read as 0. */
175 {NOLDN, NULL,
176 {0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
177 0x2a,0x2b,0x2d,EOT},
178 {0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
179 0x07,0x0f,0x28,EOT}},
180 {0x00, "FDC",
181 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
182 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
183 {0x01, "UART1",
184 {0x30,0x60,0x61,0x70,0xf0,EOT},
185 {0x01,0x03,0xf8,0x04,0x00,EOT}},
186 {0x02, "UART2",
187 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
188 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
189 {0x03, "Parallel port",
190 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
191 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
192 {0x04, "Hardware Monitor",
193 {0x30,0x60,0x61,0x70,EOT},
194 {0x01,0x02,0x95,0x00,EOT}},
195 {0x05, "KBC",
196 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
197 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
198 {0x06, "GPIO",
199 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
200 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
201 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
202 0x90,0x91,0x92,0x93,EOT},
203 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
204 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
205 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
206 0x00,0x3f,NANA,0x00,EOT}},
207 {0x07, "WDT",
208 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
209 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
210 {0x0a, "PME, ACPI, and EUP Power Saving",
211 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
212 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
213 0xf8,0xf9,0xfe,EOT},
214 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
215 0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
216 0x00,0x00,0x00,EOT}},
217 {EOT}}},
218 {0x2307, "F71889", {
219 /* We assume reserved bits are read as 0. */
220 {NOLDN, NULL,
221 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
222 0x2c,0x2d,EOT},
223 {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
224 0x00,0x08,EOT}},
225 {0x0, "Floppy",
226 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
227 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
228 {0x1, "COM1",
229 {0x30,0x60,0x61,0x70,0xf0,EOT},
230 {0x01,0x03,0xf8,0x04,0x00,EOT}},
231 {0x2, "COM2",
232 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
233 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
234 {0x3, "Parallel port",
235 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
236 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
237 {0x4, "Hardware monitor",
238 {0x30,0x60,0x61,0x70,EOT},
239 {0x01,0x02,0x95,0x00,EOT}},
240 {0x5, "Keyboard",
241 {0x30,0x60,0x61,0x70,0x72,0xfe,EOT},
242 {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}},
243 {0x6, "GPIO",
244 {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
245 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
246 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
247 0xf3,0xfe,0xff,EOT},
248 {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f,
249 NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00,
250 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA,
251 0x00,0x00,0x00,EOT}},
252 {0x7, "VID",
253 {0x30,0x60,0x61,EOT},
254 {0x00,0x00,0x00,EOT}},
255 {0x8, "SPI",
256 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
257 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
258 {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
259 0x00,0x00,0x00,0x00,0x00,EOT}},
260 {0xa, "PME, ACPI",
261 {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT},
262 {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}},
263 {0xb, "VREF",
264 {0xf0,0xf1,0xf2,0xf3,0xff,EOT},
265 {0x64,0x64,0x64,0x00,0x00,EOT}},
266 {EOT}}},
267 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
268 {NOLDN, NULL,
269 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
270 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
271 {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
272 0x80,0x00,0x00,0x00,0x04,EOT}},
273 {0x0, "Floppy",
274 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
275 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
276 {0x1, "COM1",
277 {0x30,0x60,0x61,0x70,0xf0,EOT},
278 {0x01,0x03,0xf8,0x04,0x00,EOT}},
279 {0x2, "COM2",
280 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
281 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
282 {0x3, "Parallel port",
283 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
284 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
285 {0x4, "Hardware monitor",
286 {0x30,0x60,0x61,0x70,EOT},
287 {0x00,0x02,0x95,0x00,EOT}},
288 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
289 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
290 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
291 {0x6, "GPIO",
292 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
293 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
294 EOT},
295 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
296 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
297 EOT}},
298 {0x7, "VID",
299 {0x30,0x60,0x61,EOT},
300 {0x00,0x00,0x00,EOT}},
301 {0xa, "PME, ACPI",
302 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
303 {0x00,0x00,0x61,0x06,0x3c,EOT}},
304 {EOT}}},
305 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
306 /* We assume reserved bits are read as 0. */
307 {NOLDN, NULL,
308 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
309 0x2b,0x2c,0x2d,EOT},
310 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
311 0x00,0x08,0x08,EOT}},
312 {0x0, "Floppy",
313 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
314 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
315 {0x1, "COM1",
316 {0x30,0x60,0x61,0x70,0xf0,EOT},
317 {0x01,0x03,0xf8,0x04,0x00,EOT}},
318 {0x2, "COM2",
319 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
320 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
321 {0x3, "Parallel port",
322 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
323 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
324 {0x4, "Hardware monitor",
325 {0x30,0x60,0x61,0x70,EOT},
326 {0x01,0x02,0x95,0x00,EOT}},
327 {0x5, "Keyboard",
328 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
329 {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
330 {0x6, "GPIO",
331 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
332 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
333 0xf3,EOT},
334 {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
335 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
336 0x00,EOT}},
337 {0x7, "VID",
338 {0x30,0x60,0x61,EOT},
339 {0x00,0x00,0x00,EOT}},
340 {0x7, "SPI",
341 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
342 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
343 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
344 0x00,0x00,0x00,0x00,0x00,EOT}},
345 {0xa, "PME, ACPI",
346 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
347 {0x00,0x00,0x01,0x06,0x1c,EOT}},
348 {EOT}}},
349 {0x0604, "F71805F/FG", {
350 /* We assume reserved bits are read as 0. */
351 {NOLDN, NULL,
352 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
353 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
354 {0x0, "Floppy",
355 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
356 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
357 {0x1, "COM1",
358 {0x30,0x60,0x61,0x70,0xf0,EOT},
359 {0x01,0x03,0xf8,0x04,0x00,EOT}},
360 {0x2, "COM2",
361 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
362 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
363 {0x3, "Parallel port",
364 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
365 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
366 {0x4, "Hardware monitor",
367 {0x30,0x60,0x61,0x70,EOT},
368 {0x00,0x02,0x95,0x00,EOT}},
369 {0x6, "GPIO",
370 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
371 0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
372 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
373 0x00,0x00,NANA,0x00,NANA,EOT}},
374 {0xa, "PME",
375 {0x30,0xf0,0xf1,EOT},
376 {0x00,0x00,0x00,EOT}},
377 {EOT}}},
378 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
379 {EOT}}},
380 {0x0802, "F81216D/DG", {
381 {NOLDN, NULL,
382 {0x25,0x2f,EOT},
383 {0x00,RSVD,EOT}},
384 {0x0, "UART1",
385 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
386 {NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
387 {0x1, "UART2",
388 {0x30,0x60,0x61,0x70,0xf0,EOT},
389 {NANA,NANA,NANA,NANA,0x00,EOT}},
390 {0x2, "UART3",
391 {0x30,0x60,0x61,0x70,0xf0,EOT},
392 {NANA,NANA,NANA,NANA,0x00,EOT}},
393 {0x3, "UART4",
394 {0x30,0x60,0x61,0x70,0xf0,EOT},
395 {NANA,NANA,NANA,NANA,0x00,EOT}},
396 {0x8, "WDT",
397 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
398 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
399 {EOT}}},
400 {0x1602, "F81216AD", {
401 {NOLDN, NULL,
402 {0x25,0x27,EOT},
403 {0x00,NANA,EOT}},
404 {0x0, "UART1",
405 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
406 {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
407 {0x1, "UART2",
408 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
409 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
410 {0x2, "UART3",
411 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
412 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
413 {0x3, "UART4",
414 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
415 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
416 {0x8, "WDT",
417 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
418 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
419 {EOT}}},
420 {0x0407, "F81865F/F-I", {
421 {NOLDN, NULL,
422 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT},
423 {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
424 {0x00, "FDC",
425 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
426 {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
427 {0x03, "LPT",
428 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
429 {NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
430 {0x04, "HWMON",
431 {0x30,0x60,0x61,0x70,EOT},
432 {NANA,0x02,0x95,NANA,EOT}},
433 {0x05, "KBC",
434 {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
435 {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
436 {0x06, "GPIO",
437 {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
438 {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
439 {0x07, "WDT",
440 {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
441 {NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
442 {0x08, "SPI",
443 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
444 {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
445 {0x0a, "PME & ACPI",
446 {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
447 {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
448 {0x0b, "RTC",
449 {0x30,0x60,0x61,0x70,EOT},
450 {NANA,0x00,0x00,NANA,EOT}},
451 {0x10, "UART1",
452 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
453 {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
454 {0x11, "UART2",
455 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
456 {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
457 {0x12, "UART3",
458 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
459 {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
460 {0x13, "UART4",
461 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
462 {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
463 {0x14, "UART5",
464 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
465 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
466 {0x15, "UART6",
467 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
468 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
469 {EOT}}},
470 {0x1010, "F81866", {
471 {EOT}}},
472 {0x0215, "F81962/F81964/F81966/F81967", {
473 {EOT}}},
474 {EOT}
477 static const struct superio_registers hwm_table[] = {
478 {0x0110, "F71808A", {
479 {NOLDN, NULL,
480 {0x01, 0x02, 0x03, 0x08, 0x0a, 0x0b, 0x0c, 0x0d,
481 0x0f,
482 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
483 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
484 /* 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
485 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, */
486 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
487 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
488 0x60, 0x61, 0x62, 0x63, 0x64, 0x66, 0x6b, 0x6c,
489 0x6d, 0x6f, 0x7f,
490 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
491 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e,
492 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
493 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
494 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x98,
495 0x9b, 0x9c, 0x9e, 0x9f,
496 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
497 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
498 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
499 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
500 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
501 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
502 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xec, 0xed, 0xee,
503 0xef, EOT},
504 {0x03, 0x00, 0x01, 0x4c, 0x00, 0x00, 0x55, 0x00,
505 0x20,
506 NANA, NANA, NANA, NANA, RSVD, RSVD, RSVD, NANA,
507 NANA, RSVD, RSVD, RSVD, RSVD, NANA, NANA, NANA,
508 /* RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
509 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, */
510 0x44, 0x00, NANA, 0x00, 0x00, 0x00, 0x00, 0x00,
511 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
512 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x40,
513 0x04, 0x00, 0x00,
514 RSVD, RSVD, NANA, RSVD, NANA, RSVD, RSVD, RSVD,
515 NANA, NANA, NANA, NANA, NANA, RSVD, RSVD,
516 RSVD, RSVD, NANA, NANA, NANA, NANA, RSVD, RSVD,
517 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
518 0x00, NANA, NANA, 0x00, 0x2e, 0xff, 0x05, 0x44,
519 0x05, 0x55, 0x66, 0x00,
520 0x03, 0xff, 0x00, 0x83, 0x03, 0xff, 0x3c, 0x32,
521 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1d,
522 0x0c, 0x25, 0x00, 0x80, 0x03, 0xff, 0x3c, 0x32,
523 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1e,
524 0x0f, 0xff, RSVD, 0x7f, RSVD, RSVD, RSVD, RSVD,
525 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, 0x00,
526 NANA, NANA, NANA, NANA, NANA, 0x00, 0x01, 0x01,
527 0x00, EOT}},
528 {EOT}}},
529 {EOT}
532 void probe_idregs_fintek(uint16_t port)
534 uint16_t vid, did, hwmport;
536 probing_for("Fintek", "", port);
538 enter_conf_mode_winbond_fintek_ite_8787(port);
540 did = regval(port, DEVICE_ID_BYTE1_REG);
541 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
543 vid = regval(port, VENDOR_ID_BYTE1_REG);
544 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
546 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
547 if (verbose)
548 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
549 exit_conf_mode_winbond_fintek_ite_8787(port);
550 return;
553 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
554 get_superio_name(reg_table, did), vid, did, port);
555 chip_found = 1;
557 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
559 if (extra_dump) {
560 regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */
562 /* Get HWM base address (stored in LDN 4, index 0x60/0x61). */
563 hwmport = regval(port, 0x60) << 8;
564 hwmport |= regval(port, 0x61);
566 printf("Hardware monitor (0x%04x)\n", hwmport);
567 dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL);
570 exit_conf_mode_winbond_fintek_ite_8787(port);
574 void probe_idregs_fintek_alternative(uint16_t port)
576 uint16_t vid, did;
578 probing_for("Fintek", "", port);
580 enter_conf_mode_fintek_7777(port);
582 did = regval(port, DEVICE_ID_BYTE1_REG);
583 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
585 vid = regval(port, VENDOR_ID_BYTE1_REG);
586 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
588 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
589 if (verbose)
590 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
591 exit_conf_mode_fintek_7777(port);
592 return;
595 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
596 get_superio_name(reg_table, did), vid, did, port);
597 chip_found = 1;
599 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
601 exit_conf_mode_fintek_7777(port);
604 void print_fintek_chips(void)
606 print_vendor_chips("Fintek", reg_table);