src/soc/intel/alderlake/cpu.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Alder Lake Processor CPU Datasheet
   5  * Document number: 619501
   6  * Chapter number: 14
   7  */
   8
   9 #include <console/console.h>
  10 #include <device/pci.h>
  11 #include <cpu/x86/lapic.h>
  12 #include <cpu/x86/mp.h>
  13 #include <cpu/x86/msr.h>
  14 #include <cpu/intel/smm_reloc.h>
  15 #include <cpu/intel/turbo.h>
  16 #include <cpu/intel/common/common.h>
  17 #include <fsp/api.h>
  18 #include <intelblocks/cpulib.h>
  19 #include <intelblocks/mp_init.h>
  20 #include <intelblocks/msr.h>
  21 #include <soc/cpu.h>
  22 #include <soc/msr.h>
  23 #include <soc/pci_devs.h>
  24 #include <soc/soc_chip.h>
  25
  26 static void soc_fsp_load(void)
  27 {
  28         fsps_load();
  29 }
  30
  31 static void configure_misc(void)
  32 {
  33         msr_t msr;
  34
  35         config_t *conf = config_of_soc();
  36
  37         msr = rdmsr(IA32_MISC_ENABLE);
  38         msr.lo |= (1 << 0);     /* Fast String enable */
  39         msr.lo |= (1 << 3);     /* TM1/TM2/EMTTM enable */
  40         wrmsr(IA32_MISC_ENABLE, msr);
  41
  42         /* Set EIST status */
  43         cpu_set_eist(conf->eist_enable);
  44
  45         /* Disable Thermal interrupts */
  46         msr.lo = 0;
  47         msr.hi = 0;
  48         wrmsr(IA32_THERM_INTERRUPT, msr);
  49
  50         /* Enable package critical interrupt only */
  51         msr.lo = 1 << 4;
  52         msr.hi = 0;
  53         wrmsr(IA32_PACKAGE_THERM_INTERRUPT, msr);
  54
  55         /* Enable PROCHOT */
  56         msr = rdmsr(MSR_POWER_CTL);
  57         msr.lo |= (1 << 0);     /* Enable Bi-directional PROCHOT as an input*/
  58         msr.lo |= (1 << 23);    /* Lock it */
  59         wrmsr(MSR_POWER_CTL, msr);
  60 }
  61
  62 /* All CPUs including BSP will run the following function. */
  63 void soc_core_init(struct device *cpu)
  64 {
  65         /* Clear out pending MCEs */
  66         /* TODO(adurbin): This should only be done on a cold boot. Also, some
  67          * of these banks are core vs package scope. For now every CPU clears
  68          * every bank. */
  69         mca_configure();
  70
  71         /* Enable the local CPU apics */
  72         enable_lapic_tpr();
  73         setup_lapic();
  74
  75         /* Configure Enhanced SpeedStep and Thermal Sensors */
  76         configure_misc();
  77
  78         enable_pm_timer_emulation();
  79
  80         /* Enable Direct Cache Access */
  81         configure_dca_cap();
  82
  83         /* Set energy policy */
  84         set_energy_perf_bias(ENERGY_POLICY_NORMAL);
  85
  86         /* Enable Turbo */
  87         enable_turbo();
  88 }
  89
  90 static void per_cpu_smm_trigger(void)
  91 {
  92         /* Relocate the SMM handler. */
  93         smm_relocate();
  94 }
  95
  96 static void post_mp_init(void)
  97 {
  98         /* Set Max Ratio */
  99         cpu_set_max_ratio();
 100
 101         /*
 102          * 1. Now that all APs have been relocated as well as the BSP let SMIs
 103          * start flowing.
 104          * 2. Skip enabling power button SMI and enable it after BS_CHIPS_INIT
 105          * to avoid shutdown hang due to lack of init on certain IP in FSP-S.
 106          */
 107         global_smi_enable_no_pwrbtn();
 108 }
 109
 110 static const struct mp_ops mp_ops = {
 111         /*
 112          * Skip Pre MP init MTRR programming as MTRRs are mirrored from BSP,
 113          * that are set prior to ramstage.
 114          * Real MTRRs programming are being done after resource allocation.
 115          */
 116         .pre_mp_init = soc_fsp_load,
 117         .get_cpu_count = get_cpu_count,
 118         .get_smm_info = smm_info,
 119         .get_microcode_info = get_microcode_info,
 120         .pre_mp_smm_init = smm_initialize,
 121         .per_cpu_smm_trigger = per_cpu_smm_trigger,
 122         .relocation_handler = smm_relocation_handler,
 123         .post_mp_init = post_mp_init,
 124 };
 125
 126 void soc_init_cpus(struct bus *cpu_bus)
 127 {
 128         if (mp_init_with_smm(cpu_bus, &mp_ops))
 129                 printk(BIOS_ERR, "MP initialization failure.\n");
 130
 131         /* Thermal throttle activation offset */
 132         configure_tcc_thermal_target();
 133 }