src/drivers/uart/uart8250io.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include <stdlib.h>
  15 #include <arch/io.h>
  16 #include <boot/coreboot_tables.h>
  17 #include <console/uart.h>
  18 #include <trace.h>
  19 #include "uart8250reg.h"
  20
  21 /* Should support 8250, 16450, 16550, 16550A type UARTs */
  22
  23 /* Expected character delay at 1200bps is 9ms for a working UART
  24  * and no flow-control. Assume UART as stuck if shift register
  25  * or FIFO takes more than 50ms per character to appear empty.
  26  *
  27  * Estimated that inb() from UART takes 1 microsecond.
  28  */
  29 #define SINGLE_CHAR_TIMEOUT     (50 * 1000)
  30 #define FIFO_TIMEOUT            (16 * SINGLE_CHAR_TIMEOUT)
  31
  32 static int uart8250_can_tx_byte(unsigned int base_port)
  33 {
  34         return inb(base_port + UART8250_LSR) & UART8250_LSR_THRE;
  35 }
  36
  37 static void uart8250_tx_byte(unsigned int base_port, unsigned char data)
  38 {
  39         unsigned long int i = SINGLE_CHAR_TIMEOUT;
  40         while (i-- && !uart8250_can_tx_byte(base_port));
  41         outb(data, base_port + UART8250_TBR);
  42 }
  43
  44 static void uart8250_tx_flush(unsigned int base_port)
  45 {
  46         unsigned long int i = FIFO_TIMEOUT;
  47         while (i-- && !(inb(base_port + UART8250_LSR) & UART8250_LSR_TEMT));
  48 }
  49
  50 static int uart8250_can_rx_byte(unsigned int base_port)
  51 {
  52         return inb(base_port + UART8250_LSR) & UART8250_LSR_DR;
  53 }
  54
  55 static unsigned char uart8250_rx_byte(unsigned int base_port)
  56 {
  57         unsigned long int i = SINGLE_CHAR_TIMEOUT;
  58         while (i && !uart8250_can_rx_byte(base_port))
  59                 i--;
  60
  61         if (i)
  62                 return inb(base_port + UART8250_RBR);
  63         else
  64                 return 0x0;
  65 }
  66
  67 static void uart8250_init(unsigned int base_port, unsigned int divisor)
  68 {
  69         DISABLE_TRACE;
  70         /* Disable interrupts */
  71         outb(0x0, base_port + UART8250_IER);
  72         /* Enable FIFOs */
  73         outb(UART8250_FCR_FIFO_EN, base_port + UART8250_FCR);
  74
  75         /* assert DTR and RTS so the other end is happy */
  76         outb(UART8250_MCR_DTR | UART8250_MCR_RTS, base_port + UART8250_MCR);
  77
  78         /* DLAB on */
  79         outb(UART8250_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
  80
  81         /* Set Baud Rate Divisor. 12 ==> 9600 Baud */
  82         outb(divisor & 0xFF,   base_port + UART8250_DLL);
  83         outb((divisor >> 8) & 0xFF,    base_port + UART8250_DLM);
  84
  85         /* Set to 3 for 8N1 */
  86         outb(CONFIG_TTYS0_LCS, base_port + UART8250_LCR);
  87         ENABLE_TRACE;
  88 }
  89
  90 static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
  91
  92 uintptr_t uart_platform_base(int idx)
  93 {
  94         if (idx < ARRAY_SIZE(bases))
  95                 return bases[idx];
  96         return 0;
  97 }
  98
  99 void uart_init(int idx)
 100 {
 101         if (!CONFIG(DRIVERS_UART_8250IO_SKIP_INIT)) {
 102                 unsigned int div;
 103                 div = uart_baudrate_divisor(get_uart_baudrate(),
 104                         uart_platform_refclk(), uart_input_clock_divider());
 105                 uart8250_init(uart_platform_base(idx), div);
 106         }
 107 }
 108
 109 void uart_tx_byte(int idx, unsigned char data)
 110 {
 111         uart8250_tx_byte(uart_platform_base(idx), data);
 112 }
 113
 114 unsigned char uart_rx_byte(int idx)
 115 {
 116         return uart8250_rx_byte(uart_platform_base(idx));
 117 }
 118
 119 void uart_tx_flush(int idx)
 120 {
 121         uart8250_tx_flush(uart_platform_base(idx));
 122 }
 123
 124 void uart_fill_lb(void *data)
 125 {
 126         struct lb_serial serial;
 127         serial.type = LB_SERIAL_TYPE_IO_MAPPED;
 128         serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
 129         serial.baud = get_uart_baudrate();
 130         serial.regwidth = 1;
 131         serial.input_hertz = uart_platform_refclk();
 132         serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 133         lb_add_serial(&serial, data);
 134
 135         lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);
 136 }