mainboard/google/poppy/variants/soraka: Add SPD for K3QFAFA0CM-AGCF
[coreboot.git] / src / southbridge / intel / i82801ex / ehci.c
blob28164c5594f1f1f65b146e1d4b297cdbd570e32e
1 #include <console/console.h>
2 #include <device/device.h>
3 #include <device/pci.h>
4 #include <device/pci_ids.h>
5 #include <device/pci_ops.h>
6 #include <device/pci_ehci.h>
7 #include "i82801ex.h"
9 static void ehci_init(struct device *dev)
11 uint32_t cmd;
13 printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
14 cmd = pci_read_config32(dev, PCI_COMMAND);
15 pci_write_config32(dev, PCI_COMMAND,
16 cmd | PCI_COMMAND_MASTER);
18 printk(BIOS_DEBUG, "done.\n");
21 static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
23 uint8_t access_cntl;
24 access_cntl = pci_read_config8(dev, 0x80);
25 /* Enable writes to protected registers */
26 pci_write_config8(dev, 0x80, access_cntl | 1);
27 /* Write the subsystem vendor and device id */
28 pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
29 ((device & 0xffff) << 16) | (vendor & 0xffff));
30 /* Restore protection */
31 pci_write_config8(dev, 0x80, access_cntl);
34 static struct pci_operations lops_pci = {
35 .set_subsystem = &ehci_set_subsystem,
37 static struct device_operations ehci_ops = {
38 .read_resources = pci_ehci_read_resources,
39 .set_resources = pci_dev_set_resources,
40 .enable_resources = pci_dev_enable_resources,
41 .init = ehci_init,
42 .scan_bus = 0,
43 .enable = i82801ex_enable,
44 .ops_pci = &lops_pci,
47 static const struct pci_driver ehci_driver __pci_driver = {
48 .ops = &ehci_ops,
49 .vendor = PCI_VENDOR_ID_INTEL,
50 .device = PCI_DEVICE_ID_INTEL_82801ER_EHCI,