src/soc/intel/alderlake/bootblock/report_platform.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Alder Lake Platform Stepping and IDs
   5  * Document number: 619362, 619501
   6  * Chapter number: 2, 14
   7  */
   8
   9 #include <arch/cpu.h>
  10 #include <device/pci_ops.h>
  11 #include <console/console.h>
  12 #include <cpu/intel/microcode.h>
  13 #include <cpu/x86/msr.h>
  14 #include <cpu/x86/name.h>
  15 #include <device/pci.h>
  16 #include <device/pci_ids.h>
  17 #include <intelblocks/mp_init.h>
  18 #include <soc/bootblock.h>
  19 #include <soc/pci_devs.h>
  20
  21 static struct {
  22         u32 cpuid;
  23         const char *name;
  24 } cpu_table[] = {
  25         { CPUID_ALDERLAKE_P_A0, "Alderlake-P A0" },
  26         { CPUID_ALDERLAKE_P_B0, "Alderlake-P B0" },
  27         { CPUID_ALDERLAKE_M_A0, "Alderlake-M A0" },
  28 };
  29
  30 static struct {
  31         u16 mchid;
  32         const char *name;
  33 } mch_table[] = {
  34         { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, "Alderlake-P" },
  35         { PCI_DEVICE_ID_INTEL_ADL_P_ID_2, "Alderlake-P" },
  36         { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, "Alderlake-P" },
  37         { PCI_DEVICE_ID_INTEL_ADL_P_ID_4, "Alderlake-P" },
  38         { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, "Alderlake-P" },
  39         { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, "Alderlake-P" },
  40         { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, "Alderlake-P" },
  41         { PCI_DEVICE_ID_INTEL_ADL_P_ID_8, "Alderlake-P" },
  42         { PCI_DEVICE_ID_INTEL_ADL_P_ID_9, "Alderlake-P" },
  43         { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, "Alderlake-M" },
  44 };
  45
  46 static struct {
  47         u16 espiid;
  48         const char *name;
  49 } pch_table[] = {
  50         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_0, "Alderlake-P SKU" },
  51         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_1, "Alderlake-P SKU" },
  52         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_2, "Alderlake-P SKU" },
  53         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_3, "Alderlake-P SKU" },
  54         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_4, "Alderlake-P SKU" },
  55         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_5, "Alderlake-P SKU" },
  56         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_6, "Alderlake-P SKU" },
  57         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_7, "Alderlake-P SKU" },
  58         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_8, "Alderlake-P SKU" },
  59         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_9, "Alderlake-P SKU" },
  60         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_10, "Alderlake-P SKU" },
  61         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_11, "Alderlake-P SKU" },
  62         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_12, "Alderlake-P SKU" },
  63         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_13, "Alderlake-P SKU" },
  64         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_14, "Alderlake-P SKU" },
  65         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_15, "Alderlake-P SKU" },
  66         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_16, "Alderlake-P SKU" },
  67         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_17, "Alderlake-P SKU" },
  68         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_18, "Alderlake-P SKU" },
  69         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_19, "Alderlake-P SKU" },
  70         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_20, "Alderlake-P SKU" },
  71         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_21, "Alderlake-P SKU" },
  72         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_22, "Alderlake-P SKU" },
  73         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_23, "Alderlake-P SKU" },
  74         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_24, "Alderlake-P SKU" },
  75         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_25, "Alderlake-P SKU" },
  76         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_26, "Alderlake-P SKU" },
  77         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_27, "Alderlake-P SKU" },
  78         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_28, "Alderlake-P SKU" },
  79         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" },
  80         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" },
  81         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" },
  82         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" },
  83         { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" },
  84         { PCI_DEVICE_ID_INTEL_ADP_M_ESPI_32, "Alderlake-M SKU" },
  85 };
  86
  87 static struct {
  88         u16 igdid;
  89         const char *name;
  90 } igd_table[] = {
  91         { PCI_DEVICE_ID_INTEL_ADL_GT0, "Alderlake GT0" },
  92         { PCI_DEVICE_ID_INTEL_ADL_GT1, "Alderlake GT1" },
  93         { PCI_DEVICE_ID_INTEL_ADL_GT1_1, "Alderlake GT1" },
  94         { PCI_DEVICE_ID_INTEL_ADL_GT1_2, "Alderlake GT1" },
  95         { PCI_DEVICE_ID_INTEL_ADL_GT1_3, "Alderlake GT1" },
  96         { PCI_DEVICE_ID_INTEL_ADL_GT1_4, "Alderlake GT1" },
  97         { PCI_DEVICE_ID_INTEL_ADL_GT1_5, "Alderlake GT1" },
  98         { PCI_DEVICE_ID_INTEL_ADL_GT1_6, "Alderlake GT1" },
  99         { PCI_DEVICE_ID_INTEL_ADL_GT1_7, "Alderlake GT1" },
 100         { PCI_DEVICE_ID_INTEL_ADL_GT1_8, "Alderlake GT1" },
 101         { PCI_DEVICE_ID_INTEL_ADL_GT1_9, "Alderlake GT1" },
 102         { PCI_DEVICE_ID_INTEL_ADL_P_GT2, "Alderlake P GT2" },
 103         { PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" },
 104         { PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
 105         { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
 106         { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
 107         { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
 108 };
 109
 110 static inline uint8_t get_dev_revision(pci_devfn_t dev)
 111 {
 112         return pci_read_config8(dev, PCI_REVISION_ID);
 113 }
 114
 115 static inline uint16_t get_dev_id(pci_devfn_t dev)
 116 {
 117         return pci_read_config16(dev, PCI_DEVICE_ID);
 118 }
 119
 120 static void report_cpu_info(void)
 121 {
 122         u32 i, cpu_id, cpu_feature_flag;
 123         char cpu_name[49];
 124         int vt, txt, aes;
 125         static const char *const mode[] = {"NOT ", ""};
 126         const char *cpu_type = "Unknown";
 127
 128         fill_processor_name(cpu_name);
 129         cpu_id = cpu_get_cpuid();
 130
 131         /* Look for string to match the name */
 132         for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
 133                 if (cpu_table[i].cpuid == cpu_id) {
 134                         cpu_type = cpu_table[i].name;
 135                         break;
 136                 }
 137         }
 138
 139         printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
 140         printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
 141                cpu_id, cpu_type, get_current_microcode_rev());
 142
 143         cpu_feature_flag = cpu_get_feature_flags_ecx();
 144         aes = !!(cpu_feature_flag & CPUID_AES);
 145         txt = !!(cpu_feature_flag & CPUID_SMX);
 146         vt = !!(cpu_feature_flag & CPUID_VMX);
 147         printk(BIOS_DEBUG,
 148                 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
 149                 mode[aes], mode[txt], mode[vt]);
 150 }
 151
 152 static void report_mch_info(void)
 153 {
 154         int i;
 155         uint16_t mchid = get_dev_id(SA_DEV_ROOT);
 156         const char *mch_type = "Unknown";
 157
 158         for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
 159                 if (mch_table[i].mchid == mchid) {
 160                         mch_type = mch_table[i].name;
 161                         break;
 162                 }
 163         }
 164
 165         printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
 166                 mchid, get_dev_revision(SA_DEV_ROOT), mch_type);
 167 }
 168
 169 static void report_pch_info(void)
 170 {
 171         int i;
 172         pci_devfn_t dev = PCH_DEV_ESPI;
 173         uint16_t espiid = get_dev_id(dev);
 174         const char *pch_type = "Unknown";
 175
 176         for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
 177                 if (pch_table[i].espiid == espiid) {
 178                         pch_type = pch_table[i].name;
 179                         break;
 180                 }
 181         }
 182         printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
 183                 espiid, get_dev_revision(dev), pch_type);
 184 }
 185
 186 static void report_igd_info(void)
 187 {
 188         int i;
 189         pci_devfn_t dev = SA_DEV_IGD;
 190         uint16_t igdid = get_dev_id(dev);
 191         const char *igd_type = "Unknown";
 192
 193         for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
 194                 if (igd_table[i].igdid == igdid) {
 195                         igd_type = igd_table[i].name;
 196                         break;
 197                 }
 198         }
 199         printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
 200                 igdid, get_dev_revision(dev), igd_type);
 201 }
 202
 203 void report_platform_info(void)
 204 {
 205         report_cpu_info();
 206         report_mch_info();
 207         report_pch_info();
 208         report_igd_info();
 209 }