1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 OperationRegion (PXCS, SystemMemory, BASE(_ADR), 0x800)
4 Field (PXCS, AnyAcc, NoLock, Preserve)
7 Offset(0x50), /* LCTL - Link Control Register */
8 L0SE, 1, /* 0, L0s Entry Enabled */
10 LDIS, 1, /* 1, Link Disable */
12 Offset(0x52), /* LSTS - Link Status Register */
14 LASX, 1, /* 0, Link Active Status */
15 Offset(0x5A), /* SLSTS[7:0] - Slot Status Register */
16 ABPX, 1, /* 0, Attention Button Pressed */
18 PDCX, 1, /* 3, Presence Detect Changed */
20 PDSX, 1, /* 6, Presence Detect State */
22 DLSC, 1, /* 8, Data Link Layer State Changed */
23 Offset(0x60), /* RSTS - Root Status Register */
25 PSPX, 1, /* 16, PME Status */
27 D3HT, 2, /* Power State */
28 Offset(0xD8), /* 0xD8, MPC - Miscellaneous Port Configuration Register */
30 HPEX, 1, /* 30, Hot Plug SCI Enable */
31 PMEX, 1, /* 31, Power Management SCI Enable */
32 Offset(0xE2), /* 0xE2, RPPGEN - Root Port Power Gating Enable */
34 L23E, 1, /* 2, L23_Rdy Entry Request (L23ER) */
35 L23R, 1, /* 3, L23_Rdy to Detect Transition (L23R2DT) */
36 Offset(0x420), /* 0x420, PCIEPMECTL (PCIe PM Extension Control) */
38 DPGE, 1, /* PCIEPMECTL[30]: Disabled, Detect and L23_Rdy State PHY Lane */
39 /* Power Gating Enable (DLSULPPGE) */
40 Offset(0x5BC), /* 0x5BC, PCIE ADVMCTRL */
42 RPER, 1, /* RTD3PERST[3] */
43 RPFE, 1, /* RTD3PFETDIS[4] */
46 Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
48 Offset(0xDC), /* 0xDC, SMSCS - SMI/SCI Status Register */
50 HPSX, 1, /* 30, Hot Plug SCI Status */
51 PMSX, 1 /* 31, Power Management SCI Status */
55 * _DSM Device Specific Method
57 * Arg0: UUID Unique function identifier
58 * Arg1: Integer Revision Level
59 * Arg2: Integer Function Index (0 = Return Supported Functions)
60 * Arg3: Package Parameters
62 Method (_DSM, 4, Serialized)
64 Return (Buffer() { 0x00 })
69 Name (_ADR, 0x00000000)
73 Return (Package() { 0x69, 4 })
79 /* If entering Sx (Arg1 > 1), need to skip TCSS D3Cold & TBT RTD3/D3Cold. */
80 If ((TUID == 0) || (TUID == 1)) {
81 \_SB.PCI0.TDM0.SD3C = Arg1
83 \_SB.PCI0.TDM1.SD3C = Arg1
86 C2PM (Arg0, Arg1, Arg2, DCPM)
91 Return (Package() { 0x69, 4 })
95 * Sub-Method of _L61 Hot-Plug event
96 * _L61 event handler should invoke this method to support HotPlug wake event from TBT RP.
98 Method (HPEV, 0, Serialized)
100 If ((VDID != 0xFFFFFFFF) && HPSX) {
101 If ((PDCX == 1) && (DLSC == 1)) {
102 /* Clear all status bits first. */
106 /* Perform proper notification to the OS. */
109 /* False event. Clear Hot-Plug Status, then exit. */
116 * Power Management routine for D3
118 Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */
121 * RTD3 Exit Method to bring TBT controller out of RTD3 mode.
123 Method (D3CX, 0, Serialized)
129 RPFE = 0 /* Set RTD3PFETDIS = 0 */
130 RPER = 0 /* Set RTD3PERST = 0 */
131 L23R = 1 /* Set L23r2dt = 1 */
134 * Poll for L23r2dt == 0. Wait for transition to Detect.
150 * RTD3 Entry method to enable TBT controller RTD3 mode.
152 Method (D3CE, 0, Serialized)
158 L23E = 1 /* Set L23er = 1 */
160 /* Poll until L23er == 0 */
172 STAT = 0 /* D3Cold */
173 RPFE = 1 /* Set RTD3PFETDIS = 1 */
174 RPER = 1 /* Set RTD3PERST = 1 */
177 Method (_PS0, 0, Serialized)
179 HPEV () /* Check and handle Hot Plug SCI status. */
181 HPEX = 0 /* Disable Hot Plug SCI */
183 HPME () /* Check and handle PME SCI status */
185 PMEX = 0 /* Disable Power Management SCI */
189 Method (_PS3, 0, Serialized)
191 /* Check it is hotplug SCI or not, then clear PDC accordingly */
194 /* Clear PDC since it is not a hotplug. */
200 HPEX = 1 /* Enable Hot Plug SCI. */
201 HPEV () /* Check and handle Hot Plug SCI status. */
204 PMEX = 1 /* Enable Power Management SCI. */
205 HPME () /* Check and handle PME SCI status. */
209 Method (_S0W, 0x0, NotSerialized)
216 If ((TUID == 0) || (TUID == 1)) {
217 Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
219 Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
225 If ((TUID == 0) || (TUID == 1)) {
226 Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 })
228 Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 })
233 * PCI_EXP_STS Handler for PCIE Root Port
235 Method (HPME, 0, Serialized)
237 If ((VDID != 0xFFFFFFFF) && (PMSX == 1)) { /* if port exists and PME SCI Status set */
239 * Notify child device; this will cause its driver to clear PME_Status from
243 PMSX = 1 /* clear rootport's PME SCI status */
245 * Consume one pending PME notification to prevent it from blocking the queue.