[PATCH] libpayload: Implement EHCI reset function
[coreboot.git] / payloads / libpayload / drivers / usb / ehci_private.h
blob3b9faf6d31e3112d0c6d4585ed13940275aad237
1 /*
2 * This file is part of the libpayload project.
4 * Copyright (C) 2010 coresystems GmbH
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
30 #ifndef __EHCI_PRIVATE_H
31 #define __EHCI_PRIVATE_H
33 #include <pci.h>
34 #include <usb/usb.h>
36 #define USBBASE 0x10
37 #define FLADJ 0x61
38 #define FLADJ_framelength(x) (((x)-59488)/16)
40 typedef volatile u32 portsc_t;
41 #define P_CURR_CONN_STATUS (1 << 0)
42 #define P_CONN_STATUS_CHANGE (1 << 1)
43 #define P_PORT_ENABLE (1 << 2)
44 #define P_PORT_RESET (1 << 8)
45 #define P_LINE_STATUS (3 << 10)
46 #define P_LINE_STATUS_LOWSPEED (1 << 10)
47 #define P_PP (1 << 12)
48 #define P_PORT_OWNER (1 << 13)
50 typedef volatile struct {
51 #define HCS_NPORTS_MASK 0xf
52 #define HCS_PORT_POWER_CONTROL 0x10
53 u8 caplength;
54 u8 res1;
55 u16 hciversion;
56 u32 hcsparams;
57 u32 hccparams;
58 u64 hcsp_portroute;
59 } __attribute__ ((packed)) hc_cap_t;
61 typedef volatile struct {
62 u32 usbcmd;
63 #define HC_OP_RS 1
64 #define HC_OP_HC_RESET (1 << 1)
65 #define HC_OP_PERIODIC_SCHED_EN_SHIFT 4
66 #define HC_OP_PERIODIC_SCHED_EN (1 << HC_OP_PERIODIC_SCHED_EN_SHIFT)
67 #define HC_OP_ASYNC_SCHED_EN_SHIFT 5
68 #define HC_OP_ASYNC_SCHED_EN (1 << HC_OP_ASYNC_SCHED_EN_SHIFT)
69 u32 usbsts;
70 #define HC_OP_PERIODIC_SCHED_STAT_SHIFT 14
71 #define HC_OP_PERIODIC_SCHED_STAT (1 << HC_OP_PERIODIC_SCHED_STAT_SHIFT)
72 #define HC_OP_ASYNC_SCHED_STAT_SHIFT 15
73 #define HC_OP_ASYNC_SCHED_STAT (1 << HC_OP_ASYNC_SCHED_STAT_SHIFT)
74 #define HC_OP_HC_HALTED_SHIFT 12
75 #define HC_OP_HC_HALTED (1 << HC_OP_HC_HALTED_SHIFT)
76 u32 usbintr;
77 u32 frindex;
78 u32 ctrldssegment;
79 u32 periodiclistbase;
80 u32 asynclistaddr;
81 u8 res1[0x3f-0x1c];
82 u32 configflag;
83 portsc_t portsc[0];
84 } hc_op_t;
86 typedef volatile struct {
87 #define QTD_TERMINATE 1
88 #define QTD_PTR_MASK ~0x1f
89 u32 next_qtd;
90 u32 alt_next_qtd;
91 u32 token;
92 #define QTD_STATUS_MASK 0xff
93 #define QTD_HALTED (1 << 6)
94 #define QTD_ACTIVE (1 << 7)
95 #define QTD_PID_SHIFT 8
96 #define QTD_PID_MASK (3 << QTD_PID_SHIFT)
97 #define QTD_CERR_SHIFT 10
98 #define QTD_CERR_MASK (3 << QTD_CERR_SHIFT)
99 #define QTD_CPAGE_SHIFT 12
100 #define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT)
101 #define QTD_TOTAL_LEN_SHIFT 16
102 #define QTD_TOTAL_LEN_MASK (((1<<15)-1) << QTD_TOTAL_LEN_SHIFT)
103 #define QTD_TOGGLE_SHIFT 31
104 #define QTD_TOGGLE_MASK (1 << 31)
105 #define QTD_TOGGLE_DATA0 0
106 #define QTD_TOGGLE_DATA1 (1 << QTD_TOGGLE_SHIFT)
107 u32 bufptrs[5];
108 u32 bufptrs64[5];
109 } __attribute__ ((packed)) qtd_t;
111 typedef volatile struct {
112 u32 horiz_link_ptr;
113 #define QH_TERMINATE 1
114 #define QH_iTD (0<<1)
115 #define QH_QH (1<<1)
116 #define QH_siTD (2<<1)
117 #define QH_FSTN (3<<1)
118 u32 epchar;
119 #define QH_EP_SHIFT 8
120 #define QH_EPS_SHIFT 12
121 #define QH_DTC_SHIFT 14
122 #define QH_RECLAIM_HEAD_SHIFT 15
123 #define QH_MPS_SHIFT 16
124 #define QH_NON_HS_CTRL_EP_SHIFT 27
125 #define QH_NAK_CNT_SHIFT 28
126 u32 epcaps;
127 #define QH_UFRAME_CMASK_SHIFT 8
128 #define QH_HUB_ADDRESS_SHIFT 16
129 #define QH_PORT_NUMBER_SHIFT 23
130 #define QH_PIPE_MULTIPLIER_SHIFT 30
131 volatile u32 current_td_ptr;
132 volatile qtd_t td;
133 } ehci_qh_t;
135 typedef struct ehci {
136 hc_cap_t *capabilities;
137 hc_op_t *operation;
138 ehci_qh_t *dummy_qh;
139 } ehci_t;
141 #define PS_TERMINATE 1
142 #define PS_TYPE_QH 1 << 1
143 #define PS_PTR_MASK ~0x1f
146 #define EHCI_INST(controller) ((ehci_t*)((controller)->instance))
148 #endif