Documentation: Fix sphinx configuration
[coreboot.git] / src / include / smbios.h
blob521339e401821c4425d12f3c6756e9c0cd769457
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef SMBIOS_H
4 #define SMBIOS_H
6 #include <types.h>
7 #include <memory_info.h>
9 unsigned long smbios_write_tables(unsigned long start);
10 int smbios_add_string(u8 *start, const char *str);
11 int smbios_string_table_len(u8 *start);
13 /* Used by mainboard to add an on-board device */
14 enum misc_slot_type;
15 enum misc_slot_length;
16 enum misc_slot_usage;
17 enum slot_data_bus_bandwidth;
18 int smbios_write_type9(unsigned long *current, int *handle,
19 const char *name, const enum misc_slot_type type,
20 const enum slot_data_bus_bandwidth bandwidth,
21 const enum misc_slot_usage usage,
22 const enum misc_slot_length length,
23 u8 slot_char1, u8 slot_char2, u8 bus, u8 dev_func);
24 enum smbios_bmc_interface_type;
25 int smbios_write_type38(unsigned long *current, int *handle,
26 const enum smbios_bmc_interface_type interface_type,
27 const u8 ipmi_rev, const u8 i2c_addr, const u8 nv_addr,
28 const u64 base_addr, const u8 base_modifier,
29 const u8 irq);
30 int smbios_write_type41(unsigned long *current, int *handle,
31 const char *name, u8 instance, u16 segment,
32 u8 bus, u8 device, u8 function, u8 device_type);
34 const char *smbios_system_manufacturer(void);
35 const char *smbios_system_product_name(void);
36 const char *smbios_system_serial_number(void);
37 const char *smbios_system_version(void);
38 void smbios_system_set_uuid(u8 *uuid);
39 const char *smbios_system_sku(void);
41 unsigned int smbios_cpu_get_max_speed_mhz(void);
42 unsigned int smbios_cpu_get_current_speed_mhz(void);
44 const char *smbios_mainboard_manufacturer(void);
45 const char *smbios_mainboard_product_name(void);
46 const char *smbios_mainboard_serial_number(void);
47 const char *smbios_mainboard_version(void);
49 const char *smbios_mainboard_bios_version(void);
50 const char *smbios_mainboard_asset_tag(void);
51 u8 smbios_mainboard_feature_flags(void);
52 const char *smbios_mainboard_location_in_chassis(void);
53 const char *smbios_chassis_version(void);
54 const char *smbios_chassis_serial_number(void);
55 const char *smbios_processor_serial_number(void);
57 unsigned int smbios_processor_external_clock(void);
58 unsigned int smbios_processor_characteristics(void);
59 struct cpuid_result;
60 unsigned int smbios_processor_family(struct cpuid_result res);
62 /* Used by mainboard to add port information of type 8 */
63 struct port_information;
64 int smbios_write_type8(unsigned long *current, int *handle,
65 const struct port_information *port,
66 size_t num_ports);
68 #define BIOS_CHARACTERISTICS_PCI_SUPPORTED (1 << 7)
69 #define BIOS_CHARACTERISTICS_PC_CARD (1 << 8)
70 #define BIOS_CHARACTERISTICS_PNP (1 << 9)
71 #define BIOS_CHARACTERISTICS_APM (1 << 10)
72 #define BIOS_CHARACTERISTICS_UPGRADEABLE (1 << 11)
73 #define BIOS_CHARACTERISTICS_SHADOW (1 << 12)
74 #define BIOS_CHARACTERISTICS_BOOT_FROM_CD (1 << 15)
75 #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT (1 << 16)
76 #define BIOS_CHARACTERISTICS_BIOS_SOCKETED (1 << 17)
78 #define BIOS_EXT1_CHARACTERISTICS_ACPI (1 << 0)
79 #define BIOS_EXT2_CHARACTERISTICS_TARGET (1 << 2)
81 #define BIOS_MEMORY_ECC_SINGLE_BIT_CORRECTING (1 << 3)
82 #define BIOS_MEMORY_ECC_DOUBLE_BIT_CORRECTING (1 << 4)
83 #define BIOS_MEMORY_ECC_SCRUBBING (1 << 5)
85 #define MEMORY_TYPE_DETAIL_OTHER (1 << 1)
86 #define MEMORY_TYPE_DETAIL_UNKNOWN (1 << 2)
87 #define MEMORY_TYPE_DETAIL_FAST_PAGED (1 << 3)
88 #define MEMORY_TYPE_DETAIL_STATIC_COLUMN (1 << 4)
89 #define MEMORY_TYPE_DETAIL_PSEUDO_STATIC (1 << 5)
90 #define MEMORY_TYPE_DETAIL_RAMBUS (1 << 6)
91 #define MEMORY_TYPE_DETAIL_SYNCHRONOUS (1 << 7)
92 #define MEMORY_TYPE_DETAIL_CMOS (1 << 8)
93 #define MEMORY_TYPE_DETAIL_EDO (1 << 9)
94 #define MEMORY_TYPE_DETAIL_WINDOW_DRAM (1 << 10)
95 #define MEMORY_TYPE_DETAIL_CACHE_DRAM (1 << 11)
96 #define MEMORY_TYPE_DETAIL_NON_VOLATILE (1 << 12)
97 #define MEMORY_TYPE_DETAIL_REGISTERED (1 << 13)
98 #define MEMORY_TYPE_DETAIL_UNBUFFERED (1 << 14)
99 #define MEMORY_TYPE_DETAIL_LRDIMM (1 << 15)
101 #define MEMORY_TECHNOLOGY_OTHER 0x01
102 #define MEMORY_TECHNOLOGY_UNKNOWN 0x02
103 #define MEMORY_TECHNOLOGY_DRAM 0x03
104 #define MEMORY_TECHNOLOGY_NVDIMM_N 0x04
105 #define MEMORY_TECHNOLOGY_NVDIMM_F 0x05
106 #define MEMORY_TECHNOLOGY_NVDIMM_P 0x06
107 #define MEMORY_TECHNOLOGY_INTEL_PERSISTENT 0x07
109 #define MEMORY_OPERATING_MODE_CAP_OTHER (1 << 1)
110 #define MEMORY_OPERATING_MODE_CAP_UNKNOWN (1 << 2)
111 #define MEMORY_OPERATING_MODE_CAP_VOLATILE (1 << 3)
112 #define MEMORY_OPERATING_MODE_CAP_BYTE_ACCESS_PERSISTENT (1 << 4)
113 #define MEMORY_OPERATING_MODE_CAP_BLOCK_ACCESS_PERSISTENT (1 << 5)
115 typedef enum {
116 MEMORY_BUS_WIDTH_8 = 0,
117 MEMORY_BUS_WIDTH_16 = 1,
118 MEMORY_BUS_WIDTH_32 = 2,
119 MEMORY_BUS_WIDTH_64 = 3,
120 MEMORY_BUS_WIDTH_128 = 4,
121 MEMORY_BUS_WIDTH_256 = 5,
122 MEMORY_BUS_WIDTH_512 = 6,
123 MEMORY_BUS_WIDTH_1024 = 7,
124 MEMORY_BUS_WIDTH_MAX = 7,
125 } smbios_memory_bus_width;
127 typedef enum {
128 MEMORY_FORMFACTOR_OTHER = 0x01,
129 MEMORY_FORMFACTOR_UNKNOWN = 0x02,
130 MEMORY_FORMFACTOR_SIMM = 0x03,
131 MEMORY_FORMFACTOR_SIP = 0x04,
132 MEMORY_FORMFACTOR_CHIP = 0x05,
133 MEMORY_FORMFACTOR_DIP = 0x06,
134 MEMORY_FORMFACTOR_ZIP = 0x07,
135 MEMORY_FORMFACTOR_PROPRIETARY_CARD = 0x08,
136 MEMORY_FORMFACTOR_DIMM = 0x09,
137 MEMORY_FORMFACTOR_TSOP = 0x0a,
138 MEMORY_FORMFACTOR_ROC = 0x0b,
139 MEMORY_FORMFACTOR_RIMM = 0x0c,
140 MEMORY_FORMFACTOR_SODIMM = 0x0d,
141 MEMORY_FORMFACTOR_SRIMM = 0x0e,
142 MEMORY_FORMFACTOR_FBDIMM = 0x0f,
143 MEMORY_FORMFACTOR_DIE = 0x10,
144 } smbios_memory_form_factor;
146 typedef enum {
147 MEMORY_TYPE_OTHER = 0x01,
148 MEMORY_TYPE_UNKNOWN = 0x02,
149 MEMORY_TYPE_DRAM = 0x03,
150 MEMORY_TYPE_EDRAM = 0x04,
151 MEMORY_TYPE_VRAM = 0x05,
152 MEMORY_TYPE_SRAM = 0x06,
153 MEMORY_TYPE_RAM = 0x07,
154 MEMORY_TYPE_ROM = 0x08,
155 MEMORY_TYPE_FLASH = 0x09,
156 MEMORY_TYPE_EEPROM = 0x0a,
157 MEMORY_TYPE_FEPROM = 0x0b,
158 MEMORY_TYPE_EPROM = 0x0c,
159 MEMORY_TYPE_CDRAM = 0x0d,
160 MEMORY_TYPE_3DRAM = 0x0e,
161 MEMORY_TYPE_SDRAM = 0x0f,
162 MEMORY_TYPE_SGRAM = 0x10,
163 MEMORY_TYPE_RDRAM = 0x11,
164 MEMORY_TYPE_DDR = 0x12,
165 MEMORY_TYPE_DDR2 = 0x13,
166 MEMORY_TYPE_DDR2_FBDIMM = 0x14,
167 MEMORY_TYPE_DDR3 = 0x18,
168 MEMORY_TYPE_FBD2 = 0x19,
169 MEMORY_TYPE_DDR4 = 0x1a,
170 MEMORY_TYPE_LPDDR = 0x1b,
171 MEMORY_TYPE_LPDDR2 = 0x1c,
172 MEMORY_TYPE_LPDDR3 = 0x1d,
173 MEMORY_TYPE_LPDDR4 = 0x1e,
174 MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f,
175 MEMORY_TYPE_HBM = 0x20,
176 MEMORY_TYPE_HBM2 = 0x21,
177 } smbios_memory_type;
179 typedef enum {
180 MEMORY_ARRAY_LOCATION_OTHER = 0x01,
181 MEMORY_ARRAY_LOCATION_UNKNOWN = 0x02,
182 MEMORY_ARRAY_LOCATION_SYSTEM_BOARD = 0x03,
183 MEMORY_ARRAY_LOCATION_ISA_ADD_ON = 0x04,
184 MEMORY_ARRAY_LOCATION_EISA_ADD_ON = 0x05,
185 MEMORY_ARRAY_LOCATION_PCI_ADD_ON = 0x06,
186 MEMORY_ARRAY_LOCATION_MCA_ADD_ON = 0x07,
187 MEMORY_ARRAY_LOCATION_PCMCIA_ADD_ON = 0x08,
188 MEMORY_ARRAY_LOCATION_PROPRIETARY_ADD_ON = 0x09,
189 MEMORY_ARRAY_LOCATION_NUBUS = 0x0a,
190 MEMORY_ARRAY_LOCATION_PC_98_C20_ADD_ON = 0xa0,
191 MEMORY_ARRAY_LOCATION_PC_98_C24_ADD_ON = 0xa1,
192 MEMORY_ARRAY_LOCATION_PC_98_E_ADD_ON = 0xa2,
193 MEMORY_ARRAY_LOCATION_PC_98_LOCAL_BUS_ADD_ON = 0xa3,
194 MEMORY_ARRAY_LOCATION_CXL_FLEXBUS_1_0_ADD_ON = 0xa4,
195 } smbios_memory_array_location;
197 typedef enum {
198 MEMORY_ARRAY_USE_OTHER = 0x01,
199 MEMORY_ARRAY_USE_UNKNOWN = 0x02,
200 MEMORY_ARRAY_USE_SYSTEM = 0x03,
201 MEMORY_ARRAY_USE_VIDEO = 0x04,
202 MEMORY_ARRAY_USE_FLASH = 0x05,
203 MEMORY_ARRAY_USE_NVRAM = 0x06,
204 MEMORY_ARRAY_USE_CACHE = 0x07,
205 } smbios_memory_array_use;
207 typedef enum {
208 MEMORY_ARRAY_ECC_OTHER = 0x01,
209 MEMORY_ARRAY_ECC_UNKNOWN = 0x02,
210 MEMORY_ARRAY_ECC_NONE = 0x03,
211 MEMORY_ARRAY_ECC_PARITY = 0x04,
212 MEMORY_ARRAY_ECC_SINGLE_BIT = 0x05,
213 MEMORY_ARRAY_ECC_MULTI_BIT = 0x06,
214 MEMORY_ARRAY_ECC_CRC = 0x07,
215 } smbios_memory_array_ecc;
217 #define SMBIOS_STATE_SAFE 3
218 typedef enum {
219 SMBIOS_BIOS_INFORMATION = 0,
220 SMBIOS_SYSTEM_INFORMATION = 1,
221 SMBIOS_BOARD_INFORMATION = 2,
222 SMBIOS_SYSTEM_ENCLOSURE = 3,
223 SMBIOS_PROCESSOR_INFORMATION = 4,
224 SMBIOS_CACHE_INFORMATION = 7,
225 SMBIOS_PORT_CONNECTOR_INFORMATION = 8,
226 SMBIOS_SYSTEM_SLOTS = 9,
227 SMBIOS_OEM_STRINGS = 11,
228 SMBIOS_EVENT_LOG = 15,
229 SMBIOS_PHYS_MEMORY_ARRAY = 16,
230 SMBIOS_MEMORY_DEVICE = 17,
231 SMBIOS_MEMORY_ARRAY_MAPPED_ADDRESS = 19,
232 SMBIOS_SYSTEM_BOOT_INFORMATION = 32,
233 SMBIOS_IPMI_DEVICE_INFORMATION = 38,
234 SMBIOS_ONBOARD_DEVICES_EXTENDED_INFORMATION = 41,
235 SMBIOS_END_OF_TABLE = 127,
236 } smbios_struct_type_t;
238 struct smbios_entry {
239 u8 anchor[4];
240 u8 checksum;
241 u8 length;
242 u8 major_version;
243 u8 minor_version;
244 u16 max_struct_size;
245 u8 entry_point_rev;
246 u8 formwatted_area[5];
247 u8 intermediate_anchor_string[5];
248 u8 intermediate_checksum;
249 u16 struct_table_length;
250 u32 struct_table_address;
251 u16 struct_count;
252 u8 smbios_bcd_revision;
253 } __packed;
255 struct smbios_entry30 {
256 u8 anchor[5];
257 u8 checksum;
258 u8 length;
259 u8 major_version;
260 u8 minor_version;
261 u8 smbios_doc_rev;
262 u8 entry_point_rev;
263 u8 reserved;
264 u32 struct_table_length;
265 u64 struct_table_address;
266 } __packed;
268 struct smbios_type0 {
269 u8 type;
270 u8 length;
271 u16 handle;
272 u8 vendor;
273 u8 bios_version;
274 u16 bios_start_segment;
275 u8 bios_release_date;
276 u8 bios_rom_size;
277 u64 bios_characteristics;
278 u8 bios_characteristics_ext1;
279 u8 bios_characteristics_ext2;
280 u8 system_bios_major_release;
281 u8 system_bios_minor_release;
282 u8 ec_major_release;
283 u8 ec_minor_release;
284 u16 extended_bios_rom_size;
285 u8 eos[2];
286 } __packed;
288 struct smbios_type1 {
289 u8 type;
290 u8 length;
291 u16 handle;
292 u8 manufacturer;
293 u8 product_name;
294 u8 version;
295 u8 serial_number;
296 u8 uuid[16];
297 u8 wakeup_type;
298 u8 sku;
299 u8 family;
300 u8 eos[2];
301 } __packed;
303 typedef enum {
304 SMBIOS_BOARD_TYPE_UNKNOWN = 0x01,
305 SMBIOS_BOARD_TYPE_OTHER = 0x02,
306 SMBIOS_BOARD_TYPE_SERVER_BLADE = 0x03,
307 SMBIOS_BOARD_TYPE_CONNECTIVITY_SWITCH = 0x04,
308 SMBIOS_BOARD_TYPE_SYSTEM_MANAGEMENT_MODULE = 0x05,
309 SMBIOS_BOARD_TYPE_PROCESSOR_MODULE = 0x06,
310 SMBIOS_BOARD_TYPE_IO_MODULE = 0x07,
311 SMBIOS_BOARD_TYPE_MEMORY_MODULE = 0x08,
312 SMBIOS_BOARD_TYPE_DAUGHTER_BOARD = 0x09,
313 SMBIOS_BOARD_TYPE_MOTHERBOARD = 0x0a,
314 SMBIOS_BOARD_TYPE_PROCESSOR_MEMORY_MODULE = 0x0b,
315 SMBIOS_BOARD_TYPE_PROCESSOR_IO_MODULE = 0x0c,
316 SMBIOS_BOARD_TYPE_INTERCONNECT_BOARD = 0x0d,
317 } smbios_board_type;
319 struct smbios_type2 {
320 u8 type;
321 u8 length;
322 u16 handle;
323 u8 manufacturer;
324 u8 product_name;
325 u8 version;
326 u8 serial_number;
327 u8 asset_tag;
328 u8 feature_flags;
329 u8 location_in_chassis;
330 u16 chassis_handle;
331 u8 board_type;
332 u8 eos[2];
333 } __packed;
335 typedef enum {
336 SMBIOS_ENCLOSURE_OTHER = 0x01,
337 SMBIOS_ENCLOSURE_UNKNOWN = 0x02,
338 SMBIOS_ENCLOSURE_DESKTOP = 0x03,
339 SMBIOS_ENCLOSURE_LOW_PROFILE_DESKTOP = 0x04,
340 SMBIOS_ENCLOSURE_PIZZA_BOX = 0x05,
341 SMBIOS_ENCLOSURE_MINI_TOWER = 0x06,
342 SMBIOS_ENCLOSURE_TOWER = 0x07,
343 SMBIOS_ENCLOSURE_PORTABLE = 0x08,
344 SMBIOS_ENCLOSURE_LAPTOP = 0x09,
345 SMBIOS_ENCLOSURE_NOTEBOOK = 0x0a,
346 SMBIOS_ENCLOSURE_HAND_HELD = 0x0b,
347 SMBIOS_ENCLOSURE_DOCKING_STATION = 0x0c,
348 SMBIOS_ENCLOSURE_ALL_IN_ONE = 0x0d,
349 SMBIOS_ENCLOSURE_SUB_NOTEBOOK = 0x0e,
350 SMBIOS_ENCLOSURE_SPACE_SAVING = 0x0f,
351 SMBIOS_ENCLOSURE_LUNCH_BOX = 0x10,
352 SMBIOS_ENCLOSURE_MAIN_SERVER_CHASSIS = 0x11,
353 SMBIOS_ENCLOSURE_EXPANSION_CHASSIS = 0x12,
354 SMBIOS_ENCLOSURE_SUBCHASSIS = 0x13,
355 SMBIOS_ENCLOSURE_BUS_EXPANSION_CHASSIS = 0x14,
356 SMBIOS_ENCLOSURE_PERIPHERAL_CHASSIS = 0x15,
357 SMBIOS_ENCLOSURE_RAID_CHASSIS = 0x16,
358 SMBIOS_ENCLOSURE_RACK_MOUNT_CHASSIS = 0x17,
359 SMBIOS_ENCLOSURE_SEALED_CASE_PC = 0x18,
360 SMBIOS_ENCLOSURE_MULTI_SYSTEM_CHASSIS = 0x19,
361 SMBIOS_ENCLOSURE_COMPACT_PCI = 0x1a,
362 SMBIOS_ENCLOSURE_ADVANCED_TCA = 0x1b,
363 SMBIOS_ENCLOSURE_BLADE = 0x1c,
364 SMBIOS_ENCLOSURE_BLADE_ENCLOSURE = 0x1d,
365 SMBIOS_ENCLOSURE_TABLET = 0x1e,
366 SMBIOS_ENCLOSURE_CONVERTIBLE = 0x1f,
367 SMBIOS_ENCLOSURE_DETACHABLE = 0x20,
368 SMBIOS_ENCLOSURE_IOT_GATEWAY = 0x21,
369 SMBIOS_ENCLOSURE_EMBEDDED_PC = 0x22,
370 SMBIOS_ENCLOSURE_MINI_PC = 0x23,
371 SMBIOS_ENCLOSURE_STICK_PC = 0x24,
372 } smbios_enclosure_type;
374 struct smbios_type3 {
375 u8 type;
376 u8 length;
377 u16 handle;
378 u8 manufacturer;
379 u8 _type;
380 u8 version;
381 u8 serial_number;
382 u8 asset_tag_number;
383 u8 bootup_state;
384 u8 power_supply_state;
385 u8 thermal_state;
386 u8 security_status;
387 u32 oem_defined;
388 u8 height;
389 u8 number_of_power_cords;
390 u8 element_count;
391 u8 element_record_length;
392 u8 sku_number;
393 u8 eos[2];
394 } __packed;
396 struct smbios_type4 {
397 u8 type;
398 u8 length;
399 u16 handle;
400 u8 socket_designation;
401 u8 processor_type;
402 u8 processor_family;
403 u8 processor_manufacturer;
404 u32 processor_id[2];
405 u8 processor_version;
406 u8 voltage;
407 u16 external_clock;
408 u16 max_speed;
409 u16 current_speed;
410 u8 status;
411 u8 processor_upgrade;
412 u16 l1_cache_handle;
413 u16 l2_cache_handle;
414 u16 l3_cache_handle;
415 u8 serial_number;
416 u8 asset_tag;
417 u8 part_number;
418 u8 core_count;
419 u8 core_enabled;
420 u8 thread_count;
421 u16 processor_characteristics;
422 u16 processor_family2;
423 u16 core_count2;
424 u16 core_enabled2;
425 u16 thread_count2;
426 u8 eos[2];
427 } __packed;
429 /* defines for smbios_type4 */
431 #define SMBIOS_PROCESSOR_STATUS_POPULATED (1 << 6)
432 #define SMBIOS_PROCESSOR_STATUS_CPU_ENABLED (1 << 0)
434 /* defines for supported_sram_type/current_sram_type */
436 #define SMBIOS_CACHE_SRAM_TYPE_OTHER (1 << 0)
437 #define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN (1 << 1)
438 #define SMBIOS_CACHE_SRAM_TYPE_NON_BURST (1 << 2)
439 #define SMBIOS_CACHE_SRAM_TYPE_BURST (1 << 3)
440 #define SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST (1 << 4)
441 #define SMBIOS_CACHE_SRAM_TYPE_SYNCHRONOUS (1 << 5)
442 #define SMBIOS_CACHE_SRAM_TYPE_ASYNCHRONOUS (1 << 6)
444 /* enum for error_correction_type */
446 enum smbios_cache_error_corr {
447 SMBIOS_CACHE_ERROR_CORRECTION_OTHER = 1,
448 SMBIOS_CACHE_ERROR_CORRECTION_UNKNOWN,
449 SMBIOS_CACHE_ERROR_CORRECTION_NONE,
450 SMBIOS_CACHE_ERROR_CORRECTION_PARITY,
451 SMBIOS_CACHE_ERROR_CORRECTION_SINGLE_BIT,
452 SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT,
455 /* enum for system_cache_type */
457 enum smbios_cache_type {
458 SMBIOS_CACHE_TYPE_OTHER = 1,
459 SMBIOS_CACHE_TYPE_UNKNOWN,
460 SMBIOS_CACHE_TYPE_INSTRUCTION,
461 SMBIOS_CACHE_TYPE_DATA,
462 SMBIOS_CACHE_TYPE_UNIFIED,
465 /* enum for associativity */
467 enum smbios_cache_associativity {
468 SMBIOS_CACHE_ASSOCIATIVITY_OTHER = 1,
469 SMBIOS_CACHE_ASSOCIATIVITY_UNKNOWN,
470 SMBIOS_CACHE_ASSOCIATIVITY_DIRECT,
471 SMBIOS_CACHE_ASSOCIATIVITY_2WAY,
472 SMBIOS_CACHE_ASSOCIATIVITY_4WAY,
473 SMBIOS_CACHE_ASSOCIATIVITY_FULL,
474 SMBIOS_CACHE_ASSOCIATIVITY_8WAY,
475 SMBIOS_CACHE_ASSOCIATIVITY_16WAY,
476 SMBIOS_CACHE_ASSOCIATIVITY_12WAY,
477 SMBIOS_CACHE_ASSOCIATIVITY_24WAY,
478 SMBIOS_CACHE_ASSOCIATIVITY_32WAY,
479 SMBIOS_CACHE_ASSOCIATIVITY_48WAY,
480 SMBIOS_CACHE_ASSOCIATIVITY_64WAY,
481 SMBIOS_CACHE_ASSOCIATIVITY_20WAY,
484 /* defines for cache_configuration */
486 #define SMBIOS_CACHE_CONF_LEVEL(x) ((((x) - 1) & 0x7) << 0)
487 #define SMBIOS_CACHE_CONF_LOCATION(x) (((x) & 0x3) << 5)
488 #define SMBIOS_CACHE_CONF_ENABLED(x) (((x) & 0x1) << 7)
489 #define SMBIOS_CACHE_CONF_OPERATION_MODE(x) (((x) & 0x3) << 8)
491 /* defines for max_cache_size and installed_size */
493 #define SMBIOS_CACHE_SIZE_UNIT_1KB (0 << 15)
494 #define SMBIOS_CACHE_SIZE_UNIT_64KB (1 << 15)
495 #define SMBIOS_CACHE_SIZE_MASK 0x7fff
496 #define SMBIOS_CACHE_SIZE_OVERFLOW 0xffff
498 #define SMBIOS_CACHE_SIZE2_UNIT_1KB (0 << 31)
499 #define SMBIOS_CACHE_SIZE2_UNIT_64KB (1UL << 31)
500 #define SMBIOS_CACHE_SIZE2_MASK 0x7fffffff
502 struct smbios_type7 {
503 u8 type;
504 u8 length;
505 u16 handle;
506 u8 socket_designation;
507 u16 cache_configuration;
508 u16 max_cache_size;
509 u16 installed_size;
510 u16 supported_sram_type;
511 u16 current_sram_type;
512 u8 cache_speed;
513 u8 error_correction_type;
514 u8 system_cache_type;
515 u8 associativity;
516 u32 max_cache_size2;
517 u32 installed_size2;
518 u8 eos[2];
519 } __packed;
521 /* enum for connector types */
522 typedef enum {
523 CONN_NONE = 0x00,
524 CONN_CENTRONICS = 0x01,
525 CONN_MINI_CENTRONICS = 0x02,
526 CONN_PROPRIETARY = 0x03,
527 CONN_DB_25_PIN_MALE = 0x04,
528 CONN_DB_25_PIN_FEMALE = 0x05,
529 CONN_DB_15_PIN_MALE = 0x06,
530 CONN_DB_15_PIN_FEMALE = 0x07,
531 CONN_DB_9_PIN_MALE = 0x08,
532 CONN_DB_9_PIN_FEMALE = 0x09,
533 CONN_RJ_11 = 0x0A,
534 CONN_RJ_45 = 0x0B,
535 CONN_50_PIN_MINI_SCSI = 0x0C,
536 CONN_MINI_DIN = 0x0D,
537 CONN_MICRO_DIN = 0x0E,
538 CONN_PS_2 = 0x0F,
539 CONN_INFRARED = 0x10,
540 CONN_HP_HIL = 0x11,
541 CONN_ACCESS_BUS_USB = 0x12,
542 CONN_SSA_SCSI = 0x13,
543 CONN_CIRCULAR_DIN_8_MALE = 0x14,
544 CONN_CIRCULAR_DIN_8_FEMALE = 0x15,
545 CONN_ON_BOARD_IDE = 0x16,
546 CONN_ON_BOARD_FLOPPY = 0x17,
547 CONN_9_PIN_DUAL_INLINE = 0x18,
548 CONN_25_PIN_DUAL_INLINE = 0x19,
549 CONN_50_PIN_DUAL_INLINE = 0x1A,
550 CONN_68_PIN_DUAL_INLINE = 0x1B,
551 CONN_ON_BOARD_SOUND_INPUT_FROM_CD_ROM = 0x1C,
552 CONN_MINI_CENTRONICS_TYPE14 = 0x1D,
553 CONN_MINI_CENTRONICS_TYPE26 = 0x1E,
554 CONN_MINI_JACK_HEADPHONES = 0x1F,
555 CONN_BNC = 0x20,
556 CONN_1394 = 0x21,
557 CONN_SAS_SATA = 0x22,
558 CONN_USB_TYPE_C = 0x23,
559 CONN_PC_98 = 0xA0,
560 CONN_PC_98_HIRESO = 0xA1,
561 CONN_PC_H98 = 0xA2,
562 CONN_PC98_NOTE = 0xA3,
563 CONN_PC_98_FULL = 0xA4,
564 CONN_OTHER = 0xFF,
565 } type8_connector_types;
567 /* enum for port types */
568 typedef enum {
569 TYPE_NONE_PORT = 0x00,
570 TYPE_PARALLEL_PORT_XT_AT_COMPATIBLE = 0x01,
571 TYPE_PARALLEL_PORT_PS_2 = 0x02,
572 TYPE_PARALLEL_PORT_ECP = 0x03,
573 TYPE_PARALLEL_PORT_EPP = 0x04,
574 TYPE_PARALLEL_PORT_ECP_EPP = 0x05,
575 TYPE_SERIAL_PORT_XT_AT_COMPATIBLE = 0x06,
576 TYPE_SERIAL_PORT_16450_COMPATIBLE = 0x07,
577 TYPE_SERIAL_PORT_16550_COMPATIBLE = 0x08,
578 TYPE_SERIAL_PORT_16550A_COMPATIBLE = 0x09,
579 TYPE_SCSI_PORT = 0x0A,
580 TYPE_MIDI_PORT = 0x0B,
581 TYPE_JOY_STICK_PORT = 0x0C,
582 TYPE_KEYBOARD_PORT = 0x0D,
583 TYPE_MOUSE_PORT = 0x0E,
584 TYPE_SSA_SCSI = 0x0F,
585 TYPE_USB = 0x10,
586 TYPE_FIREWIRE_IEEE_P1394 = 0x11,
587 TYPE_PCMCIA_TYPE_I = 0x12,
588 TYPE_PCMCIA_TYPE_II = 0x13,
589 TYPE_PCMCIA_TYPE_III = 0x14,
590 TYPE_CARDBUS = 0x15,
591 TYPE_ACCESS_BUS_PORT = 0x16,
592 TYPE_SCSI_II = 0x17,
593 TYPE_SCSI_WIDE = 0x18,
594 TYPE_PC_98 = 0x19,
595 TYPE_PC_98_HIRESO = 0x1A,
596 TYPE_PC_H98 = 0x1B,
597 TYPE_VIDEO_PORT = 0x1C,
598 TYPE_AUDIO_PORT = 0x1D,
599 TYPE_MODEM_PORT = 0x1E,
600 TYPE_NETWORK_PORT = 0x1F,
601 TYPE_SATA = 0x20,
602 TYPE_SAS = 0x21,
603 TYPE_MFDP = 0x22,
604 TYPE_THUNDERBOLT = 0x23,
605 TYPE_8251_COMPATIBLE = 0xA0,
606 TYPE_8251_FIFO_COMPATIBLE = 0xA1,
607 TYPE_OTHER_PORT = 0xFF,
608 } type8_port_types;
610 struct port_information {
611 const char *internal_reference_designator;
612 type8_connector_types internal_connector_type;
613 const char *external_reference_designator;
614 type8_connector_types external_connector_type;
615 type8_port_types port_type;
618 struct smbios_type8 {
619 u8 type;
620 u8 length;
621 u16 handle;
622 u8 internal_reference_designator;
623 u8 internal_connector_type;
624 u8 external_reference_designator;
625 u8 external_connector_type;
626 u8 port_type;
627 u8 eos[2];
628 } __packed;
630 /* System Slots - Slot Type */
631 enum misc_slot_type {
632 SlotTypeOther = 0x01,
633 SlotTypeUnknown = 0x02,
634 SlotTypeIsa = 0x03,
635 SlotTypeMca = 0x04,
636 SlotTypeEisa = 0x05,
637 SlotTypePci = 0x06,
638 SlotTypePcmcia = 0x07,
639 SlotTypeVlVesa = 0x08,
640 SlotTypeProprietary = 0x09,
641 SlotTypeProcessorCardSlot = 0x0A,
642 SlotTypeProprietaryMemoryCardSlot = 0x0B,
643 SlotTypeIORiserCardSlot = 0x0C,
644 SlotTypeNuBus = 0x0D,
645 SlotTypePci66MhzCapable = 0x0E,
646 SlotTypeAgp = 0x0F,
647 SlotTypeApg2X = 0x10,
648 SlotTypeAgp4X = 0x11,
649 SlotTypePciX = 0x12,
650 SlotTypeAgp8X = 0x13,
651 SlotTypeM2Socket1_DP = 0x14,
652 SlotTypeM2Socket1_SD = 0x15,
653 SlotTypeM2Socket2 = 0x16,
654 SlotTypeM2Socket3 = 0x17,
655 SlotTypeMxmTypeI = 0x18,
656 SlotTypeMxmTypeII = 0x19,
657 SlotTypeMxmTypeIIIStandard = 0x1A,
658 SlotTypeMxmTypeIIIHe = 0x1B,
659 SlotTypeMxmTypeIV = 0x1C,
660 SlotTypeMxm30TypeA = 0x1D,
661 SlotTypeMxm30TypeB = 0x1E,
662 SlotTypePciExpressGen2Sff_8639 = 0x1F,
663 SlotTypePciExpressGen3Sff_8639 = 0x20,
664 SlotTypePciExpressMini52pinWithBSKO = 0x21,
665 SlotTypePciExpressMini52pinWithoutBSKO = 0x22,
666 SlotTypePciExpressMini76pin = 0x23,
667 SlotTypePC98C20 = 0xA0,
668 SlotTypePC98C24 = 0xA1,
669 SlotTypePC98E = 0xA2,
670 SlotTypePC98LocalBus = 0xA3,
671 SlotTypePC98Card = 0xA4,
672 SlotTypePciExpress = 0xA5,
673 SlotTypePciExpressX1 = 0xA6,
674 SlotTypePciExpressX2 = 0xA7,
675 SlotTypePciExpressX4 = 0xA8,
676 SlotTypePciExpressX8 = 0xA9,
677 SlotTypePciExpressX16 = 0xAA,
678 SlotTypePciExpressGen2 = 0xAB,
679 SlotTypePciExpressGen2X1 = 0xAC,
680 SlotTypePciExpressGen2X2 = 0xAD,
681 SlotTypePciExpressGen2X4 = 0xAE,
682 SlotTypePciExpressGen2X8 = 0xAF,
683 SlotTypePciExpressGen2X16 = 0xB0,
684 SlotTypePciExpressGen3 = 0xB1,
685 SlotTypePciExpressGen3X1 = 0xB2,
686 SlotTypePciExpressGen3X2 = 0xB3,
687 SlotTypePciExpressGen3X4 = 0xB4,
688 SlotTypePciExpressGen3X8 = 0xB5,
689 SlotTypePciExpressGen3X16 = 0xB6,
690 SlotTypePciExpressGen4 = 0xB8,
691 SlotTypePciExpressGen4x1 = 0xB9,
692 SlotTypePciExpressGen4x2 = 0xBA,
693 SlotTypePciExpressGen4x4 = 0xBB,
694 SlotTypePciExpressGen4x8 = 0xBC,
695 SlotTypePciExpressGen4x16 = 0xBD
698 /* System Slots - Slot Data Bus Width. */
699 enum slot_data_bus_bandwidth {
700 SlotDataBusWidthOther = 0x01,
701 SlotDataBusWidthUnknown = 0x02,
702 SlotDataBusWidth8Bit = 0x03,
703 SlotDataBusWidth16Bit = 0x04,
704 SlotDataBusWidth32Bit = 0x05,
705 SlotDataBusWidth64Bit = 0x06,
706 SlotDataBusWidth128Bit = 0x07,
707 SlotDataBusWidth1X = 0x08,
708 SlotDataBusWidth2X = 0x09,
709 SlotDataBusWidth4X = 0x0A,
710 SlotDataBusWidth8X = 0x0B,
711 SlotDataBusWidth12X = 0x0C,
712 SlotDataBusWidth16X = 0x0D,
713 SlotDataBusWidth32X = 0x0E
716 /* System Slots - Current Usage. */
717 enum misc_slot_usage {
718 SlotUsageOther = 0x01,
719 SlotUsageUnknown = 0x02,
720 SlotUsageAvailable = 0x03,
721 SlotUsageInUse = 0x04,
722 SlotUsageUnavailable = 0x05
725 /* System Slots - Slot Length.*/
726 enum misc_slot_length {
727 SlotLengthOther = 0x01,
728 SlotLengthUnknown = 0x02,
729 SlotLengthShort = 0x03,
730 SlotLengthLong = 0x04
733 /* System Slots - Slot Characteristics 1. */
734 #define SMBIOS_SLOT_UNKNOWN (1 << 0)
735 #define SMBIOS_SLOT_5V (1 << 1)
736 #define SMBIOS_SLOT_3P3V (1 << 2)
737 #define SMBIOS_SLOT_SHARED (1 << 3)
738 #define SMBIOS_SLOT_PCCARD_16 (1 << 4)
739 #define SMBIOS_SLOT_PCCARD_CARDBUS (1 << 5)
740 #define SMBIOS_SLOT_PCCARD_ZOOM (1 << 6)
741 #define SMBIOS_SLOT_PCCARD_MODEM_RING (1 << 7)
742 /* System Slots - Slot Characteristics 2. */
743 #define SMBIOS_SLOT_PME (1 << 0)
744 #define SMBIOS_SLOT_HOTPLUG (1 << 1)
745 #define SMBIOS_SLOT_SMBUS (1 << 2)
746 #define SMBIOS_SLOT_BIFURCATION (1 << 3)
748 struct slot_peer_groups {
749 u16 peer_seg_num;
750 u8 peer_bus_num;
751 u8 peer_dev_fn_num;
752 u8 peer_data_bus_width;
753 } __packed;
755 struct smbios_type9 {
756 u8 type;
757 u8 length;
758 u16 handle;
759 u8 slot_designation;
760 u8 slot_type;
761 u8 slot_data_bus_width;
762 u8 current_usage;
763 u8 slot_length;
764 u16 slot_id;
765 u8 slot_characteristics_1;
766 u8 slot_characteristics_2;
767 u16 segment_group_number;
768 u8 bus_number;
769 u8 device_function_number;
770 u8 data_bus_width;
771 u8 peer_group_count;
772 struct slot_peer_groups peer[0];
773 u8 eos[2];
774 } __packed;
776 struct smbios_type11 {
777 u8 type;
778 u8 length;
779 u16 handle;
780 u8 count;
781 u8 eos[2];
782 } __packed;
784 struct smbios_type15 {
785 u8 type;
786 u8 length;
787 u16 handle;
788 u16 area_length;
789 u16 header_offset;
790 u16 data_offset;
791 u8 access_method;
792 u8 log_status;
793 u32 change_token;
794 u32 address;
795 u8 header_format;
796 u8 log_type_descriptors;
797 u8 log_type_descriptor_length;
798 u8 eos[2];
799 } __packed;
801 enum {
802 SMBIOS_EVENTLOG_ACCESS_METHOD_IO8 = 0,
803 SMBIOS_EVENTLOG_ACCESS_METHOD_IO8X2,
804 SMBIOS_EVENTLOG_ACCESS_METHOD_IO16,
805 SMBIOS_EVENTLOG_ACCESS_METHOD_MMIO32,
806 SMBIOS_EVENTLOG_ACCESS_METHOD_GPNV,
809 enum {
810 SMBIOS_EVENTLOG_STATUS_VALID = 1, /* Bit 0 */
811 SMBIOS_EVENTLOG_STATUS_FULL = 2, /* Bit 1 */
814 struct smbios_type16 {
815 u8 type;
816 u8 length;
817 u16 handle;
818 u8 location;
819 u8 use;
820 u8 memory_error_correction;
821 u32 maximum_capacity;
822 u16 memory_error_information_handle;
823 u16 number_of_memory_devices;
824 u64 extended_maximum_capacity;
825 u8 eos[2];
826 } __packed;
828 struct smbios_type17 {
829 u8 type;
830 u8 length;
831 u16 handle;
832 u16 phys_memory_array_handle;
833 u16 memory_error_information_handle;
834 u16 total_width;
835 u16 data_width;
836 u16 size;
837 u8 form_factor;
838 u8 device_set;
839 u8 device_locator;
840 u8 bank_locator;
841 u8 memory_type;
842 u16 type_detail;
843 u16 speed;
844 u8 manufacturer;
845 u8 serial_number;
846 u8 asset_tag;
847 u8 part_number;
848 u8 attributes;
849 u32 extended_size;
850 u16 clock_speed;
851 u16 minimum_voltage;
852 u16 maximum_voltage;
853 u16 configured_voltage;
854 u8 eos[2];
855 } __packed;
857 struct smbios_type19 {
858 u8 type;
859 u8 length;
860 u16 handle;
861 u32 starting_address;
862 u32 ending_address;
863 u16 memory_array_handle;
864 u8 partition_width;
865 u64 extended_starting_address;
866 u64 extended_ending_address;
867 u8 eos[2];
868 } __packed;
870 struct smbios_type32 {
871 u8 type;
872 u8 length;
873 u16 handle;
874 u8 reserved[6];
875 u8 boot_status;
876 u8 eos[2];
877 } __packed;
879 struct smbios_type38 {
880 u8 type;
881 u8 length;
882 u16 handle;
883 u8 interface_type;
884 u8 ipmi_rev;
885 u8 i2c_slave_addr;
886 u8 nv_storage_addr;
887 u64 base_address;
888 u8 base_address_modifier;
889 u8 irq;
890 u8 eos[2];
891 } __packed;
893 enum smbios_bmc_interface_type {
894 SMBIOS_BMC_INTERFACE_UNKNOWN = 0,
895 SMBIOS_BMC_INTERFACE_KCS,
896 SMBIOS_BMC_INTERFACE_SMIC,
897 SMBIOS_BMC_INTERFACE_BLOCK,
898 SMBIOS_BMC_INTERFACE_SMBUS,
901 typedef enum {
902 SMBIOS_DEVICE_TYPE_OTHER = 0x01,
903 SMBIOS_DEVICE_TYPE_UNKNOWN,
904 SMBIOS_DEVICE_TYPE_VIDEO,
905 SMBIOS_DEVICE_TYPE_SCSI,
906 SMBIOS_DEVICE_TYPE_ETHERNET,
907 SMBIOS_DEVICE_TYPE_TOKEN_RING,
908 SMBIOS_DEVICE_TYPE_SOUND,
909 SMBIOS_DEVICE_TYPE_PATA,
910 SMBIOS_DEVICE_TYPE_SATA,
911 SMBIOS_DEVICE_TYPE_SAS,
912 } smbios_onboard_device_type;
914 #define SMBIOS_DEVICE_TYPE_COUNT 10
916 struct smbios_type41 {
917 u8 type;
918 u8 length;
919 u16 handle;
920 u8 reference_designation;
921 u8 device_type: 7;
922 u8 device_status: 1;
923 u8 device_type_instance;
924 u16 segment_group_number;
925 u8 bus_number;
926 u8 function_number: 3;
927 u8 device_number: 5;
928 u8 eos[2];
929 } __packed;
931 struct smbios_type127 {
932 u8 type;
933 u8 length;
934 u16 handle;
935 u8 eos[2];
936 } __packed;
938 void smbios_fill_dimm_manufacturer_from_id(uint16_t mod_id,
939 struct smbios_type17 *t);
940 void smbios_fill_dimm_locator(const struct dimm_info *dimm,
941 struct smbios_type17 *t);
943 smbios_board_type smbios_mainboard_board_type(void);
944 smbios_enclosure_type smbios_mainboard_enclosure_type(void);
946 #endif