mb/google/soraka: Fine-tune USB 2.0 port4
[coreboot.git] / src / lib / libgcc.c
blob369346cd7ddfe61d52aa8d4dfe976fc570b1a923
1 /*
2 * This file is part of the coreboot project.
4 * Copyright 2015 Google Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <types.h>
19 * Provide platform-independent backend implementation for __builtin_clz() in
20 * <lib.h> in case GCC does not have an assembly version for this arch.
23 #if !IS_ENABLED(CONFIG_ARCH_X86) /* work around lack of --gc-sections on x86 */
24 int __clzsi2(u32 a);
25 int __clzsi2(u32 a)
27 static const u8 four_bit_table[] = {
28 [0x0] = 4, [0x1] = 3, [0x2] = 2, [0x3] = 2,
29 [0x4] = 1, [0x5] = 1, [0x6] = 1, [0x7] = 1,
30 [0x8] = 0, [0x9] = 0, [0xa] = 0, [0xb] = 0,
31 [0xc] = 0, [0xd] = 0, [0xe] = 0, [0xf] = 0,
33 int r = 0;
35 if (!(a & (0xffff << 16))) {
36 r += 16;
37 a <<= 16;
40 if (!(a & (0xff << 24))) {
41 r += 8;
42 a <<= 8;
45 if (!(a & (0xf << 28))) {
46 r += 4;
47 a <<= 4;
50 return r + four_bit_table[a >> 28];
52 #endif