src/soc/rockchip/rk3399/tsadc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <device/mmio.h>
  16 #include <delay.h>
  17 #include <soc/clock.h>
  18 #include <soc/grf.h>
  19 #include <soc/tsadc.h>
  20 #include <stdint.h>
  21
  22 struct rk3399_tsadc_regs {
  23         u32     user_con;
  24         u32     auto_con;
  25         u32     int_en;
  26         u32     int_pd;
  27         u32     reserved0[(0x20 - 0x10) / 4];
  28         u32     data0;
  29         u32     data1;
  30         u32     data2;
  31         u32     data3;
  32         u32     comp0_int;
  33         u32     comp1_int;
  34         u32     comp2_int;
  35         u32     comp3_int;
  36         u32     comp0_shut;
  37         u32     comp1_shut;
  38         u32     comp2_shut;
  39         u32     comp3_shut;
  40         u32     reserved1[(0x60 - 0x50) / 4];
  41         u32     hight_int_debounce;
  42         u32     hight_tshut_debounce;
  43         u32     auto_period;
  44         u32     auto_period_ht;
  45 };
  46 check_member(rk3399_tsadc_regs, auto_period_ht, 0x6c);
  47
  48 /* user_con */
  49 #define ADC_POWER_CTRL  (1 << 3)
  50 #define START_MODE      (1 << 4)
  51 #define START_SHIFT     5
  52 #define START_MASK      1
  53 #define INTER_PD_SHIFT  6
  54 #define INTER_PD_MASK   0x3f
  55
  56 /* auto_con */
  57 #define LAST_TSHUT      (1 << 24)
  58 #define SRC3_EN         (1 << 7)
  59 #define SRC2_EN         (1 << 6)
  60 #define SRC1_EN         (1 << 5)
  61 #define SRC0_EN         (1 << 4)
  62 #define Q_SEL           (1 << 1)
  63 #define AUTO_EN         (1 << 0)
  64
  65 /* int_en */
  66 #define TSHUT_CRU_EN_SRC3       (1 << 11)
  67 #define TSHUT_CRU_EN_SRC2       (1 << 10)
  68 #define TSHUT_CRU_EN_SRC1       (1 << 9)
  69 #define TSHUT_CRU_EN_SRC0       (1 << 8)
  70 #define TSHUT_GPIO_EN_SRC3      (1 << 7)
  71 #define TSHUT_GPIO_EN_SRC2      (1 << 6)
  72 #define TSHUT_GPIO_EN_SRC1      (1 << 5)
  73 #define TSHUT_GPIO_EN_SRC0      (1 << 4)
  74
  75 #define AUTO_PERIOD             187500 /* 250ms */
  76 #define AUTO_DEBOUNCE           4
  77 #define AUTO_PERIOD_HT          37500 /* 50ms */
  78 #define AUTO_DEBOUNCE_HT        4
  79 #define TSADC_CLOCK_HZ          (750 * KHz)
  80
  81 /* AD value, correspond to 120 degrees Celsius,
  82  * Please refer shut value table in:
  83  * https://patchwork.kernel.org/patch/8908411/
  84  * A quick ref:
  85  * {573, 60000}, {599, 75000}, {616, 85000}, {633, 95000},
  86  * {642, 100000}, {659, 110000}, {677, 120000}, {685, 125000}
  87  */
  88 #define TSADC_SHUT_VALUE        677
  89
  90 #define GRF_TSADC_TSEN_PD0_ON   RK_SETBITS(0)
  91 #define GRF_TSADC_TSEN_PD0_OFF  RK_CLRBITS(0)
  92 #define GRF_SARADC_TSEN_ON      RK_SETBITS(0)
  93
  94 struct rk3399_tsadc_regs *rk3399_tsadc = (void *)TSADC_BASE;
  95
  96 void tsadc_init(uint32_t polarity)
  97 {
  98         rkclk_configure_tsadc(TSADC_CLOCK_HZ);
  99
 100         /* tsadc power sequence */
 101         clrbits32(&rk3399_tsadc->user_con, ADC_POWER_CTRL);
 102         write32(&rk3399_grf->tsadc_testbit_l, GRF_TSADC_TSEN_PD0_ON);
 103         udelay(50);
 104         write32(&rk3399_grf->tsadc_testbit_l, GRF_TSADC_TSEN_PD0_OFF);
 105         udelay(20);
 106         write32(&rk3399_grf->saradc_testbit, GRF_SARADC_TSEN_ON);
 107         udelay(100);
 108
 109         /* set the tshut polarity */
 110         write32(&rk3399_tsadc->auto_con, polarity);
 111
 112         /* setup the automatic mode:
 113          * AUTO_PERIOD: interleave between every two accessing of TSADC
 114          * AUTO_DEBOUNCE: only generate interrupt or TSHUT when temperature
 115          *                is higher than COMP_INT for "debounce" times
 116          * AUTO_PERIOD_HT: the interleave between every two accessing after the
 117          *                 temperature is higher than COMP_SHUT or COMP_INT
 118          * AUTO_DEBOUNCE_HT: only generate interrupt or TSHUT when temperature
 119          *                   is higher than COMP_SHUT for "debounce" times.
 120          */
 121         write32(&rk3399_tsadc->auto_period, AUTO_PERIOD);
 122         write32(&rk3399_tsadc->hight_int_debounce, AUTO_DEBOUNCE);
 123         write32(&rk3399_tsadc->auto_period_ht, AUTO_PERIOD_HT);
 124         write32(&rk3399_tsadc->hight_tshut_debounce, AUTO_DEBOUNCE_HT);
 125         /* Enable the src0, negative temperature coefficient */
 126         setbits32(&rk3399_tsadc->auto_con, Q_SEL | SRC0_EN);
 127         udelay(100);
 128         setbits32(&rk3399_tsadc->auto_con, AUTO_EN);
 129
 130         write32(&rk3399_tsadc->comp0_shut, TSADC_SHUT_VALUE);
 131         write32(&rk3399_tsadc->int_en, TSHUT_CRU_EN_SRC0 | TSHUT_GPIO_EN_SRC0);
 132
 133         /* Set the tsadc_int pinmux */
 134         write32(&rk3399_pmugrf->tsadc_int, IOMUX_TSADC_INT);
 135 }