src/soc/nvidia/tegra210/arm_tf.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <arch/cache.h>
  16 #include <assert.h>
  17 #include <bl31.h>
  18 #include <soc/addressmap.h>
  19 #include <soc/console_uart.h>
  20 #include <symbols.h>
  21 #include <types.h>
  22
  23 typedef struct bl31_plat_params {
  24         /* TZ memory size */
  25         uint64_t tzdram_size;
  26         /* TZ memory base */
  27         uint64_t tzdram_base;
  28         /* UART port ID */
  29         int uart_id;
  30 } bl31_plat_params_t;
  31
  32 static bl31_plat_params_t t210_plat_params;
  33
  34 void *soc_get_bl31_plat_params(void)
  35 {
  36         uintptr_t tz_base_mib;
  37         size_t tz_size_mib;
  38         int uart_id = 0;
  39
  40         carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib);
  41
  42         assert(tz_size_mib < 4096);
  43
  44         switch (console_uart_get_id()) {
  45         case UART_ID_NONE:
  46                 break;
  47         case UART_ID_A:
  48                 uart_id = 1;
  49                 break;
  50         case UART_ID_B:
  51                 uart_id = 2;
  52                 break;
  53         case UART_ID_C:
  54                 uart_id = 3;
  55                 break;
  56         case UART_ID_D:
  57                 uart_id = 4;
  58                 break;
  59         case UART_ID_E:
  60                 uart_id = 5;
  61                 break;
  62         }
  63
  64         t210_plat_params.tzdram_size = tz_size_mib * MiB;
  65         t210_plat_params.tzdram_base = tz_base_mib * MiB;
  66         t210_plat_params.uart_id = uart_id;
  67
  68         dcache_clean_by_mva(&t210_plat_params, sizeof(t210_plat_params));
  69
  70         return &t210_plat_params;
  71 }