soc: Remove copyright notices
[coreboot.git] / src / soc / mediatek / mt8173 / gpio_init.c
blob155c09ddf53d95f349f0ec1bf42fa584ebb50494
1 /*
2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <device/mmio.h>
16 #include <soc/gpio.h>
17 #include <soc/mipi.h>
20 * GPIO 47-56 are controlled by MIPI register by default.
21 * When they are used as GPI, we have to set IES of MIPI register to 1.
22 * Additionally, pulls of these pins are controlled by MIPI,
23 * and pull-setting of these pins are forbidden in our driver.
25 static void set_gpi_from_mipi(void)
27 setbits32(&mt8173_mipi->mipi_rx_ana4c,
28 1 << 0 | /* RG_MIPI_GPI0_IES GPI47 */
29 1 << 6 | /* RG_MIPI_GPI1_IES GPI48 */
30 1 << 12 | /* RG_MIPI_GPI2_IES GPI49 */
31 1 << 18 | /* RG_MIPI_GPI3_IES GPI50 */
32 1 << 24); /* RF_MIPI_GPI4_IES GPI51 */
34 setbits32(&mt8173_mipi->mipi_rx_ana50,
35 1 << 0 | /* RG_MIPI_GPI5_IES GPI52 */
36 1 << 6 | /* RG_MIPI_GPI6_IES GPI53 */
37 1 << 12 | /* RG_MIPI_GPI7_IES GPI54 */
38 1 << 18 | /* RG_MIPI_GPI8_IES GPI55 */
39 1 << 24); /* RF_MIPI_GPI9_IES GPI56 */
43 * overwrite the T/RDSEL default value of exmd_ctrl and
44 * msdc2_ctrl5 as b'1010
46 static void gpio_set_duty(enum external_power ext_power)
48 /* EXMD control reg */
49 if (ext_power == GPIO_EINT_1P8V) {
50 /* exmd_ctrl[9:4] = b`000000, [3:0] = b`1010 */
51 write16(&mtk_gpio->exmd_ctrl[0].rst, 0x3F5);
52 write16(&mtk_gpio->exmd_ctrl[0].set, 0xA);
53 } else if (ext_power == GPIO_EINT_3P3V) {
54 /* exmd_ctrl[9:4] = b`001100, [3:0] = b`1010 */
55 write16(&mtk_gpio->exmd_ctrl[0].rst, 0x335);
56 write16(&mtk_gpio->exmd_ctrl[0].set, 0xCA);
59 /* other R/TDSEL */
60 /* msdc2_ctrl5, bit[3:0] = b`1010 */
61 write16(&mtk_gpio->msdc2_ctrl5.set, 0xA);
62 write16(&mtk_gpio->msdc2_ctrl5.rst, 0x5);
65 void gpio_init(enum external_power ext_power)
67 set_gpi_from_mipi();
68 gpio_set_duty(ext_power);