src/soc/mediatek/mt8173/Makefile.inc

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ##
   5 ## This program is free software; you can redistribute it and/or modify
   6 ## it under the terms of the GNU General Public License as published by
   7 ## the Free Software Foundation; version 2 of the License.
   8 ##
   9 ## This program is distributed in the hope that it will be useful,
  10 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 ## GNU General Public License for more details.
  13 ##
  14
  15 ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y)
  16
  17 bootblock-y += bootblock.c
  18 bootblock-$(CONFIG_SPI_FLASH) += flash_controller.c
  19 bootblock-y += ../common/i2c.c i2c.c
  20 bootblock-y += ../common/pll.c pll.c
  21 bootblock-y += ../common/spi.c spi.c
  22 bootblock-y += ../common/timer.c
  23 bootblock-y += timer.c
  24
  25 bootblock-y += ../common/uart.c
  26
  27 bootblock-y += ../common/gpio.c gpio.c gpio_init.c
  28 bootblock-y +=  ../common/pmic_wrap.c pmic_wrap.c mt6391.c
  29 bootblock-y += ../common/wdt.c ../common/reset.c
  30 bootblock-y += ../common/mmu_operations.c mmu_operations.c
  31
  32 ################################################################################
  33
  34 verstage-y += ../common/i2c.c i2c.c
  35 verstage-y += ../common/spi.c spi.c
  36
  37 verstage-y += ../common/uart.c
  38
  39 verstage-y += ../common/timer.c
  40 verstage-y += timer.c
  41 verstage-y += ../common/wdt.c ../common/reset.c
  42 verstage-$(CONFIG_SPI_FLASH) += flash_controller.c
  43 verstage-y += ../common/gpio.c gpio.c
  44
  45 ################################################################################
  46
  47 romstage-$(CONFIG_SPI_FLASH) += flash_controller.c
  48 romstage-y += ../common/pll.c pll.c
  49 romstage-y += ../common/timer.c
  50 romstage-y += timer.c
  51 romstage-y += ../common/i2c.c i2c.c
  52
  53 romstage-y += ../common/uart.c
  54 romstage-y += ../common/cbmem.c
  55 romstage-y += ../common/gpio.c gpio.c
  56 romstage-y += ../common/spi.c spi.c
  57 romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c
  58 romstage-y += memory.c
  59 romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c
  60 romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
  61 romstage-y += ../common/mmu_operations.c mmu_operations.c
  62 romstage-y += ../common/rtc.c rtc.c
  63
  64 ################################################################################
  65
  66 ramstage-y += emi.c
  67 ramstage-y += ../common/spi.c spi.c
  68 ramstage-$(CONFIG_SPI_FLASH) += flash_controller.c
  69 ramstage-y += soc.c ../common/mtcmos.c
  70 ramstage-y += ../common/timer.c
  71 ramstage-y += timer.c
  72 ramstage-y += ../common/uart.c
  73 ramstage-y += ../common/i2c.c i2c.c
  74 ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c
  75 ramstage-y += mt6311.c
  76 ramstage-y += da9212.c
  77 ramstage-y += ../common/gpio.c gpio.c
  78 ramstage-y += ../common/wdt.c ../common/reset.c
  79 ramstage-y += ../common/pll.c pll.c
  80 ramstage-y += ../common/rtc.c rtc.c
  81
  82 ramstage-y += ../common/usb.c usb.c
  83
  84 ramstage-y += ../common/ddp.c ddp.c
  85 ramstage-y += ../common/dsi.c dsi.c
  86
  87 BL31_MAKEARGS += PLAT=mt8173
  88
  89 ################################################################################
  90
  91 # Generate the actual coreboot bootblock code
  92 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
  93         ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@
  94
  95 CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include
  96 CPPFLAGS_common += -Isrc/soc/mediatek/common/include
  97
  98 endif