src/soc/mediatek/common/mmu_operations.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <arch/mmu.h>
  16 #include <symbols.h>
  17 #include <soc/emi.h>
  18 #include <soc/mmu_operations.h>
  19
  20 __weak void mtk_soc_after_dram(void) { /* do nothing */ }
  21
  22 void mtk_mmu_init(void)
  23 {
  24         mmu_init();
  25
  26         /*
  27          * Set 0x0 to 4GB address as device memory. We want to config IO_PHYS
  28          * address to DEV_MEM, and map a proper range of dram for the memory
  29          * test during calibration.
  30          */
  31         mmu_config_range((void *)0, (uintptr_t)4U * GiB, DEV_MEM);
  32
  33         /* SRAM is cached */
  34         mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);
  35
  36         /* L2C SRAM is cached */
  37         mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), SECURE_CACHED_MEM);
  38
  39         /* DMA is non-cached and is reserved for TPM & da9212 I2C DMA */
  40         mmu_config_range(_dma_coherent, REGION_SIZE(dma_coherent),
  41                          SECURE_UNCACHED_MEM);
  42
  43         mmu_enable();
  44 }
  45
  46 void mtk_mmu_after_dram(void)
  47 {
  48         /* Map DRAM as cached now that it's up and running */
  49         mmu_config_range(_dram, (uintptr_t)sdram_size(), NONSECURE_CACHED_MEM);
  50
  51         mtk_soc_after_dram();
  52 }
  53
  54 void mtk_mmu_disable_l2c_sram(void)
  55 {
  56         /* Unmap L2C SRAM so it can be reclaimed by L2 cache */
  57         /* TODO: Implement true unmapping, and also use it for the zero-page! */
  58         mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), DEV_MEM);
  59
  60         /* Careful: changing cache geometry while it's active is a bad idea! */
  61         mmu_disable();
  62
  63         mtk_soc_disable_l2c_sram();
  64
  65         /* Reenable MMU with now enlarged L2 cache. Page tables still valid. */
  66         mmu_enable();
  67 }