src/soc/intel/skylake/p2sb.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <console/console.h>
  16 #include <intelblocks/p2sb.h>
  17
  18 void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count)
  19 {
  20         uint32_t mask;
  21
  22         if (count != P2SB_EP_MASK_MAX_REG) {
  23                 printk(BIOS_ERR, "Unable to program EPMASK registers\n");
  24                 return;
  25         }
  26
  27         /*
  28          * Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband
  29          * access for PCI Root Bridge.
  30          * Set p2sb PCI offset EPMASK5 [17, 16,10, 1] to disable Sideband
  31          * access for MIPI controller.
  32          */
  33         mask = (1 << 29) | (1 << 28) | (1 << 27) | (1 << 26) | (1 << 17) |
  34                          (1 << 16) | (1 << 10) | (1 << 1);
  35
  36         ep_mask[P2SB_EP_MASK_5_REG] = mask;
  37
  38         /*
  39          * Set p2sb PCI offset EPMASK7 [6, 5] to disable Sideband
  40          * access for XHCI controller.
  41          */
  42         mask = (1 << 6) | (1 << 5);
  43
  44         ep_mask[P2SB_EP_MASK_7_REG] = mask;
  45 }