2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 /* Intel PCH PCIe support */
17 Method (IRQM, 1, Serialized) {
19 /* Interrupt Map INTA->INTA, INTB->INTB, INTC->INTC, INTD->INTD */
20 Name (IQAA, Package () {
21 Package () { 0x0000ffff, 0, 0, 16 },
22 Package () { 0x0000ffff, 1, 0, 17 },
23 Package () { 0x0000ffff, 2, 0, 18 },
24 Package () { 0x0000ffff, 3, 0, 19 } })
25 Name (IQAP, Package () {
26 Package () { 0x0000ffff, 0, \_SB.PCI0.LNKA, 0 },
27 Package () { 0x0000ffff, 1, \_SB.PCI0.LNKB, 0 },
28 Package () { 0x0000ffff, 2, \_SB.PCI0.LNKC, 0 },
29 Package () { 0x0000ffff, 3, \_SB.PCI0.LNKD, 0 } })
31 /* Interrupt Map INTA->INTB, INTB->INTC, INTC->INTD, INTD->INTA */
32 Name (IQBA, Package () {
33 Package () { 0x0000ffff, 0, 0, 17 },
34 Package () { 0x0000ffff, 1, 0, 18 },
35 Package () { 0x0000ffff, 2, 0, 19 },
36 Package () { 0x0000ffff, 3, 0, 16 } })
37 Name (IQBP, Package () {
38 Package () { 0x0000ffff, 0, \_SB.PCI0.LNKB, 0 },
39 Package () { 0x0000ffff, 1, \_SB.PCI0.LNKC, 0 },
40 Package () { 0x0000ffff, 2, \_SB.PCI0.LNKD, 0 },
41 Package () { 0x0000ffff, 3, \_SB.PCI0.LNKA, 0 } })
43 /* Interrupt Map INTA->INTC, INTB->INTD, INTC->INTA, INTD->INTB */
44 Name (IQCA, Package () {
45 Package () { 0x0000ffff, 0, 0, 18 },
46 Package () { 0x0000ffff, 1, 0, 19 },
47 Package () { 0x0000ffff, 2, 0, 16 },
48 Package () { 0x0000ffff, 3, 0, 17 } })
49 Name (IQCP, Package () {
50 Package () { 0x0000ffff, 0, \_SB.PCI0.LNKC, 0 },
51 Package () { 0x0000ffff, 1, \_SB.PCI0.LNKD, 0 },
52 Package () { 0x0000ffff, 2, \_SB.PCI0.LNKA, 0 },
53 Package () { 0x0000ffff, 3, \_SB.PCI0.LNKB, 0 } })
55 /* Interrupt Map INTA->INTD, INTB->INTA, INTC->INTB, INTD->INTC */
56 Name (IQDA, Package () {
57 Package () { 0x0000ffff, 0, 0, 19 },
58 Package () { 0x0000ffff, 1, 0, 16 },
59 Package () { 0x0000ffff, 2, 0, 17 },
60 Package () { 0x0000ffff, 3, 0, 18 } })
61 Name (IQDP, Package () {
62 Package () { 0x0000ffff, 0, \_SB.PCI0.LNKD, 0 },
63 Package () { 0x0000ffff, 1, \_SB.PCI0.LNKA, 0 },
64 Package () { 0x0000ffff, 2, \_SB.PCI0.LNKB, 0 },
65 Package () { 0x0000ffff, 3, \_SB.PCI0.LNKC, 0 } })
67 Switch (ToInteger (Arg0))
69 Case (Package () { 1, 5, 9, 13 }) {
77 Case (Package () { 2, 6, 10, 14 }) {
85 Case (Package () { 3, 7, 11, 15 }) {
93 Case (Package () { 4, 8, 12, 16 }) {
113 Name (_ADR, 0x001C0000)
115 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
116 Field (RPCS, AnyAcc, NoLock, Preserve)
119 RPPN, 8, /* Root Port Number */
130 Name (_ADR, 0x001C0001)
132 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
133 Field (RPCS, AnyAcc, NoLock, Preserve)
136 RPPN, 8, /* Root Port Number */
147 Name (_ADR, 0x001C0002)
149 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
150 Field (RPCS, AnyAcc, NoLock, Preserve)
153 RPPN, 8, /* Root Port Number */
164 Name (_ADR, 0x001C0003)
166 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
167 Field (RPCS, AnyAcc, NoLock, Preserve)
170 RPPN, 8, /* Root Port Number */
181 Name (_ADR, 0x001C0004)
183 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
184 Field (RPCS, AnyAcc, NoLock, Preserve)
187 RPPN, 8, /* Root Port Number */
198 Name (_ADR, 0x001C0005)
200 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
201 Field (RPCS, AnyAcc, NoLock, Preserve)
204 RPPN, 8, /* Root Port Number */
215 Name (_ADR, 0x001C0006)
217 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
218 Field (RPCS, AnyAcc, NoLock, Preserve)
221 RPPN, 8, /* Root Port Number */
232 Name (_ADR, 0x001C0007)
234 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
235 Field (RPCS, AnyAcc, NoLock, Preserve)
238 RPPN, 8, /* Root Port Number */
249 Name (_ADR, 0x001D0000)
251 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
252 Field (RPCS, AnyAcc, NoLock, Preserve)
255 RPPN, 8, /* Root Port Number */
266 Name (_ADR, 0x001D0001)
268 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
269 Field (RPCS, AnyAcc, NoLock, Preserve)
272 RPPN, 8, /* Root Port Number */
283 Name (_ADR, 0x001D0002)
285 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
286 Field (RPCS, AnyAcc, NoLock, Preserve)
289 RPPN, 8, /* Root Port Number */
300 Name (_ADR, 0x001D0003)
302 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
303 Field (RPCS, AnyAcc, NoLock, Preserve)
306 RPPN, 8, /* Root Port Number */
317 Name (_ADR, 0x001D0004)
319 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
320 Field (RPCS, AnyAcc, NoLock, Preserve)
323 RPPN, 8, /* Root Port Number */
334 Name (_ADR, 0x001D0005)
336 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
337 Field (RPCS, AnyAcc, NoLock, Preserve)
340 RPPN, 8, /* Root Port Number */
351 Name (_ADR, 0x001D0006)
353 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
354 Field (RPCS, AnyAcc, NoLock, Preserve)
357 RPPN, 8, /* Root Port Number */
368 Name (_ADR, 0x001D0007)
370 OperationRegion (RPCS, PCI_Config, 0x4c, 4)
371 Field (RPCS, AnyAcc, NoLock, Preserve)
374 RPPN, 8, /* Root Port Number */