src/soc/intel/quark/memmap.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <arch/romstage.h>
  16 #include <cbmem.h>
  17 #include <soc/reg_access.h>
  18
  19 void fill_postcar_frame(struct postcar_frame *pcf)
  20 {
  21         uintptr_t top_of_ram;
  22         uintptr_t top_of_low_usable_memory;
  23
  24         /* Locate the top of RAM */
  25         top_of_low_usable_memory = (uintptr_t) cbmem_top();
  26         top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB);
  27
  28         /* Cache postcar and ramstage */
  29         postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB,
  30                 MTRR_TYPE_WRBACK);
  31
  32         /* Cache RMU area */
  33         postcar_frame_add_mtrr(pcf, (uintptr_t) top_of_low_usable_memory,
  34                 0x10000, MTRR_TYPE_WRTHROUGH);
  35
  36         /* Cache ESRAM */
  37         postcar_frame_add_mtrr(pcf, 0x80000000, 0x80000, MTRR_TYPE_WRBACK);
  38
  39         pcf->skip_common_mtrr = 1;
  40         /* Cache SPI flash - Write protect not supported */
  41         postcar_frame_add_romcache(pcf, MTRR_TYPE_WRTHROUGH);
  42 }