soc: Remove copyright notices
[coreboot.git] / src / soc / intel / common / block / spi / spi.c
bloba96dc1830745825cd473ebca8d2b638aa6e3c9a6
1 /*
2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <device/device.h>
17 #include <device/pci.h>
18 #include <device/pci_ids.h>
19 #include <device/spi.h>
20 #include <intelblocks/fast_spi.h>
21 #include <intelblocks/gspi.h>
22 #include <intelblocks/spi.h>
23 #include <soc/pci_devs.h>
24 #include <spi-generic.h>
26 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
27 { .ctrlr = &fast_spi_flash_ctrlr, .bus_start = 0, .bus_end = 0 },
28 #if !ENV_SMM && CONFIG(SOC_INTEL_COMMON_BLOCK_GSPI)
29 { .ctrlr = &gspi_ctrlr, .bus_start = 1,
30 .bus_end = 1 + (CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX - 1)},
31 #endif
34 const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);
36 static int spi_dev_to_bus(struct device *dev)
38 return spi_soc_devfn_to_bus(dev->path.pci.devfn);
41 static struct spi_bus_operations spi_bus_ops = {
42 .dev_to_bus = &spi_dev_to_bus,
45 static struct device_operations spi_dev_ops = {
46 .read_resources = pci_dev_read_resources,
47 .set_resources = pci_dev_set_resources,
48 .enable_resources = pci_dev_enable_resources,
49 .scan_bus = scan_generic_bus,
50 .ops_spi_bus = &spi_bus_ops,
51 .ops_pci = &pci_dev_ops_pci,
54 static const unsigned short pci_device_ids[] = {
55 PCI_DEVICE_ID_INTEL_SPT_SPI1,
56 PCI_DEVICE_ID_INTEL_SPT_SPI2,
57 PCI_DEVICE_ID_INTEL_SPT_SPI3,
58 PCI_DEVICE_ID_INTEL_APL_SPI0,
59 PCI_DEVICE_ID_INTEL_APL_SPI1,
60 PCI_DEVICE_ID_INTEL_APL_SPI2,
61 PCI_DEVICE_ID_INTEL_APL_HWSEQ_SPI,
62 PCI_DEVICE_ID_INTEL_GLK_SPI0,
63 PCI_DEVICE_ID_INTEL_GLK_SPI1,
64 PCI_DEVICE_ID_INTEL_GLK_SPI2,
65 PCI_DEVICE_ID_INTEL_CNL_SPI0,
66 PCI_DEVICE_ID_INTEL_CNL_SPI1,
67 PCI_DEVICE_ID_INTEL_CNL_SPI2,
68 PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI,
69 PCI_DEVICE_ID_INTEL_CNP_H_SPI0,
70 PCI_DEVICE_ID_INTEL_CNP_H_SPI1,
71 PCI_DEVICE_ID_INTEL_CNP_H_SPI2,
72 PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI,
73 PCI_DEVICE_ID_INTEL_LWB_SPI,
74 PCI_DEVICE_ID_INTEL_LWB_SPI_SUPER,
75 PCI_DEVICE_ID_INTEL_ICP_SPI0,
76 PCI_DEVICE_ID_INTEL_ICP_SPI1,
77 PCI_DEVICE_ID_INTEL_ICP_SPI2,
78 PCI_DEVICE_ID_INTEL_ICP_HWSEQ_SPI,
79 PCI_DEVICE_ID_INTEL_CMP_SPI0,
80 PCI_DEVICE_ID_INTEL_CMP_SPI1,
81 PCI_DEVICE_ID_INTEL_CMP_SPI2,
82 PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI,
83 PCI_DEVICE_ID_INTEL_CMP_H_SPI0,
84 PCI_DEVICE_ID_INTEL_CMP_H_SPI1,
85 PCI_DEVICE_ID_INTEL_CMP_H_SPI2,
86 PCI_DEVICE_ID_INTEL_CMP_H_HWSEQ_SPI,
87 PCI_DEVICE_ID_INTEL_TGP_SPI0,
88 PCI_DEVICE_ID_INTEL_TGP_GSPI0,
89 PCI_DEVICE_ID_INTEL_TGP_GSPI1,
90 PCI_DEVICE_ID_INTEL_TGP_GSPI2,
91 PCI_DEVICE_ID_INTEL_TGP_GSPI3,
92 PCI_DEVICE_ID_INTEL_TGP_GSPI4,
93 PCI_DEVICE_ID_INTEL_TGP_GSPI5,
94 PCI_DEVICE_ID_INTEL_TGP_GSPI6,
95 PCI_DEVICE_ID_INTEL_MCC_SPI0,
96 PCI_DEVICE_ID_INTEL_MCC_GSPI0,
97 PCI_DEVICE_ID_INTEL_MCC_GSPI1,
98 PCI_DEVICE_ID_INTEL_MCC_GSPI2,
99 PCI_DEVICE_ID_INTEL_JSP_SPI0,
100 PCI_DEVICE_ID_INTEL_JSP_SPI1,
101 PCI_DEVICE_ID_INTEL_JSP_SPI2,
102 PCI_DEVICE_ID_INTEL_JSP_HWSEQ_SPI,
106 static const struct pci_driver pch_spi __pci_driver = {
107 .ops = &spi_dev_ops,
108 .vendor = PCI_VENDOR_ID_INTEL,
109 .devices = pci_device_ids,