2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef SOC_INTEL_COMMON_BLOCK_P2SB_H
16 #define SOC_INTEL_COMMON_BLOCK_P2SB_H
21 #define PCH_P2SB_E0 0xe0
22 #define P2SB_E0_MASKLOCK (1 << 1)
23 #define PCH_P2SB_IBDF 0x6c
24 #define PCH_P2SB_HBDF 0x70
38 void p2sb_unhide(void);
40 void p2sb_disable_sideband_access(void);
41 void p2sb_enable_bar(void);
42 void p2sb_configure_hpet(void);
46 * Each SoC should implement EP Mask register to disable SB access
48 * ep_mask: An array to be filled by SoC code with EP mask register.
49 * count: number of element in EP mask array.
51 void p2sb_soc_get_sb_mask(uint32_t *ep_mask
, size_t count
);
53 #endif /* SOC_INTEL_COMMON_BLOCK_P2SB_H */