2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <device/pci.h>
18 #ifndef SOC_INTEL_COMMON_BLOCK_IMC_H
19 #define SOC_INTEL_COMMON_BLOCK_IMC_H
21 enum smbus_command
{ IMC_READ
, IMC_WRITE
};
23 enum access_width
{ IMC_DATA_BYTE
, IMC_DATA_WORD
};
25 enum memory_controller_id
{ IMC_CONTROLLER_ID0
= 0, IMC_CONTROLLER_ID1
};
28 IMC_DEVICE_TSOD
= 0x3,
29 IMC_DEVICE_WP_EEPROM
= 0x6,
30 IMC_DEVICE_EEPROM
= 0xa
33 /* Initiate SMBus/I2C transaction to DIMM EEPROM */
34 int imc_smbus_spd_xfer(pci_devfn_t dev
, uint8_t slave_addr
, uint8_t bus_addr
,
35 enum device_type_id dti
, enum access_width width
,
36 enum memory_controller_id mcid
, enum smbus_command cmd
, void *data
);