2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <device/mmio.h>
16 #include <intelblocks/cfg.h>
17 #include <intelblocks/pmclib.h>
18 #include <intelpch/lockdown.h>
21 static void pmc_lock_pmsync(void)
26 pmcbase
= pmc_mmio_regs();
28 pmsyncreg
= read32(pmcbase
+ PMSYNC_TPR_CFG
);
29 pmsyncreg
|= PCH2CPU_TPR_CFG_LOCK
;
30 write32(pmcbase
+ PMSYNC_TPR_CFG
, pmsyncreg
);
33 static void pmc_lock_abase(void)
38 pmcbase
= pmc_mmio_regs();
40 reg32
= read32(pmcbase
+ GEN_PMCON_B
);
41 reg32
|= (SLP_STR_POL_LOCK
| ACPI_BASE_LOCK
);
42 write32(pmcbase
+ GEN_PMCON_B
, reg32
);
45 static void pmc_lock_smi(void)
50 pmcbase
= pmc_mmio_regs();
52 reg8
= read8(pmcbase
+ GEN_PMCON_B
);
54 write8(pmcbase
+ GEN_PMCON_B
, reg8
);
57 static void pmc_lockdown_cfg(int chipset_lockdown
)
61 /* Lock down ABASE and sleep stretching policy */
63 /* Make sure payload/OS can't trigger global reset */
64 pmc_global_reset_disable_and_lock();
66 if (chipset_lockdown
== CHIPSET_LOCKDOWN_COREBOOT
)
70 void soc_lockdown_config(int chipset_lockdown
)
72 /* PMC lock down configuration */
73 pmc_lockdown_cfg(chipset_lockdown
);