src/soc/intel/baytrail/acpi/pcie.asl

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 /* Intel SOC PCIe support */
  16
  17 Device (RP01)
  18 {
  19         Name (_ADR, 0x001c0000)
  20
  21         Method (_PRT)
  22         {
  23                 If (PICM) {
  24                         Return (Package() {
  25                                 #undef PIC_MODE
  26                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  27                                 PCI_DEV_PIRQ_ROUTE(0x0, A, B, C, D)
  28                         })
  29                 } Else {
  30                         Return (Package() {
  31                                 #define PIC_MODE
  32                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  33                                 PCI_DEV_PIRQ_ROUTE(0x0, A, B, C, D)
  34                         })
  35                 }
  36         }
  37 }
  38
  39 Device (RP02)
  40 {
  41         Name (_ADR, 0x001c0001)
  42
  43         Method (_PRT)
  44         {
  45                 If (PICM) {
  46                         Return (Package() {
  47                                 #undef PIC_MODE
  48                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  49                                 PCI_DEV_PIRQ_ROUTE(0x0, B, C, D, A)
  50                         })
  51                 } Else {
  52                         Return (Package() {
  53                                 #define PIC_MODE
  54                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  55                                 PCI_DEV_PIRQ_ROUTE(0x0, B, C, D, A)
  56                         })
  57                 }
  58         }
  59 }
  60
  61 Device (RP03)
  62 {
  63         Name (_ADR, 0x001c0002)
  64
  65         Method (_PRT)
  66         {
  67                 If (PICM) {
  68                         Return (Package() {
  69                                 #undef PIC_MODE
  70                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  71                                 PCI_DEV_PIRQ_ROUTE(0x0, C, D, A, B)
  72                         })
  73                 } Else {
  74                         Return (Package() {
  75                                 #define PIC_MODE
  76                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  77                                 PCI_DEV_PIRQ_ROUTE(0x0, C, D, A, B)
  78                         })
  79                 }
  80         }
  81 }
  82
  83 Device (RP04)
  84 {
  85         Name (_ADR, 0x001c0003)
  86
  87         Method (_PRT)
  88         {
  89                 If (PICM) {
  90                         Return (Package() {
  91                                 #undef PIC_MODE
  92                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  93                                 PCI_DEV_PIRQ_ROUTE(0x0, D, A, B, C)
  94                         })
  95                 } Else {
  96                         Return (Package() {
  97                                 #define PIC_MODE
  98                                 #include <soc/intel/baytrail/acpi/irq_helper.h>
  99                                 PCI_DEV_PIRQ_ROUTE(0x0, D, A, B, C)
 100                         })
 101                 }
 102         }
 103 }