2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #ifndef _SOC_INT_DEFINE_ASL_
17 #define _SOC_INT_DEFINE_ASL_
19 #define SDCARD_INT 3 /* Need to be shared by PMC and SCC only*/
20 #define UART0_INT 4 /* Need to be shared by PMC and SCC only*/
21 #define UART1_INT 5 /* Need to be shared by PMC and SCC only*/
22 #define UART2_INT 6 /* Need to be shared by PMC and SCC only*/
23 #define UART3_INT 7 /* Need to be shared by PMC and SCC only*/
24 #define XDCI_INT 13 /* Need to be shared by PMC and SCC only*/
25 #define GPIO_BANK_INT 14
33 #define XHCI_INT 17 /* Need to be shared by PMC and SCC only*/
34 #define SMBUS_INT 20 /* PIRQE */
35 #define CSE_INT 20 /* PIRQE */
36 #define IUNIT_INT 21 /* PIRQF */
59 #endif /* _SOC_INT_DEFINE_ASL_ */