soc: Remove copyright notices
[coreboot.git] / src / soc / amd / stoneyridge / Makefile.inc
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1 #*****************************************************************************
4 # Redistribution and use in source and binary forms, with or without
5 # modification, are permitted provided that the following conditions are met:
6 #     * Redistributions of source code must retain the above copyright
7 #       notice, this list of conditions and the following disclaimer.
8 #     * Redistributions in binary form must reproduce the above copyright
9 #       notice, this list of conditions and the following disclaimer in the
10 #       documentation and/or other materials provided with the distribution.
11 #     * Neither the name of Advanced Micro Devices, Inc. nor the names of
12 #       its contributors may be used to endorse or promote products derived
13 #       from this software without specific prior written permission.
15 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
16 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 # DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
19 # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
22 # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 #*****************************************************************************
27 ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
29 subdirs-y += ../../../cpu/amd/mtrr/
30 subdirs-y += ../../../cpu/x86/tsc
31 subdirs-y += ../../../cpu/x86/lapic
32 subdirs-y += ../../../cpu/x86/cache
33 subdirs-y += ../../../cpu/x86/mtrr
34 subdirs-y += ../../../cpu/x86/pae
35 subdirs-y += ../../../cpu/x86/smm
37 bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c
38 bootblock-y += BiosCallOuts.c
39 bootblock-y += bootblock/bootblock.c
40 bootblock-y += gpio.c
41 bootblock-y += i2c.c
42 bootblock-y += enable_usbdebug.c
43 bootblock-y += monotonic_timer.c
44 bootblock-y += pmutil.c
45 bootblock-y += tsc_freq.c
46 bootblock-y += southbridge.c
47 bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
49 romstage-y += BiosCallOuts.c
50 romstage-y += i2c.c
51 romstage-y += romstage.c
52 romstage-y += enable_usbdebug.c
53 romstage-y += gpio.c
54 romstage-y += monotonic_timer.c
55 romstage-y += pmutil.c
56 romstage-y += smbus_spd.c
57 romstage-y += memmap.c
58 romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
59 romstage-y += tsc_freq.c
60 romstage-y += southbridge.c
61 romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
63 verstage-y += gpio.c
64 verstage-y += i2c.c
65 verstage-y += monotonic_timer.c
66 verstage-y += pmutil.c
67 verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
68 verstage-y += tsc_freq.c
70 postcar-y += monotonic_timer.c
71 postcar-$(CONFIG_STONEYRIDGE_UART) += uart.c
72 postcar-y += memmap.c
73 postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
74 postcar-y += tsc_freq.c
76 ramstage-y += BiosCallOuts.c
77 ramstage-y += i2c.c
78 ramstage-y += chip.c
79 ramstage-y += cpu.c
80 ramstage-y += mca.c
81 ramstage-y += enable_usbdebug.c
82 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
83 ramstage-y += gpio.c
84 ramstage-y += monotonic_timer.c
85 ramstage-y += southbridge.c
86 ramstage-y += northbridge.c
87 ramstage-y += pmutil.c
88 ramstage-y += sata.c
89 ramstage-y += memmap.c
90 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
91 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
92 ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
93 ramstage-y += usb.c
94 ramstage-y += tsc_freq.c
95 ramstage-y += finalize.c
97 all-y += reset.c
99 smm-y += monotonic_timer.c
100 smm-y += smihandler.c
101 smm-y += smi_util.c
102 smm-y += tsc_freq.c
103 smm-$(CONFIG_DEBUG_SMI) += uart.c
104 smm-y += gpio.c
106 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge
107 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include
108 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/acpi
110 # ROMSIG Normally At ROMBASE + 0x20000
111 # Overridden by CONFIG_AMD_FWM_POSITION_INDEX
112 # +-----------+---------------+----------------+------------+
113 # |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM    |
114 # +-----------+---------------+----------------+------------+
115 # |PSPDIR ADDR|
116 # +-----------+
118 # EC ROM should be 64K aligned.
119 STONEYRIDGE_FWM_POSITION=$(call int-add, \
120         $(call int-subtract, 0xffffffff \
121         $(call int-shift-left, \
122         0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
124 ### 0
125 FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
126 ifneq ($(FIRMWARE_LOCATE),)
128 ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y)
129 FIRMWARE_TYPE=ST
130 else
131 ifeq ($(CONFIG_AMD_APU_MERLINFALCON),y)
132 FIRMWARE_TYPE=CZ
133 else
134 ifeq ($(CONFIG_AMD_APU_PRAIRIEFALCON),y)
135 FIRMWARE_TYPE=ST
136 else
137 $(error soc/amd/stoneyridge: Unusable FIRMWARE_TYPE)
139 endif # CONFIG_AMD_APU_PRAIRIEFALCON
140 endif # CONFIG_AMD_APU_MERLINFALCON
141 endif # CONFIG_AMD_APU_STONEYRIDGE
143 ###5
144 PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
146 ###1
147 PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
149 ###3
150 PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
152 ###4
153 PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
155 ###8 - Check for SMU firmware named either *.sbin or *.csbin.  Both "signed" and
156 ###    "compressed signed" are used by generations supported by this file.
157 SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin
158 SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin
159 ifeq ("$(wildcard $(SMUFWM_FILE))","")
160 SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
161 SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin
162 endif
164 ###95
165 SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
167 ###9
168 PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key
170 ifeq ($(CONFIG_USE_PSPSECUREOS),y)
171 ###2
172 PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
174 ###12
175 PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin)
177 ###13
178 TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
179 endif
181 ###18- Check for SMU firmware2 named either *.sbin or *.csbin
182 ###    TODO: Remove *.sbin section after the blobs repo is updated.
183 SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin
184 SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin
185 ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","")
186 SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
187 SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin
188 endif
190 ifeq ("$(wildcard $(SMUFWM_FN_FILE))","")
191 SMUFWM_FN_FILE=
192 SMUFIRMWARE2_FN_FILE=
193 endif
195 add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
197 OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
198 OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)
200 OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
201 OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
202 OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware)
203 OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery)
204 OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey)
205 OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram)
206 OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug)
207 ifeq ($(CONFIG_USE_PSPSECUREOS),y)
208 OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos)
209 OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets)
210 OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey)
211 endif
212 OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2)
213 OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs)
214 SUBPROG_FN_SMU_FW=1
215 OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware)
216 OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2)
218 ifeq ($(FIRMWARE_TYPE),ST)
219 OPT_COMBOCAPABLE=--combo-capable
220 endif
222 $(obj)/amdfw.rom:       $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
223                         $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
224                         $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
225                         $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
226                         $(call strip_quotes, $(PSPBTLDR_FILE)) \
227                         $(call strip_quotes, $(PSPRCVR_FILE)) \
228                         $(call strip_quotes, $(PSPSCUREOS_FILE)) \
229                         $(call strip_quotes, $(PSPNVRAM_FILE)) \
230                         $(call strip_quotes, $(SMUFWM_FILE)) \
231                         $(call strip_quotes, $(SMUFWM_FN_FILE)) \
232                         $(call strip_quotes, $(SMUSCS_FILE)) \
233                         $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \
234                         $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \
235                         $(call strip_quotes, $(TRUSTLETKEY_FILE)) \
236                         $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
237                         $(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \
238                         $(AMDFWTOOL)
239         rm -f $@
240         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
241         $(AMDFWTOOL) \
242                 $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
243                 $(OPT_STONEYRIDGE_GEC_FWM_FILE) \
244                 $(OPT_AMD_PUBKEY_FILE) \
245                 $(OPT_PSPBTLDR_FILE) \
246                 $(OPT_SMUFWM_FILE) \
247                 $(OPT_PSPRCVR_FILE) \
248                 $(OPT_PUBSIGNEDKEY_FILE) \
249                 $(OPT_PSPSCUREOS_FILE) \
250                 $(OPT_PSPNVRAM_FILE) \
251                 $(OPT_PSPSECUREDEBUG_FILE) \
252                 $(OPT_PSPTRUSTLETS_FILE) \
253                 $(OPT_TRUSTLETKEY_FILE) \
254                 $(OPT_SMUFIRMWARE2_FILE) \
255                 $(OPT_SMUSCS_FILE) \
256                 $(OPT_AMD_PUBKEY_FILE) \
257                 $(OPT_PSPBTLDR_FILE) \
258                 $(OPT_SMUFWM_FILE) \
259                 $(OPT_SMUFWM_FN_FILE) \
260                 $(OPT_PSPRCVR_FILE) \
261                 $(OPT_PUBSIGNEDKEY_FILE) \
262                 $(OPT_PSPSCUREOS_FILE) \
263                 $(OPT_PSPNVRAM_FILE) \
264                 $(OPT_PSPSECUREDEBUG_FILE) \
265                 $(OPT_PSPTRUSTLETS_FILE) \
266                 $(OPT_TRUSTLETKEY_FILE) \
267                 $(OPT_SMUFIRMWARE2_FILE) \
268                 $(OPT_SMUFIRMWARE2_FN_FILE) \
269                 $(OPT_SMUSCS_FILE) \
270                 $(OPT_COMBOCAPABLE)\
271                 --flashsize $(CONFIG_ROM_SIZE) \
272                 --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
273                 --output        $@
275 ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
276 PHONY+=add_amdfw
277 INTERMEDIATE+=add_amdfw
279 # Calculate firmware position inside the ROM
280 STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
281         $(call int-subtract, $(CONFIG_ROM_SIZE) \
282         $(call int-shift-left, \
283         0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
285 add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
286         printf "    DD         Adding AMD Firmware at ROM offset 0x%x\n" \
287                 "$(STONEYRIDGE_FWM_ROM_POSITION)"
288         dd if=$(obj)/amdfw.rom \
289                 of=$(obj)/coreboot.pre conv=notrunc bs=1 \
290                 seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1
292 else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
294 cbfs-files-y += apu/amdfw
295 apu/amdfw-file := $(obj)/amdfw.rom
296 apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION)
297 apu/amdfw-type := raw
299 endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
301 ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
303 cbfs-files-y += smu_fw
304 cbfs-files-y += smu_fw2
305 smu_fw-type := raw
306 smu_fw2-type := raw
308 ifeq ($(CONFIG_SOC_AMD_SMU_FANLESS),y)
309 smu_fw-file := $(SMUFWM_FN_FILE)
310 smu_fw2-file := $(SMUFIRMWARE2_FN_FILE)
311 else ifeq ($(CONFIG_SOC_AMD_SMU_FANNED),y)
312 smu_fw-file := $(SMUFWM_FILE)
313 smu_fw2-file := $(SMUFIRMWARE2_FILE)
314 else
315 $(error "Proper SMU Firmware not selected")
316 endif
318 endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
320 else # ifneq ($(FIRMWARE_LOCATE),)
322 warn_no_amdfw:
323         printf "\n\t** WARNING **\n"
324         printf "coreboot has been built with no PSP firmware and "
325         printf "a non-booting image has been generated.\n\n"
327 PHONY+=warn_no_amdfw
329 files_added:: warn_no_amdfw
331 endif # ifneq ($(FIRMWARE_LOCATE),)
333 endif # ($(CONFIG_SOC_AMD_STONEYRIDGE),y)