eric patch
[coreboot.git] / src / mainboard / supermicro / x6dhr_ig / debug.c
blob5546421156240583ae6acaa52144784b7bb71b72
1 #define SMBUS_MEM_DEVICE_START 0x50
2 #define SMBUS_MEM_DEVICE_END 0x57
3 #define SMBUS_MEM_DEVICE_INC 1
5 static void print_reg(unsigned char index)
7 unsigned char data;
9 outb(index, 0x2e);
10 data = inb(0x2f);
11 print_debug("0x");
12 print_debug_hex8(index);
13 print_debug(": 0x");
14 print_debug_hex8(data);
15 print_debug("\r\n");
16 return;
19 static void xbus_en(void)
21 /* select the XBUS function in the SIO */
22 outb(0x07, 0x2e);
23 outb(0x0f, 0x2f);
24 outb(0x30, 0x2e);
25 outb(0x01, 0x2f);
26 return;
29 static void setup_func(unsigned char func)
31 /* select the function in the SIO */
32 outb(0x07, 0x2e);
33 outb(func, 0x2f);
34 /* print out the regs */
35 print_reg(0x30);
36 print_reg(0x60);
37 print_reg(0x61);
38 print_reg(0x62);
39 print_reg(0x63);
40 print_reg(0x70);
41 print_reg(0x71);
42 print_reg(0x74);
43 print_reg(0x75);
44 return;
47 static void siodump(void)
49 int i;
50 unsigned char data;
52 print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n");
53 for (i=0x10; i<=0x2d; i++) {
54 print_reg((unsigned char)i);
56 #if 0
57 print_debug("\r\n*** XBUS REGISTERS ***\r\n");
58 setup_func(0x0f);
59 for (i=0xf0; i<=0xff; i++) {
60 print_reg((unsigned char)i);
63 print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n");
64 setup_func(0x03);
65 print_reg(0xf0);
67 print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n");
68 setup_func(0x02);
69 print_reg(0xf0);
71 #endif
72 print_debug("\r\n*** GPIO REGISTERS ***\r\n");
73 setup_func(0x07);
74 for (i=0xf0; i<=0xf8; i++) {
75 print_reg((unsigned char)i);
77 print_debug("\r\n*** GPIO VALUES ***\r\n");
78 data = inb(0x68a);
79 print_debug("\r\nGPDO 4: 0x");
80 print_debug_hex8(data);
81 data = inb(0x68b);
82 print_debug("\r\nGPDI 4: 0x");
83 print_debug_hex8(data);
84 print_debug("\r\n");
86 #if 0
88 print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n");
89 setup_func(0x0a);
90 print_reg(0xf0);
92 print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n");
93 setup_func(0x09);
94 print_reg(0xf0);
95 print_reg(0xf1);
97 print_debug("\r\n*** RTC REGISTERS ***\r\n");
98 setup_func(0x10);
99 print_reg(0xf0);
100 print_reg(0xf1);
101 print_reg(0xf3);
102 print_reg(0xf6);
103 print_reg(0xf7);
104 print_reg(0xfe);
105 print_reg(0xff);
107 print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n");
108 setup_func(0x14);
109 print_reg(0xf0);
110 #endif
111 return;
114 static void print_debug_pci_dev(unsigned dev)
116 print_debug("PCI: ");
117 print_debug_hex8((dev >> 16) & 0xff);
118 print_debug_char(':');
119 print_debug_hex8((dev >> 11) & 0x1f);
120 print_debug_char('.');
121 print_debug_hex8((dev >> 8) & 7);
124 static void print_pci_devices(void)
126 device_t dev;
127 for(dev = PCI_DEV(0, 0, 0);
128 dev <= PCI_DEV(0, 0x1f, 0x7);
129 dev += PCI_DEV(0,0,1)) {
130 uint32_t id;
131 id = pci_read_config32(dev, PCI_VENDOR_ID);
132 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
133 (((id >> 16) & 0xffff) == 0xffff) ||
134 (((id >> 16) & 0xffff) == 0x0000)) {
135 continue;
137 print_debug_pci_dev(dev);
138 print_debug("\r\n");
142 static void dump_pci_device(unsigned dev)
144 int i;
145 print_debug_pci_dev(dev);
146 print_debug("\r\n");
148 for(i = 0; i <= 255; i++) {
149 unsigned char val;
150 if ((i & 0x0f) == 0) {
151 print_debug_hex8(i);
152 print_debug_char(':');
154 val = pci_read_config8(dev, i);
155 print_debug_char(' ');
156 print_debug_hex8(val);
157 if ((i & 0x0f) == 0x0f) {
158 print_debug("\r\n");
163 static void dump_bar14(unsigned dev)
165 int i;
166 unsigned long bar;
168 print_debug("BAR 14 Dump\r\n");
170 bar = pci_read_config32(dev, 0x14);
171 for(i = 0; i <= 0x300; i+=4) {
172 #if 0
173 unsigned char val;
174 if ((i & 0x0f) == 0) {
175 print_debug_hex8(i);
176 print_debug_char(':');
178 val = pci_read_config8(dev, i);
179 #endif
180 if((i%4)==0) {
181 print_debug("\r\n");
182 print_debug_hex16(i);
183 print_debug_char(' ');
185 print_debug_hex32(read32(bar + i));
186 print_debug_char(' ');
188 print_debug("\r\n");
191 static void dump_pci_devices(void)
193 device_t dev;
194 for(dev = PCI_DEV(0, 0, 0);
195 dev <= PCI_DEV(0, 0x1f, 0x7);
196 dev += PCI_DEV(0,0,1)) {
197 uint32_t id;
198 id = pci_read_config32(dev, PCI_VENDOR_ID);
199 if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
200 (((id >> 16) & 0xffff) == 0xffff) ||
201 (((id >> 16) & 0xffff) == 0x0000)) {
202 continue;
204 dump_pci_device(dev);
208 #if 0
209 static void dump_spd_registers(const struct mem_controller *ctrl)
211 int i;
212 print_debug("\r\n");
213 for(i = 0; i < 4; i++) {
214 unsigned device;
215 device = ctrl->channel0[i];
216 if (device) {
217 int j;
218 print_debug("dimm: ");
219 print_debug_hex8(i);
220 print_debug(".0: ");
221 print_debug_hex8(device);
222 for(j = 0; j < 256; j++) {
223 int status;
224 unsigned char byte;
225 if ((j & 0xf) == 0) {
226 print_debug("\r\n");
227 print_debug_hex8(j);
228 print_debug(": ");
230 status = smbus_read_byte(device, j);
231 if (status < 0) {
232 print_debug("bad device\r\n");
233 break;
235 byte = status & 0xff;
236 print_debug_hex8(byte);
237 print_debug_char(' ');
239 print_debug("\r\n");
241 device = ctrl->channel1[i];
242 if (device) {
243 int j;
244 print_debug("dimm: ");
245 print_debug_hex8(i);
246 print_debug(".1: ");
247 print_debug_hex8(device);
248 for(j = 0; j < 256; j++) {
249 int status;
250 unsigned char byte;
251 if ((j & 0xf) == 0) {
252 print_debug("\r\n");
253 print_debug_hex8(j);
254 print_debug(": ");
256 status = smbus_read_byte(device, j);
257 if (status < 0) {
258 print_debug("bad device\r\n");
259 break;
261 byte = status & 0xff;
262 print_debug_hex8(byte);
263 print_debug_char(' ');
265 print_debug("\r\n");
269 #endif
271 void dump_spd_registers(void)
273 unsigned device;
274 device = SMBUS_MEM_DEVICE_START;
275 while(device <= SMBUS_MEM_DEVICE_END) {
276 int status = 0;
277 int i;
278 print_debug("\r\n");
279 print_debug("dimm ");
280 print_debug_hex8(device);
282 for(i = 0; (i < 256) ; i++) {
283 unsigned char byte;
284 if ((i % 16) == 0) {
285 print_debug("\r\n");
286 print_debug_hex8(i);
287 print_debug(": ");
289 status = smbus_read_byte(device, i);
290 if (status < 0) {
291 print_debug("bad device: ");
292 print_debug_hex8(-status);
293 print_debug("\r\n");
294 break;
296 print_debug_hex8(status);
297 print_debug_char(' ');
299 device += SMBUS_MEM_DEVICE_INC;
300 print_debug("\n");
304 void dump_ipmi_registers(void)
306 unsigned device;
307 device = 0x42;
308 while(device <= 0x42) {
309 int status = 0;
310 int i;
311 print_debug("\r\n");
312 print_debug("ipmi ");
313 print_debug_hex8(device);
315 for(i = 0; (i < 8) ; i++) {
316 unsigned char byte;
317 status = smbus_read_byte(device, 2);
318 if (status < 0) {
319 print_debug("bad device: ");
320 print_debug_hex8(-status);
321 print_debug("\r\n");
322 break;
324 print_debug_hex8(status);
325 print_debug_char(' ');
327 device += SMBUS_MEM_DEVICE_INC;
328 print_debug("\n");