src/mainboard/asrock/h110m/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2016 Intel Corporation.
   5  * Copyright (C) 2019 Maxim Polyakov <max.senia.poliak@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <soc/romstage.h>
  18 #include <string.h>
  19 #include <spd_bin.h>
  20
  21 static void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1)
  22 {
  23         /* DQ byte map */
  24         const u8 dq_map[2][12] = {
  25                   { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
  26                     0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
  27                   { 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC,
  28                     0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } };
  29         memcpy(dq_map_ch0, dq_map[0], sizeof(dq_map[0]));
  30         memcpy(dq_map_ch1, dq_map[1], sizeof(dq_map[1]));
  31 }
  32
  33 static void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1)
  34 {
  35         /* DQS CPU<>DRAM map */
  36         const u8 dqs_map[2][8] = {
  37                 { 0, 1, 3, 2, 4, 5, 6, 7 },
  38                 { 1, 0, 4, 5, 2, 3, 6, 7 } };
  39         memcpy(dqs_map_ch0, dqs_map[0], sizeof(dqs_map[0]));
  40         memcpy(dqs_map_ch1, dqs_map[1], sizeof(dqs_map[1]));
  41 }
  42
  43 static void mainboard_fill_rcomp_res_data(void *rcomp_ptr)
  44 {
  45         /* Rcomp resistor */
  46         const u16 RcompResistor[3] = { 200, 81, 162 };
  47         memcpy(rcomp_ptr, RcompResistor,
  48                  sizeof(RcompResistor));
  49 }
  50
  51 static void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
  52 {
  53         /* Rcomp target */
  54         static const u16 RcompTarget[5] = {
  55                 100, 40, 40, 23, 40 };
  56         memcpy(rcomp_strength_ptr, RcompTarget, sizeof(RcompTarget));
  57 }
  58
  59 void mainboard_memory_init_params(FSPM_UPD *mupd)
  60 {
  61         FSP_M_CONFIG *mem_cfg;
  62         struct spd_block blk = {
  63                 .addr_map = { 0x50, 0x51, 0x52, 0x53, },
  64         };
  65
  66         mem_cfg = &mupd->FspmConfig;
  67         mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0,
  68                                    &mem_cfg->DqByteMapCh1);
  69         mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0,
  70                                     &mem_cfg->DqsMapCpu2DramCh1);
  71         mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
  72         mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
  73
  74         mem_cfg->DqPinsInterleaved = 1;
  75         get_spd_smbus(&blk);
  76         mem_cfg->MemorySpdDataLen = blk.len;
  77         mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
  78         mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2];
  79         mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1];
  80         mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3];
  81         dump_spd_info(&blk);
  82
  83         /* use virtual channel 1 for the dmi interface of the PCH */
  84         mupd->FspmTestConfig.DmiVc1 = 1;
  85
  86         /* desktop type */
  87         mem_cfg->UserBd = BOARD_TYPE_DESKTOP;
  88 }