src/soc/intel/skylake/bootblock/bootblock.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2016 Intel Corporation..
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <bootblock_common.h>
  17 #include <drivers/i2c/designware/dw_i2c.h>
  18 #include <intelblocks/gspi.h>
  19 #include <intelblocks/uart.h>
  20 #include <soc/bootblock.h>
  21
  22 asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
  23 {
  24         /* Call lib/bootblock.c main */
  25         bootblock_main_with_basetime(base_timestamp);
  26 }
  27
  28 void bootblock_soc_early_init(void)
  29 {
  30         bootblock_systemagent_early_init();
  31         bootblock_pch_early_init();
  32         bootblock_cpu_init();
  33         pch_early_iorange_init();
  34
  35         if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
  36                 uart_bootblock_init();
  37 }
  38
  39 void bootblock_soc_init(void)
  40 {
  41         /*
  42          * Perform early chipset initialization before fsp memory init
  43          * example: pirq->irq programming, enabling smbus, set pmcbase
  44          * and abase, i2c programming and print platform info
  45          */
  46         report_platform_info();
  47         pch_early_init();
  48
  49         gspi_early_bar_init();
  50 }