src/superio/winbond/w83627dhg/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <arch/io.h>
  17 #include <device/device.h>
  18 #include <device/pnp.h>
  19 #include <superio/conf_mode.h>
  20 #include <pc80/keyboard.h>
  21 #include <stdlib.h>
  22 #include "w83627dhg.h"
  23
  24 static void w83627dhg_enable_UR2(struct device *dev)
  25 {
  26         u8 reg8;
  27
  28         pnp_enter_conf_mode(dev);
  29         reg8 = pnp_read_config(dev, 0x2c);
  30         reg8 |= (0x3);
  31         pnp_write_config(dev, 0x2c, reg8); // Set pins 78-85-> UART B
  32         pnp_exit_conf_mode(dev);
  33 }
  34
  35 static void w83627dhg_init(struct device *dev)
  36 {
  37
  38         if (!dev->enabled)
  39                 return;
  40
  41         switch (dev->path.pnp.device) {
  42         case W83627DHG_SP2:
  43                 w83627dhg_enable_UR2(dev);
  44                 break;
  45         case W83627DHG_KBC:
  46                 pc_keyboard_init(NO_AUX_DEVICE);
  47                 break;
  48         }
  49 }
  50
  51 static struct device_operations ops = {
  52         .read_resources   = pnp_read_resources,
  53         .set_resources    = pnp_set_resources,
  54         .enable_resources = pnp_enable_resources,
  55         .enable           = pnp_alt_enable,
  56         .init             = w83627dhg_init,
  57         .ops_pnp_mode     = &pnp_conf_mode_8787_aa,
  58 };
  59
  60 static struct pnp_info pnp_dev_info[] = {
  61         { NULL, W83627DHG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  62         { NULL, W83627DHG_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
  63         { NULL, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
  64         { NULL, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
  65         { NULL, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
  66                 0x07ff, 0x07ff, },
  67         { NULL, W83627DHG_SPI, PNP_IO1, 0, 0x7f8, },
  68         { NULL, W83627DHG_GPIO6, },
  69         { NULL, W83627DHG_WDTO_PLED, },
  70         { NULL, W83627DHG_GPIO2, },
  71         { NULL, W83627DHG_GPIO3, },
  72         { NULL, W83627DHG_GPIO4, },
  73         { NULL, W83627DHG_GPIO5, },
  74         { NULL, W83627DHG_ACPI, PNP_IRQ0, },
  75         { NULL, W83627DHG_HWM, PNP_IO0 | PNP_IRQ0, 0x07fe, },
  76         { NULL, W83627DHG_PECI_SST, },
  77 };
  78
  79 static void enable_dev(struct device *dev)
  80 {
  81         pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
  82 }
  83
  84 struct chip_operations superio_winbond_w83627dhg_ops = {
  85         CHIP_NAME("Winbond W83627DHG Super I/O")
  86         .enable_dev = enable_dev,
  87 };