2 * This file is part of the coreboot project.
4 * Copyright 2014 Rockchip Inc.
5 * Copyright 2014 Google Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
19 #include <bootblock_common.h>
20 #include <console/console.h>
23 #include <soc/clock.h>
27 #include <soc/rk808.h>
29 #include <vendorcode/google/chromeos/chromeos.h>
33 void bootblock_mainboard_early_init()
35 if (IS_ENABLED(CONFIG_DRIVERS_UART
)) {
36 assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS
== UART2_BASE
);
37 write32(&rk3288_grf
->iomux_uart2
, IOMUX_UART2
);
42 void bootblock_mainboard_init(void)
44 if (rkclk_was_watchdog_reset())
45 reboot_from_watchdog();
47 gpio_output(GPIO(0, B
, 3), 1); /* Power LED */
49 /* Up VDD_CPU (BUCK1) to 1.4V to support max CPU frequency (1.8GHz). */
50 setbits_le32(&rk3288_pmu
->iomux_i2c0scl
, IOMUX_I2C0SCL
);
51 setbits_le32(&rk3288_pmu
->iomux_i2c0sda
, IOMUX_I2C0SDA
);
52 assert(CONFIG_PMIC_BUS
== 0); /* must correspond with IOMUX */
53 i2c_init(CONFIG_PMIC_BUS
, 400*KHz
);
55 /* Slowly raise to max CPU voltage to prevent overshoot */
56 rk808_configure_buck(1, 1200);
57 udelay(175);/* Must wait for voltage to stabilize,2mV/us */
58 rk808_configure_buck(1, 1400);
59 udelay(100);/* Must wait for voltage to stabilize,2mV/us */
60 rkclk_configure_cpu(APLL_1800_MHZ
);
63 write32(&rk3288_grf
->iomux_i2c1
, IOMUX_I2C1
);
66 /* spi2 for firmware ROM */
67 write32(&rk3288_grf
->iomux_spi2csclk
, IOMUX_SPI2_CSCLK
);
68 write32(&rk3288_grf
->iomux_spi2txrx
, IOMUX_SPI2_TXRX
);
69 rockchip_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS
, 24750*KHz
);
71 setup_chromeos_gpios();