2 # This file is part of the coreboot project.
5 # This program is free software
; you can redistribute it
and/or modify
6 # it under the terms of the GNU General Public License
as published by
7 # the Free Software Foundation
; version
2 of the License.
9 # This program is distributed in the hope that it will be useful
,
10 # but WITHOUT ANY WARRANTY
; without even the implied warranty of
11 # MERCHANTABILITY
or FITNESS
FOR A PARTICULAR PURPOSE. See the
12 # GNU General Public License
for more details.
14 chip northbridge
/amd
/pi/00730F01
/root_complex
15 device cpu_cluster
0 on
16 chip cpu
/amd
/pi/00730F01
22 subsystemid
0x1022 0x1410 inherit
24 chip northbridge
/amd
/pi/00730F01
25 device pci
0.0 on
end # Root Complex
26 device pci
0.2 on
end # IOMMU
27 device pci
1.0 off
end # Internal Graphics P2P bridge
0x9804
28 device pci
1.1 off
end # Internal Multimedia
29 device pci
2.0 on
end # PCIe Host Bridge
30 device pci
2.1 on
end # LAN1
31 device pci
2.2 on
end # LAN2
32 device pci
2.3 on
end # LAN3
33 device pci
2.4 on
end # LAN4
34 device pci
2.5 on
end # mPCIe slot
1
35 device pci
8.0 on
end # Platform Security Processor
36 end #chip northbridge
/amd
/pi/00730F01
38 chip southbridge
/amd
/pi/hudson
39 device pci
10.0 on
end # XHCI HC0 muxed with EHCI
2
40 device pci
11.0 on
end # SATA
41 device pci
12.0 on
end # USB EHCI0 usb
[0:3] is connected
42 device pci
13.0 on
end # USB EHCI1 usb
[4:7]
43 device pci
14.0 on
end # SM
44 device pci
14.3 on # LPC
0x439d
45 chip superio
/nuvoton
/nct5104d # SIO NCT5104D
46 register
"irq_trigger_type" = "0"
47 device pnp
2e
.0 off
end
57 # UART C is conditionally turned on
62 # UART D is conditionally turned on
66 device pnp
2e
.008 off
end
70 # GPIO0
and GPIO1 are conditionally turned on
71 device pnp
2e
.007 on
end
72 device pnp
2e
.107 on
end
73 device pnp
2e
.607 off
end
74 device pnp
2e.e off
end
75 device pnp
2e.f on
end
79 device pci
14.7 on
end # SD
80 device pci
16.0 on
end # USB EHCI2 usb
[8:7] - muxed with XHCI
81 end #chip southbridge
/amd
/pi/hudson
83 device pci
18.0 on
end
84 device pci
18.1 on
end
85 device pci
18.2 on
end
86 device pci
18.3 on
end
87 device pci
18.4 on
end
88 device pci
18.5 on
end
91 end #northbridge
/amd
/pi/00730F01
/root_complex