2 * This file is part of the coreboot project.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; version 2 of
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
18 #include <ec/acpi/ec.h>
20 #include <southbridge/intel/ibexpeak/pch.h>
21 #include <northbridge/intel/ironlake/ironlake.h>
23 const struct southbridge_usb_port mainboard_usb_ports
[] = {
24 /* Enabled, Current table lookup index, OC map */
41 static void set_fsb_frequency(void)
45 smbus_block_read(0x69, 0, 5, block
);
47 block
[1] = fsbfreq
>> 8;
49 smbus_block_write(0x69, 0, 5, block
);
52 void mainboard_pre_raminit(void)
57 void mainboard_get_spd_map(u8
*spd_addrmap
)
59 spd_addrmap
[0] = 0x50;
60 spd_addrmap
[2] = 0x51;