src/mainboard/kontron/986lcd-m/mainboard.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; version 2 of the License.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <string.h>
  16 #include <types.h>
  17 #include <device/device.h>
  18 #include <console/console.h>
  19 #include <drivers/intel/gma/int15.h>
  20 #include <option.h>
  21 #include <superio/hwm5_conf.h>
  22 #include <superio/nuvoton/common/hwm.h>
  23
  24 /* Hardware Monitor */
  25
  26 static u16 hwm_base = 0xa00;
  27
  28 #define FAN_CRUISE_CONTROL_DISABLED     0
  29 #define FAN_CRUISE_CONTROL_SPEED        1
  30 #define FAN_CRUISE_CONTROL_THERMAL      2
  31
  32 #define FAN_SPEED_5625  0
  33
  34
  35 struct fan_speed {
  36         u8 fan_in;
  37         u16 fan_speed;
  38 };
  39
  40 /* FANIN Target Speed Register */
  41 /* FANIN = 337500 / RPM */
  42 struct fan_speed fan_speeds[] = {
  43         { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
  44         { 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 },
  45         { 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 },
  46         { 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 }
  47 };
  48
  49 struct temperature {
  50         u8 deg_celsius;
  51         u8 deg_fahrenheit;
  52 };
  53
  54 struct temperature temperatures[] = {
  55         { 30,  86 }, { 33,  91 }, { 36,  96 }, { 39, 102 },
  56         { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
  57         { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
  58         { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
  59 };
  60
  61 static void hwm_setup(void)
  62 {
  63         int cpufan_control = 0, sysfan_control = 0;
  64         int cpufan_speed = 0, sysfan_speed = 0;
  65         int cpufan_temperature = 0, sysfan_temperature = 0;
  66
  67         cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
  68         get_option(&cpufan_control, "cpufan_cruise_control");
  69         cpufan_speed = FAN_SPEED_5625;
  70         get_option(&cpufan_speed, "cpufan_speed");
  71
  72         sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
  73         get_option(&sysfan_control, "sysfan_cruise_control");
  74         sysfan_speed = FAN_SPEED_5625;
  75         get_option(&sysfan_speed, "sysfan_speed");
  76
  77         nuvoton_hwm_select_bank(hwm_base, 0);
  78         pnp_write_hwm5_index(hwm_base, 0x59, 0x20); /* Diode Selection */
  79         pnp_write_hwm5_index(hwm_base, 0x5d, 0x0f); /* All Sensors Diode, not Thermistor */
  80
  81         nuvoton_hwm_select_bank(hwm_base, 4);
  82         pnp_write_hwm5_index(hwm_base, 0x54, 0xf1); /* SYSTIN temperature offset */
  83         pnp_write_hwm5_index(hwm_base, 0x55, 0x19); /* CPUTIN temperature offset */
  84         pnp_write_hwm5_index(hwm_base, 0x56, 0xfc); /* AUXTIN temperature offset */
  85
  86         nuvoton_hwm_select_bank(hwm_base, 0x80); /* Default */
  87
  88         u8 fan_config = 0;
  89         /* 00 FANOUT is Manual Mode */
  90         /* 01 FANOUT is Thermal Cruise Mode */
  91         /* 10 FANOUT is Fan Speed Cruise Mode */
  92         switch (cpufan_control) {
  93         case FAN_CRUISE_CONTROL_SPEED:   fan_config |= (2 << 4); break;
  94         case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break;
  95         }
  96         switch (sysfan_control) {
  97         case FAN_CRUISE_CONTROL_SPEED:   fan_config |= (2 << 2); break;
  98         case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break;
  99         }
 100         /* This register must be written first */
 101         pnp_write_hwm5_index(hwm_base, 0x04, fan_config);
 102
 103         switch (cpufan_control) {
 104         case FAN_CRUISE_CONTROL_SPEED: /* CPUFANIN target speed */
 105                 printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n",
 106                                 fan_speeds[cpufan_speed].fan_speed);
 107                 pnp_write_hwm5_index(hwm_base, 0x06, fan_speeds[cpufan_speed].fan_in);
 108                 break;
 109         case FAN_CRUISE_CONTROL_THERMAL: /* CPUFANIN target temperature */
 110                 printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n",
 111                                 temperatures[cpufan_temperature].deg_celsius,
 112                                 temperatures[cpufan_temperature].deg_fahrenheit);
 113                 pnp_write_hwm5_index(hwm_base, 0x06,
 114                                      temperatures[cpufan_temperature].deg_celsius);
 115                 break;
 116         }
 117
 118         switch (sysfan_control) {
 119         case FAN_CRUISE_CONTROL_SPEED: /* SYSFANIN target speed */
 120                 printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n",
 121                                 fan_speeds[sysfan_speed].fan_speed);
 122                 pnp_write_hwm5_index(hwm_base, 0x05, fan_speeds[sysfan_speed].fan_in);
 123                 break;
 124         case FAN_CRUISE_CONTROL_THERMAL: /* SYSFANIN target temperature */
 125                 printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n",
 126                                 temperatures[sysfan_temperature].deg_celsius,
 127                                 temperatures[sysfan_temperature].deg_fahrenheit);
 128                 pnp_write_hwm5_index(hwm_base, 0x05,
 129                                      temperatures[sysfan_temperature].deg_celsius);
 130                 break;
 131         }
 132
 133         pnp_write_hwm5_index(hwm_base, 0x0e, 0x02); /* Fan Output Step Down Time */
 134         pnp_write_hwm5_index(hwm_base, 0x0f, 0x02); /* Fan Output Step Up Time */
 135
 136         pnp_write_hwm5_index(hwm_base, 0x47, 0xaf); /* FAN divisor register */
 137         pnp_write_hwm5_index(hwm_base, 0x4b, 0x84); /* AUXFANIN speed divisor */
 138
 139         pnp_write_hwm5_index(hwm_base, 0x40, 0x01); /* Init, but no SMI# */
 140 }
 141
 142 /* mainboard_enable is executed as first thing after */
 143 /* enumerate_buses(). */
 144
 145 static void mainboard_enable(struct device *dev)
 146 {
 147         install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, GMA_INT15_BOOT_DISPLAY_DEFAULT, 3);
 148         hwm_setup();
 149 }
 150
 151 static void mainboard_init(void *chip_info)
 152 {
 153         int i;
 154         struct device *dev;
 155
 156         for (i = 1; i <= 3; i++) {
 157                 int ethernet_disable = 0;
 158                 char cmos_option_name[] = "ethernetx";
 159                 snprintf(cmos_option_name, sizeof(cmos_option_name),
 160                          "ethernet%01d", i);
 161                 get_option(&ethernet_disable, cmos_option_name);
 162                 if (!ethernet_disable)
 163                         continue;
 164                 printk(BIOS_DEBUG, "Disabling Ethernet NIC #%d\n", i);
 165                 dev = pcidev_on_root(28, i - 1);
 166                 if (dev == NULL) {
 167                         printk(BIOS_ERR,
 168                                "Disabling Ethernet NIC: Cannot find 00:1c.%d!\n",
 169                                i - 1);
 170                         continue;
 171                 }
 172                 dev->enabled = 0;
 173         }
 174 }
 175
 176 struct chip_operations mainboard_ops = {
 177         .init = mainboard_init,
 178         .enable_dev = mainboard_enable,
 179 };