src/device/pci_class.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* This file is part of the coreboot project. */
   3
   4 #include <device/device.h>
   5 #include <device/pci.h>
   6 #include <device/pci_ops.h>
   7
   8 typedef struct {
   9         const unsigned char subclass_id;
  10         const char *subclass_name;
  11 } PCI_SUBCLASS;
  12
  13 typedef struct {
  14         const unsigned char class_id;
  15         const PCI_SUBCLASS *subclass_list;
  16         const unsigned int subclass_entries;
  17         const char *class_name;
  18 } PCI_CLASS;
  19
  20 static const PCI_SUBCLASS unclassified[] = {
  21         { 0x00, "Non-VGA device" },
  22         { 0x01, "VGA compatible device" }
  23 };
  24
  25 static const PCI_SUBCLASS mass_storage[] = {
  26         { 0x00, "SCSI storage controller" },
  27         { 0x01, "IDE interface" },
  28         { 0x02, "Floppy disk controller" },
  29         { 0x03, "IPI bus controller" },
  30         { 0x04, "RAID bus controller" },
  31         { 0x05, "ATA controller" },
  32         { 0x06, "SATA controller" },
  33         { 0x07, "Serial Attached SCSI controller" },
  34         { 0x08, "Non-Volatile memory controller" },
  35         { 0x09, "Universal Flash Storage controller" },
  36         { 0x80, "Mass storage controller" }
  37 };
  38
  39 static const PCI_SUBCLASS network[] = {
  40         { 0x00, "Ethernet controller" },
  41         { 0x01, "Token ring network controller" },
  42         { 0x02, "FDDI network controller" },
  43         { 0x03, "ATM network controller" },
  44         { 0x04, "ISDN controller" },
  45         { 0x05, "WorldFip controller" },
  46         { 0x06, "PICMG controller" },
  47         { 0x07, "InfiniBand Controller" },
  48         { 0x08, "Host fabric controller" },
  49         { 0x80, "Network controller" }
  50 };
  51
  52 static const PCI_SUBCLASS display[] = {
  53         { 0x00, "VGA compatible controller" },
  54         { 0x01, "XGA compatible controller" },
  55         { 0x02, "3D controller" },
  56         { 0x80, "Display controller" }
  57 };
  58
  59 static const PCI_SUBCLASS multimedia[] = {
  60         { 0x00, "Multimedia video controller" },
  61         { 0x01, "Multimedia audio controller" },
  62         { 0x02, "Computer telephony device" },
  63         { 0x03, "Audio device" },
  64         { 0x80, "Multimedia controller" }
  65 };
  66
  67 static const PCI_SUBCLASS memory[] = {
  68         { 0x00, "RAM memory" },
  69         { 0x01, "FLASH memory" },
  70         { 0x80, "Memory controller" }
  71 };
  72
  73 static const PCI_SUBCLASS bridge[] = {
  74         { 0x00, "Host bridge" },
  75         { 0x01, "ISA bridge" },
  76         { 0x02, "EISA bridge" },
  77         { 0x03, "MicroChannel bridge" },
  78         { 0x04, "PCI bridge" },
  79         { 0x05, "PCMCIA bridge" },
  80         { 0x06, "NuBus bridge" },
  81         { 0x07, "CardBus bridge" },
  82         { 0x08, "RACEway bridge" },
  83         { 0x09, "Semi-transparent PCI-to-PCI bridge" },
  84         { 0x0a, "InfiniBand to PCI host bridge" },
  85         { 0x0b, "Advanced Switching to PCI host bridge" },
  86         { 0x80, "Bridge" }
  87 };
  88
  89 static const PCI_SUBCLASS communication[] = {
  90         { 0x00, "Serial controller" },
  91         { 0x01, "Parallel controller" },
  92         { 0x02, "Multiport serial controller" },
  93         { 0x03, "Modem" },
  94         { 0x04, "GPIB controller" },
  95         { 0x05, "Smard Card controller" },
  96         { 0x80, "Communication controller" }
  97 };
  98
  99 static const PCI_SUBCLASS generic[] = {
 100         { 0x00, "PIC" },
 101         { 0x01, "DMA controller" },
 102         { 0x02, "Timer" },
 103         { 0x03, "RTC" },
 104         { 0x04, "PCI Hot-plug controller" },
 105         { 0x05, "SD Host controller" },
 106         { 0x06, "IOMMU" },
 107         { 0x07, "Root Complex Event Collector" },
 108         { 0x80, "System peripheral" }
 109 };
 110
 111 static const PCI_SUBCLASS input_device[] = {
 112         { 0x00, "Keyboard controller" },
 113         { 0x01, "Digitizer Pen" },
 114         { 0x02, "Mouse controller" },
 115         { 0x03, "Scanner controller" },
 116         { 0x04, "Gameport controller" },
 117         { 0x80, "Input device controller" }
 118 };
 119
 120 static const PCI_SUBCLASS docking_station[] = {
 121         { 0x00, "Generic Docking Station" },
 122         { 0x80, "Docking Station" }
 123 };
 124
 125 static const PCI_SUBCLASS processor[] = {
 126         { 0x00, "386" },
 127         { 0x01, "486" },
 128         { 0x02, "Pentium" },
 129         { 0x10, "Alpha" },
 130         { 0x20, "Power PC" },
 131         { 0x30, "MIPS" },
 132         { 0x40, "Co-processor" },
 133         { 0x80, "Processor" }
 134 };
 135
 136 static const PCI_SUBCLASS serial_bus[] = {
 137         { 0x00, "FireWire (IEEE 1394)" },
 138         { 0x01, "ACCESS Bus" },
 139         { 0x02, "SSA" },
 140         { 0x03, "USB controller" },
 141         { 0x04, "Fibre Channel" },
 142         { 0x05, "SMBus" },
 143         { 0x06, "InfiniBand" },
 144         { 0x07, "IPMI SMIC interface" },
 145         { 0x08, "SERCOS interface" },
 146         { 0x09, "CANBUS" },
 147         { 0x0a, "MIPI I3C SM Host Controller Interface" },
 148         { 0x80, "Serial Bus Controller" }
 149 };
 150
 151 static const PCI_SUBCLASS wireless[] = {
 152         { 0x00, "IRDA controller" },
 153         { 0x01, "Consumer IR controller" },
 154         { 0x10, "RF controller" },
 155         { 0x11, "Bluetooth" },
 156         { 0x12, "Broadband" },
 157         { 0x20, "802.1a controller" },
 158         { 0x21, "802.1b controller" },
 159         { 0x40, "Cellular controller/modem" },
 160         { 0x41, "Cellular controller/modem plus Ethernet (802.11)" },
 161         { 0x80, "Wireless controller" }
 162 };
 163
 164 static const PCI_SUBCLASS intellegient_controller[] = {
 165         { 0x00, "I2O" }
 166 };
 167
 168 static const PCI_SUBCLASS satellite_controller[] = {
 169         { 0x01, "Satellite TV controller" },
 170         { 0x02, "Satellite audio communication controller" },
 171         { 0x03, "Satellite voice communication controller" },
 172         { 0x04, "Satellite data communication controller" }
 173 };
 174
 175 static const PCI_SUBCLASS encryption[] = {
 176         { 0x00, "Network and computing encryption device" },
 177         { 0x10, "Entertainment encryption device" },
 178         { 0x80, "Encryption controller" }
 179 };
 180
 181 static const PCI_SUBCLASS signal_processing[] = {
 182         { 0x00, "DPIO module" },
 183         { 0x01, "Performance counters" },
 184         { 0x10, "Communication synchronizer" },
 185         { 0x20, "Signal processing management" },
 186         { 0x80, "Signal processing controller" }
 187 };
 188
 189 static const PCI_CLASS class_list[] = {
 190         { 0x00, &unclassified[0], ARRAY_SIZE(unclassified),
 191                 "Unclassified device" },
 192         { 0x01, &mass_storage[0], ARRAY_SIZE(mass_storage), "Mass storage" },
 193         { 0x02, &network[0], ARRAY_SIZE(network), "Network" },
 194         { 0x03, &display[0], ARRAY_SIZE(display), "Display" },
 195         { 0x04, &multimedia[0], ARRAY_SIZE(multimedia), "Multimedia" },
 196         { 0x05, &memory[0], ARRAY_SIZE(memory), "Memory" },
 197         { 0x06, &bridge[0], ARRAY_SIZE(bridge), "Bridge" },
 198         { 0x07, &communication[0], ARRAY_SIZE(communication), "Communication" },
 199         { 0x08, &generic[0], ARRAY_SIZE(generic), "Generic system peripheral" },
 200         { 0x09, &input_device[0], ARRAY_SIZE(input_device), "Input device" },
 201         { 0x0a, &docking_station[0], ARRAY_SIZE(docking_station),
 202                 "Docking station" },
 203         { 0x0b, &processor[0], ARRAY_SIZE(processor), "Processor" },
 204         { 0x0c, &serial_bus[0], ARRAY_SIZE(serial_bus), "Serial bus" },
 205         { 0x0d, &wireless[0], ARRAY_SIZE(wireless), "Wireless" },
 206         { 0x0e, &intellegient_controller[0],
 207                         ARRAY_SIZE(intellegient_controller),
 208                         "Intelligent controller" },
 209         { 0x0f, &satellite_controller[0], ARRAY_SIZE(satellite_controller),
 210                         "Satellite communications" },
 211         { 0x10, &encryption[0], ARRAY_SIZE(encryption), "Encryption" },
 212         { 0x11, &signal_processing[0], ARRAY_SIZE(signal_processing),
 213                         "Signal processing" },
 214         { 0xff, NULL, 0, "Unassigned class" }
 215 };
 216 static const unsigned int class_entries = ARRAY_SIZE(class_list);
 217
 218 static const PCI_CLASS *get_pci_class_entry(struct device *dev)
 219 {
 220         unsigned char class;
 221         const PCI_CLASS *class_entry;
 222         const PCI_CLASS *class_list_end;
 223
 224         /* Get the PCI device class */
 225         class = pci_read_config8(dev, PCI_CLASS_DEVICE+1);
 226
 227         /* Locate the class entry */
 228         class_entry = &class_list[0];
 229         class_list_end = &class_entry[class_entries];
 230         while (class_list_end > class_entry) {
 231                 if (class_entry->class_id == class)
 232                         return class_entry;
 233                 class_entry += 1;
 234         }
 235         return NULL;
 236 }
 237
 238 const char *get_pci_class_name(struct device *dev)
 239 {
 240         const PCI_CLASS *class_entry;
 241
 242         class_entry = get_pci_class_entry(dev);
 243         return class_entry ? class_entry->class_name : "???";
 244 }
 245
 246 const char *get_pci_subclass_name(struct device *dev)
 247 {
 248         const PCI_CLASS *class_entry;
 249         unsigned char subclass;
 250         const PCI_SUBCLASS *subclass_entry;
 251         const PCI_SUBCLASS *subclass_list_end;
 252         const char *subclass_name;
 253
 254         /* Get the PCI device subclass */
 255         subclass = pci_read_config8(dev, PCI_CLASS_DEVICE);
 256
 257         /* Locate the subclass name */
 258         subclass_name = "???";
 259         class_entry = get_pci_class_entry(dev);
 260         subclass_entry = class_entry ? class_entry->subclass_list : NULL;
 261         if (subclass_entry != NULL) {
 262                 subclass_list_end =
 263                         &subclass_entry[class_entry->subclass_entries];
 264                 while (subclass_list_end > subclass_entry) {
 265                         if (subclass_entry->subclass_id == subclass) {
 266                                 subclass_name = subclass_entry->subclass_name;
 267                                 break;
 268                         }
 269                         subclass_entry += 1;
 270                 }
 271         }
 272         return subclass_name;
 273 }