src/soc/amd/picasso/Makefile.inc

   1 #*****************************************************************************
   2 #
   3 # Copyright (c) 2012, 2016-2017 Advanced Micro Devices, Inc.
   4 #               2013 - 2014 Sage Electronic Engineering, LLC
   5 # All rights reserved.
   6 #
   7 # Redistribution and use in source and binary forms, with or without
   8 # modification, are permitted provided that the following conditions are met:
   9 #     * Redistributions of source code must retain the above copyright
  10 #       notice, this list of conditions and the following disclaimer.
  11 #     * Redistributions in binary form must reproduce the above copyright
  12 #       notice, this list of conditions and the following disclaimer in the
  13 #       documentation and/or other materials provided with the distribution.
  14 #     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  15 #       its contributors may be used to endorse or promote products derived
  16 #       from this software without specific prior written permission.
  17 #
  18 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  19 # ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  20 # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  21 # DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  22 # DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  23 # (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  24 # LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  25 # ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  27 # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 #
  29 #*****************************************************************************
  30 ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
  31
  32 subdirs-y += ../../../cpu/amd/mtrr/
  33 subdirs-y += ../../../cpu/x86/tsc
  34 subdirs-y += ../../../cpu/x86/lapic
  35 subdirs-y += ../../../cpu/x86/cache
  36 subdirs-y += ../../../cpu/x86/mtrr
  37 subdirs-y += ../../../cpu/x86/pae
  38 subdirs-y += ../../../cpu/x86/smm
  39
  40 bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c
  41 bootblock-y += bootblock/bootblock.c
  42 bootblock-y += gpio.c
  43 bootblock-y += i2c.c
  44 bootblock-y += monotonic_timer.c
  45 bootblock-y += pmutil.c
  46 bootblock-y += reset.c
  47 bootblock-y += tsc_freq.c
  48 bootblock-y += southbridge.c
  49 bootblock-$(CONFIG_SPI_FLASH) += spi.c
  50 bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
  51
  52 romstage-y += i2c.c
  53 romstage-y += romstage.c
  54 romstage-y += gpio.c
  55 romstage-y += monotonic_timer.c
  56 romstage-y += pmutil.c
  57 romstage-y += reset.c
  58 romstage-y += smbus.c
  59 romstage-y += ramtop.c
  60 romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
  61 romstage-y += tsc_freq.c
  62 romstage-y += southbridge.c
  63 romstage-$(CONFIG_SPI_FLASH) += spi.c
  64 romstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
  65
  66 verstage-y += gpio.c
  67 verstage-y += i2c.c
  68 verstage-y += monotonic_timer.c
  69 verstage-y += pmutil.c
  70 verstage-y += reset.c
  71 verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
  72 verstage-y += tsc_freq.c
  73 verstage-$(CONFIG_SPI_FLASH) += spi.c
  74
  75 postcar-y += monotonic_timer.c
  76 postcar-$(CONFIG_STONEYRIDGE_UART) += uart.c
  77 postcar-y += ramtop.c
  78 postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
  79 postcar-y += tsc_freq.c
  80
  81 ramstage-y += i2c.c
  82 ramstage-y += chip.c
  83 ramstage-y += cpu.c
  84 ramstage-y += mca.c
  85 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
  86 ramstage-y += gpio.c
  87 ramstage-y += monotonic_timer.c
  88 ramstage-y += southbridge.c
  89 ramstage-y += northbridge.c
  90 ramstage-y += pmutil.c
  91 ramstage-y += reset.c
  92 ramstage-y += sata.c
  93 ramstage-y += sm.c
  94 ramstage-y += smbus.c
  95 ramstage-y += ramtop.c
  96 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
  97 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
  98 ramstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
  99 ramstage-y += usb.c
 100 ramstage-y += tsc_freq.c
 101 ramstage-$(CONFIG_SPI_FLASH) += spi.c
 102 ramstage-y += finalize.c
 103
 104 smm-y += monotonic_timer.c
 105 smm-y += smihandler.c
 106 smm-y += smi_util.c
 107 smm-y += tsc_freq.c
 108 smm-$(CONFIG_DEBUG_SMI) += uart.c
 109 smm-$(CONFIG_SPI_FLASH) += spi.c
 110 smm-y += gpio.c
 111
 112 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge
 113 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include
 114 CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/acpi
 115
 116 # ROMSIG Normally At ROMBASE + 0x20000
 117 # Overridden by CONFIG_AMD_FWM_POSITION_INDEX
 118 # +-----------+---------------+----------------+------------+
 119 # |0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM    |
 120 # +-----------+---------------+----------------+------------+
 121 # |PSPDIR ADDR|
 122 # +-----------+
 123 #
 124 # EC ROM should be 64K aligned.
 125 STONEYRIDGE_FWM_POSITION=$(call int-add, \
 126         $(call int-subtract, 0xffffffff \
 127         $(call int-shift-left, \
 128         0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)
 129
 130 ### 0
 131 FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
 132 FIRMWARE_TYPE=ST
 133
 134 ###5
 135 PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
 136
 137 ###1
 138 PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
 139
 140 ###3
 141 PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
 142
 143 ###4
 144 PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
 145
 146 ###8 - Check for SMU firmware named either *.sbin or *.csbin
 147 ###    TODO: Remove *.sbin section after the blobs repo is updated.
 148 SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin
 149 SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin
 150 ifeq ("$(wildcard $(SMUFWM_FILE))","")
 151 SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
 152 SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin
 153 endif
 154
 155 ###95
 156 SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
 157
 158 ###9
 159 PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key
 160
 161 ifeq ($(CONFIG_USE_PSPSECUREOS),y)
 162 ###2
 163 PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
 164
 165 ###12
 166 PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin)
 167
 168 ###13
 169 TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
 170 endif
 171
 172 ###18- Check for SMU firmware2 named either *.sbin or *.csbin
 173 ###    TODO: Remove *.sbin section after the blobs repo is updated.
 174 SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin
 175 SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin
 176 ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","")
 177 SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
 178 SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin
 179 endif
 180
 181 add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
 182
 183 OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
 184 OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)
 185
 186 OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
 187 OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
 188 OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware)
 189 OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery)
 190 OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey)
 191 OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram)
 192 OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug)
 193 ifeq ($(CONFIG_USE_PSPSECUREOS),y)
 194 OPT_PSPSCUREOS_FILE=$(call add_opt_prefix, $(PSPSCUREOS_FILE), --secureos)
 195 OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets)
 196 OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey)
 197 endif
 198 OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2)
 199 OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs)
 200 SUBPROG_FN_SMU_FW=1
 201 OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware)
 202 OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2)
 203
 204
 205 $(obj)/amdfw.rom:       $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
 206                         $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
 207                         $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
 208                         $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
 209                         $(call strip_quotes, $(PSPBTLDR_FILE)) \
 210                         $(call strip_quotes, $(PSPRCVR_FILE)) \
 211                         $(call strip_quotes, $(PSPSCUREOS_FILE)) \
 212                         $(call strip_quotes, $(PSPNVRAM_FILE)) \
 213                         $(call strip_quotes, $(SMUFWM_FILE)) \
 214                         $(call strip_quotes, $(SMUFWM_FN_FILE)) \
 215                         $(call strip_quotes, $(SMUSCS_FILE)) \
 216                         $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \
 217                         $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \
 218                         $(call strip_quotes, $(TRUSTLETKEY_FILE)) \
 219                         $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
 220                         $(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \
 221                         $(AMDFWTOOL)
 222         rm -f $@
 223         @printf "    AMDFWTOOL  $(subst $(obj)/,,$(@))\n"
 224         $(AMDFWTOOL) \
 225                 $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
 226                 $(OPT_STONEYRIDGE_GEC_FWM_FILE) \
 227                 $(OPT_AMD_PUBKEY_FILE) \
 228                 $(OPT_PSPBTLDR_FILE) \
 229                 $(OPT_SMUFWM_FILE) \
 230                 $(OPT_PSPRCVR_FILE) \
 231                 $(OPT_PUBSIGNEDKEY_FILE) \
 232                 $(OPT_PSPSCUREOS_FILE) \
 233                 $(OPT_PSPNVRAM_FILE) \
 234                 $(OPT_PSPSECUREDEBUG_FILE) \
 235                 $(OPT_PSPTRUSTLETS_FILE) \
 236                 $(OPT_TRUSTLETKEY_FILE) \
 237                 $(OPT_SMUFIRMWARE2_FILE) \
 238                 $(OPT_SMUSCS_FILE) \
 239                 $(OPT_AMD_PUBKEY_FILE) \
 240                 $(OPT_PSPBTLDR_FILE) \
 241                 $(OPT_SMUFWM_FILE) \
 242                 $(OPT_SMUFWM_FN_FILE) \
 243                 $(OPT_PSPRCVR_FILE) \
 244                 $(OPT_PUBSIGNEDKEY_FILE) \
 245                 $(OPT_PSPSCUREOS_FILE) \
 246                 $(OPT_PSPNVRAM_FILE) \
 247                 $(OPT_PSPSECUREDEBUG_FILE) \
 248                 $(OPT_PSPTRUSTLETS_FILE) \
 249                 $(OPT_TRUSTLETKEY_FILE) \
 250                 $(OPT_SMUFIRMWARE2_FILE) \
 251                 $(OPT_SMUFIRMWARE2_FN_FILE) \
 252                 $(OPT_SMUSCS_FILE) \
 253                 --combo-capable \
 254                 --flashsize $(CONFIG_ROM_SIZE) \
 255                 --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
 256                 --output        $@
 257
 258 ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
 259 PHONY+=add_amdfw
 260 INTERMEDIATE+=add_amdfw
 261
 262 # Calculate firmware position inside the ROM
 263 STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
 264         $(call int-subtract, $(CONFIG_ROM_SIZE) \
 265         $(call int-shift-left, \
 266         0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000)
 267
 268 add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
 269         printf "    DD         Adding AMD Firmware at ROM offset 0x%x\n" \
 270                 "$(STONEYRIDGE_FWM_ROM_POSITION)"
 271         dd if=$(obj)/amdfw.rom \
 272                 of=$(obj)/coreboot.pre conv=notrunc bs=1 \
 273                 seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1
 274
 275 else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
 276
 277 cbfs-files-y += apu/amdfw
 278 apu/amdfw-file := $(obj)/amdfw.rom
 279 apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION)
 280 apu/amdfw-type := raw
 281
 282 endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
 283
 284 ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
 285
 286 cbfs-files-y += smu_fw
 287 cbfs-files-y += smu_fw2
 288 smu_fw-type := raw
 289 smu_fw2-type := raw
 290
 291 ifeq ($(CONFIG_SOC_AMD_SMU_FANLESS),y)
 292 smu_fw-file := $(SMUFWM_FN_FILE)
 293 smu_fw2-file := $(SMUFIRMWARE2_FN_FILE)
 294 else ifeq ($(CONFIG_SOC_AMD_SMU_FANNED),y)
 295 smu_fw-file := $(SMUFWM_FILE)
 296 smu_fw2-file := $(SMUFIRMWARE2_FILE)
 297 else
 298 $(error "Proper SMU Firmware not selected")
 299 endif
 300
 301 endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y)
 302
 303 endif # ($(CONFIG_SOC_AMD_PICASSO),y)